From nobody Thu May 16 06:33:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1590830600; cv=none; d=zohomail.com; s=zohoarc; b=Zq7NnHU4rvZLs00uGKXROAjTocZJgx1ZKqaJK4bkpJQDQcHyF2vJW7oF6SI62RQCdj9R5XQLQ1i/lJPI43e/GzA3bXuF1c9sQVvshGtNLyx0n32ppp+L5Zwbxtqc3TJeoln0Fosjzxb/8P0Ezj8bLy4MlXUx/pZbEnarIhWGE4U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1590830600; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:To; bh=UMLUSx5ffkbJsLpCXPlei2jZ9+s3G7t5o6C+HyvFjy0=; b=GPVyex4uZuN0JaxYcn1k4tBC96qzNqfzjTPOShqCDzWEsu04VdQYAkeZg7mXZk4tvgnnxDTEndeevPuKfvTbqJouUhRfUuETJ2pz1YZMryInv9NagEvIxVYpAMJixvM7eOIvZyVnMDsO6GPTwrCFJdu0/080XSLwrmLHjX8lark= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1590830600254730.6508822612022; Sat, 30 May 2020 02:23:20 -0700 (PDT) Received: from localhost ([::1]:51540 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jexi1-0001cp-P7 for importer@patchew.org; Sat, 30 May 2020 05:23:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48892) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jexhN-0000Kx-TT; Sat, 30 May 2020 05:22:38 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:3769 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jexhM-0006yP-J7; Sat, 30 May 2020 05:22:37 -0400 Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id A31619B39CB490453C06; Sat, 30 May 2020 17:22:29 +0800 (CST) Received: from localhost (10.173.222.233) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.487.0; Sat, 30 May 2020 17:22:22 +0800 From: Ying Fang To: , , Subject: [PATCH] target/arm/cpu: adjust virtual time for cortex series cpu Date: Sat, 30 May 2020 17:22:04 +0800 Message-ID: <20200530092204.1746-1-fangying1@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.173.222.233] X-CFilter-Loop: Reflected Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=45.249.212.191; envelope-from=fangying1@huawei.com; helo=huawei.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/30 05:22:30 X-ACL-Warn: Detected OS = Linux 3.11 and newer [fuzzy] X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, zhang.zhanghailiang@huawei.com, wu.wubin@huawei.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Virtual time adjustment was implemented for virt-5.0 machine type, but the cpu property was enabled only for host-passthrough and max cpu model. Let's add it for arm cortex series cpu which has the gernic timer feature enabled. Signed-off-by: Ying Fang diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 32bec156f2..a564141b22 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1973,6 +1973,9 @@ static void cortex_a7_initfn(Object *obj) cpu->ccsidr[1] =3D 0x201fe00a; /* 32K L1 icache */ cpu->ccsidr[2] =3D 0x711fe07a; /* 4096K L2 unified cache */ define_arm_cp_regs(cpu, cortexa15_cp_reginfo); /* Same as A15 */ + if (kvm_enabled()) { + kvm_arm_add_vcpu_properties(obj); + } } =20 static void cortex_a15_initfn(Object *obj) @@ -2015,6 +2018,9 @@ static void cortex_a15_initfn(Object *obj) cpu->ccsidr[1] =3D 0x201fe00a; /* 32K L1 icache */ cpu->ccsidr[2] =3D 0x711fe07a; /* 4096K L2 unified cache */ define_arm_cp_regs(cpu, cortexa15_cp_reginfo); + if (kvm_enabled()) { + kvm_arm_add_vcpu_properties(obj); + } } =20 #ifndef TARGET_AARCH64 diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index cbc5c3868f..3922347b83 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -137,6 +137,9 @@ static void aarch64_a57_initfn(Object *obj) cpu->gic_vpribits =3D 5; cpu->gic_vprebits =3D 5; define_arm_cp_regs(cpu, cortex_a72_a57_a53_cp_reginfo); + if (kvm_enabled()) { + kvm_arm_add_vcpu_properties(obj); + } } =20 static void aarch64_a53_initfn(Object *obj) @@ -190,6 +193,9 @@ static void aarch64_a53_initfn(Object *obj) cpu->gic_vpribits =3D 5; cpu->gic_vprebits =3D 5; define_arm_cp_regs(cpu, cortex_a72_a57_a53_cp_reginfo); + if (kvm_enabled()) { + kvm_arm_add_vcpu_properties(obj); + } } =20 static void aarch64_a72_initfn(Object *obj) @@ -241,6 +247,9 @@ static void aarch64_a72_initfn(Object *obj) cpu->gic_vpribits =3D 5; cpu->gic_vprebits =3D 5; define_arm_cp_regs(cpu, cortex_a72_a57_a53_cp_reginfo); + if (kvm_enabled()) { + kvm_arm_add_vcpu_properties(obj); + } } =20 void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) --=20 2.23.0