From nobody Thu May 16 19:49:12 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1590775296; cv=none; d=zohomail.com; s=zohoarc; b=D1WeFIedoWpNG8sbjmycn+eQfIGOd3oJ//+H0vP1FjXvMTJ8mZO3lXoZQivj2guJIwL2Hb3KT3GzviLpr4ZvKEEteDioPS0RpT/Ce3HR3cUbwn6EXRAxDBkTK4VfIrBUnG42x3we3IyilsjZBPwR6TFUy0dPHF/kMtLFwHyk1M4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1590775296; h=Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:To; bh=vZEiIi0JOJ27BWfJ6Emlvc4Kwua34mngiU7R7RsZQYo=; b=ggM+Q2tfo/Id7UwCNzinZOtvTGVWm0sDxrB/YdVCStLmCfvTtPHhTtzZ3PVkPvbHj9jVGqv9h5Sr5pmFLV7n0CmzbF74oy7NaH3Dl1tCOTd9+lP2C2GbgnOoYjjg5TX0gj5m2rnEWBSxu6XcryOFVGDlSP5N95SsrjWFj/UjOMA= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1590775295914414.86551419275736; Fri, 29 May 2020 11:01:35 -0700 (PDT) Received: from localhost ([::1]:44398 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jejK2-0002y4-KV for importer@patchew.org; Fri, 29 May 2020 14:01:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49660) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jejIt-0001yT-Cd; Fri, 29 May 2020 14:00:23 -0400 Received: from relay12.mail.gandi.net ([217.70.178.232]:37455) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jejIr-0004pk-Mb; Fri, 29 May 2020 14:00:23 -0400 Received: from localhost.localdomain (lns-bzn-59-82-252-130-88.adsl.proxad.net [82.252.130.88]) (Authenticated sender: jcd@tribudubois.net) by relay12.mail.gandi.net (Postfix) with ESMTPSA id DBF0E200008; Fri, 29 May 2020 18:00:14 +0000 (UTC) From: Jean-Christophe Dubois To: qemu-arm@nongnu.org Subject: [PATCH] hw/misc/imx6ul_ccm.c: Implement non writable bits in CCM registers Date: Fri, 29 May 2020 20:00:05 +0200 Message-Id: <20200529180005.169036-1-jcd@tribudubois.net> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=217.70.178.232; envelope-from=jcd@tribudubois.net; helo=relay12.mail.gandi.net X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 13:07:41 X-ACL-Warn: Detected OS = Linux 3.11 and newer X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, peter.chubb@nicta.com.au, qemu-devel@nongnu.org, Jean-Christophe Dubois Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Some bits of the CCM registers are non writable. This was left undone in the initial commit (all bits of registers were writable). This patch add the required code to protect non writable bits. Signed-off-by: Jean-Christophe Dubois --- hw/misc/imx6ul_ccm.c | 81 +++++++++++++++++++++++++++++++++++++------- 1 file changed, 68 insertions(+), 13 deletions(-) diff --git a/hw/misc/imx6ul_ccm.c b/hw/misc/imx6ul_ccm.c index a2fc1d0364a..ede845fde8e 100644 --- a/hw/misc/imx6ul_ccm.c +++ b/hw/misc/imx6ul_ccm.c @@ -19,6 +19,62 @@ =20 #include "trace.h" =20 +static const uint32_t ccm_mask[CCM_MAX] =3D { + [CCM_CCR] =3D 0xf01fef80, + [CCM_CCDR] =3D 0xfffeffff, + [CCM_CSR] =3D 0xffffffff, + [CCM_CCSR] =3D 0xfffffef2, + [CCM_CACRR] =3D 0xfffffff8, + [CCM_CBCDR] =3D 0xc1f8e000, + [CCM_CBCMR] =3D 0xfc03cfff, + [CCM_CSCMR1] =3D 0x80700000, + [CCM_CSCMR2] =3D 0xe01ff003, + [CCM_CSCDR1] =3D 0xfe00c780, + [CCM_CS1CDR] =3D 0xfe00fe00, + [CCM_CS2CDR] =3D 0xf8007000, + [CCM_CDCDR] =3D 0xf00fffff, + [CCM_CHSCCDR] =3D 0xfffc01ff, + [CCM_CSCDR2] =3D 0xfe0001ff, + [CCM_CSCDR3] =3D 0xffffc1ff, + [CCM_CDHIPR] =3D 0xffffffff, + [CCM_CTOR] =3D 0x00000000, + [CCM_CLPCR] =3D 0xf39ff01c, + [CCM_CISR] =3D 0xfb85ffbe, + [CCM_CIMR] =3D 0xfb85ffbf, + [CCM_CCOSR] =3D 0xfe00fe00, + [CCM_CGPR] =3D 0xfffc3fea, + [CCM_CCGR0] =3D 0x00000000, + [CCM_CCGR1] =3D 0x00000000, + [CCM_CCGR2] =3D 0x00000000, + [CCM_CCGR3] =3D 0x00000000, + [CCM_CCGR4] =3D 0x00000000, + [CCM_CCGR5] =3D 0x00000000, + [CCM_CCGR6] =3D 0x00000000, + [CCM_CMEOR] =3D 0xafffff1f, +}; + +static const uint32_t analog_mask[CCM_ANALOG_MAX] =3D { + [CCM_ANALOG_PLL_ARM] =3D 0xfff60f80, + [CCM_ANALOG_PLL_USB1] =3D 0xfffe0fbc, + [CCM_ANALOG_PLL_USB2] =3D 0xfffe0fbc, + [CCM_ANALOG_PLL_SYS] =3D 0xfffa0ffe, + [CCM_ANALOG_PLL_SYS_SS] =3D 0x00000000, + [CCM_ANALOG_PLL_SYS_NUM] =3D 0xc0000000, + [CCM_ANALOG_PLL_SYS_DENOM] =3D 0xc0000000, + [CCM_ANALOG_PLL_AUDIO] =3D 0xffe20f80, + [CCM_ANALOG_PLL_AUDIO_NUM] =3D 0xc0000000, + [CCM_ANALOG_PLL_AUDIO_DENOM] =3D 0xc0000000, + [CCM_ANALOG_PLL_VIDEO] =3D 0xffe20f80, + [CCM_ANALOG_PLL_VIDEO_NUM] =3D 0xc0000000, + [CCM_ANALOG_PLL_VIDEO_DENOM] =3D 0xc0000000, + [CCM_ANALOG_PLL_ENET] =3D 0xffc20ff0, + [CCM_ANALOG_PFD_480] =3D 0x40404040, + [CCM_ANALOG_PFD_528] =3D 0x40404040, + [PMU_MISC0] =3D 0x01fe8306, + [PMU_MISC1] =3D 0x07fcede0, + [PMU_MISC2] =3D 0x005f5f5f, +}; + static const char *imx6ul_ccm_reg_name(uint32_t reg) { static char unknown[20]; @@ -596,11 +652,8 @@ static void imx6ul_ccm_write(void *opaque, hwaddr offs= et, uint64_t value, =20 trace_ccm_write_reg(imx6ul_ccm_reg_name(index), (uint32_t)value); =20 - /* - * We will do a better implementation later. In particular some bits - * cannot be written to. - */ - s->ccm[index] =3D (uint32_t)value; + s->ccm[index] =3D (s->ccm[index] & ccm_mask[index]) | + ((uint32_t)value & ~ccm_mask[index]); } =20 static uint64_t imx6ul_analog_read(void *opaque, hwaddr offset, unsigned s= ize) @@ -737,7 +790,8 @@ static void imx6ul_analog_write(void *opaque, hwaddr of= fset, uint64_t value, * the REG_NAME register. So we change the value of the * REG_NAME register, setting bits passed in the value. */ - s->analog[index - 1] |=3D value; + s->analog[index - 1] =3D s->analog[index - 1] | + (value & ~analog_mask[index - 1]); break; case CCM_ANALOG_PLL_ARM_CLR: case CCM_ANALOG_PLL_USB1_CLR: @@ -762,7 +816,8 @@ static void imx6ul_analog_write(void *opaque, hwaddr of= fset, uint64_t value, * the REG_NAME register. So we change the value of the * REG_NAME register, unsetting bits passed in the value. */ - s->analog[index - 2] &=3D ~value; + s->analog[index - 2] =3D s->analog[index - 2] & + ~(value & ~analog_mask[index - 2]); break; case CCM_ANALOG_PLL_ARM_TOG: case CCM_ANALOG_PLL_USB1_TOG: @@ -787,14 +842,14 @@ static void imx6ul_analog_write(void *opaque, hwaddr = offset, uint64_t value, * the REG_NAME register. So we change the value of the * REG_NAME register, toggling bits passed in the value. */ - s->analog[index - 3] ^=3D value; + s->analog[index - 3] =3D (s->analog[index - 3] & + analog_mask[index - 3]) | + ((value ^ s->analog[index - 3]) & + ~analog_mask[index - 3]); break; default: - /* - * We will do a better implementation later. In particular some bi= ts - * cannot be written to. - */ - s->analog[index] =3D value; + s->analog[index] =3D (s->analog[index] & analog_mask[index]) | + (value & ~analog_mask[index]); break; } } --=20 2.25.1