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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id z124sm7335100wmg.20.2020.05.21.12.16.41 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2020 12:16:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=6lARWAcGcGM1iXMRMByZiacWi/0jxcclvLVCQpWGN5I=; b=BmGNT/oiqmgQpXBq+5fFZcVtx8zi+EP0aBrdQ/tjg5NJYA+tXIU160PYRyXa3tlga6 MNpmP26aUMzdhrQt4kBApD79zrBHsRIQTngcBFwK1maIjmHaNUBX7FieOLHz5RgF7HgT gnhtBp3fBQSSCUunu8QBYB4FLM/Ue7qYe9chKisdqZKe2UYnw++xx9+Ud0qHed0jfjCb XeSw+xb5ZEIcRn07MKnPdlHca0to7yWApx64UMCW8YrxoWQrUoX19GyAn4W2cVZNN+R+ i/1ShZVZrAt70LjT1Up3OQz7ze44K26Nhc5s/ZJ8oD9SMx+sT1lgXX6OdqR5kcBtFGwD 1RLA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6lARWAcGcGM1iXMRMByZiacWi/0jxcclvLVCQpWGN5I=; b=Si9RkxC0MD34HIPbhsoVNz3yi4iibYXogFrEfHT/mD7MZreK9sqpFMI/yB2rLmgIRU AeoJ91caKz8TNCT768sdvhrBdigEJWmRRa6xLL3GD7wYq5Gi9XzgAcopoGX5Dnn3VtLv W29ajZEhDPUK4FMJOoOu1AW1jzmSQPLdU8I5XUd5v1HjFGzLkAxMYGmnMWvsMPVDkvS3 oqAsBDwlCJFRUYh3Is021J/QNRJhEy7/+6KgAW8BTT1pfRKU34Km9IS0eyO4bJeKORXa 52ZGL1b8Gvx9iIByjLIz/N34kLLmkbJ7xcZWOmvsospaEKIwKtKAwYTOls4HkF3LN3j/ CFXA== X-Gm-Message-State: AOAM531KQNBLd9kq7jtUYaOJ0hiuUdzV7IZCCsy0pPDAQvDOJST2ydos Oocq/uwsdpnCTx1kLiZmp/5NNdpqV0vI6w== X-Google-Smtp-Source: ABdhPJwZkvD/5GmyBMITbbHOAWt5nEMrPYHesKQWmwCrc3aV362m1sbOjBvvCONWcMs0bkTBfjzi7A== X-Received: by 2002:adf:e90b:: with SMTP id f11mr97028wrm.364.1590088602951; Thu, 21 May 2020 12:16:42 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 26/29] target/arm: Use clear_vec_high more effectively Date: Thu, 21 May 2020 20:16:07 +0100 Message-Id: <20200521191610.10941-27-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200521191610.10941-1-peter.maydell@linaro.org> References: <20200521191610.10941-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::444; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x444.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Richard Henderson Do not explicitly store zero to the NEON high part when we can pass !is_q to clear_vec_high. Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson Message-id: 20200519212453.28494-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-a64.c | 53 +++++++++++++++++++++++--------------- 1 file changed, 32 insertions(+), 21 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 4f6edb28927..874f3eb4f97 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -900,11 +900,10 @@ static void do_fp_ld(DisasContext *s, int destidx, TC= Gv_i64 tcg_addr, int size) { /* This always zero-extends and writes to a full 128 bit wide vector */ TCGv_i64 tmplo =3D tcg_temp_new_i64(); - TCGv_i64 tmphi; + TCGv_i64 tmphi =3D NULL; =20 if (size < 4) { MemOp memop =3D s->be_data + size; - tmphi =3D tcg_const_i64(0); tcg_gen_qemu_ld_i64(tmplo, tcg_addr, get_mem_index(s), memop); } else { bool be =3D s->be_data =3D=3D MO_BE; @@ -922,12 +921,13 @@ static void do_fp_ld(DisasContext *s, int destidx, TC= Gv_i64 tcg_addr, int size) } =20 tcg_gen_st_i64(tmplo, cpu_env, fp_reg_offset(s, destidx, MO_64)); - tcg_gen_st_i64(tmphi, cpu_env, fp_reg_hi_offset(s, destidx)); - tcg_temp_free_i64(tmplo); - tcg_temp_free_i64(tmphi); =20 - clear_vec_high(s, true, destidx); + if (tmphi) { + tcg_gen_st_i64(tmphi, cpu_env, fp_reg_hi_offset(s, destidx)); + tcg_temp_free_i64(tmphi); + } + clear_vec_high(s, tmphi !=3D NULL, destidx); } =20 /* @@ -6934,7 +6934,6 @@ static void disas_simd_ext(DisasContext *s, uint32_t = insn) read_vec_element(s, tcg_resh, rm, 0, MO_64); do_ext64(s, tcg_resh, tcg_resl, pos); } - tcg_gen_movi_i64(tcg_resh, 0); } else { TCGv_i64 tcg_hh; typedef struct { @@ -6964,9 +6963,11 @@ static void disas_simd_ext(DisasContext *s, uint32_t= insn) =20 write_vec_element(s, tcg_resl, rd, 0, MO_64); tcg_temp_free_i64(tcg_resl); - write_vec_element(s, tcg_resh, rd, 1, MO_64); + if (is_q) { + write_vec_element(s, tcg_resh, rd, 1, MO_64); + } tcg_temp_free_i64(tcg_resh); - clear_vec_high(s, true, rd); + clear_vec_high(s, is_q, rd); } =20 /* TBL/TBX @@ -7003,17 +7004,21 @@ static void disas_simd_tb(DisasContext *s, uint32_t= insn) * the input. */ tcg_resl =3D tcg_temp_new_i64(); - tcg_resh =3D tcg_temp_new_i64(); + tcg_resh =3D NULL; =20 if (is_tblx) { read_vec_element(s, tcg_resl, rd, 0, MO_64); } else { tcg_gen_movi_i64(tcg_resl, 0); } - if (is_tblx && is_q) { - read_vec_element(s, tcg_resh, rd, 1, MO_64); - } else { - tcg_gen_movi_i64(tcg_resh, 0); + + if (is_q) { + tcg_resh =3D tcg_temp_new_i64(); + if (is_tblx) { + read_vec_element(s, tcg_resh, rd, 1, MO_64); + } else { + tcg_gen_movi_i64(tcg_resh, 0); + } } =20 tcg_idx =3D tcg_temp_new_i64(); @@ -7033,9 +7038,12 @@ static void disas_simd_tb(DisasContext *s, uint32_t = insn) =20 write_vec_element(s, tcg_resl, rd, 0, MO_64); tcg_temp_free_i64(tcg_resl); - write_vec_element(s, tcg_resh, rd, 1, MO_64); - tcg_temp_free_i64(tcg_resh); - clear_vec_high(s, true, rd); + + if (is_q) { + write_vec_element(s, tcg_resh, rd, 1, MO_64); + tcg_temp_free_i64(tcg_resh); + } + clear_vec_high(s, is_q, rd); } =20 /* ZIP/UZP/TRN @@ -7072,7 +7080,7 @@ static void disas_simd_zip_trn(DisasContext *s, uint3= 2_t insn) } =20 tcg_resl =3D tcg_const_i64(0); - tcg_resh =3D tcg_const_i64(0); + tcg_resh =3D is_q ? tcg_const_i64(0) : NULL; tcg_res =3D tcg_temp_new_i64(); =20 for (i =3D 0; i < elements; i++) { @@ -7123,9 +7131,12 @@ static void disas_simd_zip_trn(DisasContext *s, uint= 32_t insn) =20 write_vec_element(s, tcg_resl, rd, 0, MO_64); tcg_temp_free_i64(tcg_resl); - write_vec_element(s, tcg_resh, rd, 1, MO_64); - tcg_temp_free_i64(tcg_resh); - clear_vec_high(s, true, rd); + + if (is_q) { + write_vec_element(s, tcg_resh, rd, 1, MO_64); + tcg_temp_free_i64(tcg_resh); + } + clear_vec_high(s, is_q, rd); } =20 /* --=20 2.20.1