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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Instead of open-coding it. While at it, make sure that all accesses to the list are performed while holding the list's lock. Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- cpus-common.c | 25 ++++++++----------------- cpus.c | 14 ++++++++++++-- hw/core/cpu.c | 1 + include/hw/core/cpu.h | 6 +++--- 4 files changed, 24 insertions(+), 22 deletions(-) diff --git a/cpus-common.c b/cpus-common.c index 55d5df8923..210fc7fc39 100644 --- a/cpus-common.c +++ b/cpus-common.c @@ -97,7 +97,7 @@ void cpu_list_remove(CPUState *cpu) } =20 struct qemu_work_item { - struct qemu_work_item *next; + QSIMPLEQ_ENTRY(qemu_work_item) node; run_on_cpu_func func; run_on_cpu_data data; bool free, exclusive, done; @@ -106,13 +106,7 @@ struct qemu_work_item { static void queue_work_on_cpu(CPUState *cpu, struct qemu_work_item *wi) { qemu_mutex_lock(&cpu->work_mutex); - if (cpu->queued_work_first =3D=3D NULL) { - cpu->queued_work_first =3D wi; - } else { - cpu->queued_work_last->next =3D wi; - } - cpu->queued_work_last =3D wi; - wi->next =3D NULL; + QSIMPLEQ_INSERT_TAIL(&cpu->work_list, wi, node); wi->done =3D false; qemu_mutex_unlock(&cpu->work_mutex); =20 @@ -306,17 +300,14 @@ void process_queued_cpu_work(CPUState *cpu) { struct qemu_work_item *wi; =20 - if (cpu->queued_work_first =3D=3D NULL) { + qemu_mutex_lock(&cpu->work_mutex); + if (QSIMPLEQ_EMPTY(&cpu->work_list)) { + qemu_mutex_unlock(&cpu->work_mutex); return; } - - qemu_mutex_lock(&cpu->work_mutex); - while (cpu->queued_work_first !=3D NULL) { - wi =3D cpu->queued_work_first; - cpu->queued_work_first =3D wi->next; - if (!cpu->queued_work_first) { - cpu->queued_work_last =3D NULL; - } + while (!QSIMPLEQ_EMPTY(&cpu->work_list)) { + wi =3D QSIMPLEQ_FIRST(&cpu->work_list); + QSIMPLEQ_REMOVE_HEAD(&cpu->work_list, node); qemu_mutex_unlock(&cpu->work_mutex); if (wi->exclusive) { /* Running work items outside the BQL avoids the following dea= dlock: diff --git a/cpus.c b/cpus.c index 5670c96bcf..af44027549 100644 --- a/cpus.c +++ b/cpus.c @@ -97,9 +97,19 @@ bool cpu_is_stopped(CPUState *cpu) return cpu->stopped || !runstate_is_running(); } =20 +static inline bool cpu_work_list_empty(CPUState *cpu) +{ + bool ret; + + qemu_mutex_lock(&cpu->work_mutex); + ret =3D QSIMPLEQ_EMPTY(&cpu->work_list); + qemu_mutex_unlock(&cpu->work_mutex); + return ret; +} + static bool cpu_thread_is_idle(CPUState *cpu) { - if (cpu->stop || cpu->queued_work_first) { + if (cpu->stop || !cpu_work_list_empty(cpu)) { return false; } if (cpu_is_stopped(cpu)) { @@ -1498,7 +1508,7 @@ static void *qemu_tcg_rr_cpu_thread_fn(void *arg) cpu =3D first_cpu; } =20 - while (cpu && !cpu->queued_work_first && !cpu->exit_request) { + while (cpu && cpu_work_list_empty(cpu) && !cpu->exit_request) { =20 atomic_mb_set(&tcg_current_rr_cpu, cpu); current_cpu =3D cpu; diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 5284d384fb..77703d62b7 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -368,6 +368,7 @@ static void cpu_common_initfn(Object *obj) cpu->nr_threads =3D 1; =20 qemu_mutex_init(&cpu->work_mutex); + QSIMPLEQ_INIT(&cpu->work_list); QTAILQ_INIT(&cpu->breakpoints); QTAILQ_INIT(&cpu->watchpoints); =20 diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 07f7698155..d78ff1d165 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -331,8 +331,8 @@ struct qemu_work_item; * @opaque: User data. * @mem_io_pc: Host Program Counter at which the memory was accessed. * @kvm_fd: vCPU file descriptor for KVM. - * @work_mutex: Lock to prevent multiple access to queued_work_*. - * @queued_work_first: First asynchronous work pending. + * @work_mutex: Lock to prevent multiple access to @work_list. + * @work_list: List of pending asynchronous work. * @trace_dstate_delayed: Delayed changes to trace_dstate (includes all ch= anges * to @trace_dstate). * @trace_dstate: Dynamic tracing state of events for this vCPU (bitmask). @@ -376,7 +376,7 @@ struct CPUState { sigjmp_buf jmp_env; =20 QemuMutex work_mutex; - struct qemu_work_item *queued_work_first, *queued_work_last; + QSIMPLEQ_HEAD(, qemu_work_item) work_list; =20 CPUAddressSpace *cpu_ases; int num_ases; --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 21 May 2020 09:43:16 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 02/74] cpu: rename cpu->work_mutex to cpu->lock Date: Thu, 21 May 2020 12:38:59 -0400 Message-Id: <20200521164011.638-3-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::742; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x742.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" This lock will soon protect more fields of the struct. Give it a more appropriate name. Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- cpus-common.c | 14 +++++++------- cpus.c | 4 ++-- hw/core/cpu.c | 4 ++-- include/hw/core/cpu.h | 6 ++++-- 4 files changed, 15 insertions(+), 13 deletions(-) diff --git a/cpus-common.c b/cpus-common.c index 210fc7fc39..34025923e3 100644 --- a/cpus-common.c +++ b/cpus-common.c @@ -105,10 +105,10 @@ struct qemu_work_item { =20 static void queue_work_on_cpu(CPUState *cpu, struct qemu_work_item *wi) { - qemu_mutex_lock(&cpu->work_mutex); + qemu_mutex_lock(&cpu->lock); QSIMPLEQ_INSERT_TAIL(&cpu->work_list, wi, node); wi->done =3D false; - qemu_mutex_unlock(&cpu->work_mutex); + qemu_mutex_unlock(&cpu->lock); =20 qemu_cpu_kick(cpu); } @@ -300,15 +300,15 @@ void process_queued_cpu_work(CPUState *cpu) { struct qemu_work_item *wi; =20 - qemu_mutex_lock(&cpu->work_mutex); + qemu_mutex_lock(&cpu->lock); if (QSIMPLEQ_EMPTY(&cpu->work_list)) { - qemu_mutex_unlock(&cpu->work_mutex); + qemu_mutex_unlock(&cpu->lock); return; } while (!QSIMPLEQ_EMPTY(&cpu->work_list)) { wi =3D QSIMPLEQ_FIRST(&cpu->work_list); QSIMPLEQ_REMOVE_HEAD(&cpu->work_list, node); - qemu_mutex_unlock(&cpu->work_mutex); + qemu_mutex_unlock(&cpu->lock); if (wi->exclusive) { /* Running work items outside the BQL avoids the following dea= dlock: * 1) start_exclusive() is called with the BQL taken while ano= ther @@ -324,13 +324,13 @@ void process_queued_cpu_work(CPUState *cpu) } else { wi->func(cpu, wi->data); } - qemu_mutex_lock(&cpu->work_mutex); + qemu_mutex_lock(&cpu->lock); if (wi->free) { g_free(wi); } else { atomic_mb_set(&wi->done, true); } } - qemu_mutex_unlock(&cpu->work_mutex); + qemu_mutex_unlock(&cpu->lock); qemu_cond_broadcast(&qemu_work_cond); } diff --git a/cpus.c b/cpus.c index af44027549..77a2d7b7cf 100644 --- a/cpus.c +++ b/cpus.c @@ -101,9 +101,9 @@ static inline bool cpu_work_list_empty(CPUState *cpu) { bool ret; =20 - qemu_mutex_lock(&cpu->work_mutex); + qemu_mutex_lock(&cpu->lock); ret =3D QSIMPLEQ_EMPTY(&cpu->work_list); - qemu_mutex_unlock(&cpu->work_mutex); + qemu_mutex_unlock(&cpu->lock); return ret; } =20 diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 77703d62b7..4d58399cfc 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -367,7 +367,7 @@ static void cpu_common_initfn(Object *obj) cpu->nr_cores =3D 1; cpu->nr_threads =3D 1; =20 - qemu_mutex_init(&cpu->work_mutex); + qemu_mutex_init(&cpu->lock); QSIMPLEQ_INIT(&cpu->work_list); QTAILQ_INIT(&cpu->breakpoints); QTAILQ_INIT(&cpu->watchpoints); @@ -379,7 +379,7 @@ static void cpu_common_finalize(Object *obj) { CPUState *cpu =3D CPU(obj); =20 - qemu_mutex_destroy(&cpu->work_mutex); + qemu_mutex_destroy(&cpu->lock); } =20 static int64_t cpu_common_get_arch_id(CPUState *cpu) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index d78ff1d165..873bf23a39 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -331,7 +331,8 @@ struct qemu_work_item; * @opaque: User data. * @mem_io_pc: Host Program Counter at which the memory was accessed. * @kvm_fd: vCPU file descriptor for KVM. - * @work_mutex: Lock to prevent multiple access to @work_list. + * @lock: Lock to prevent multiple access to per-CPU fields. Must be acqui= red + * after the BQL. * @work_list: List of pending asynchronous work. * @trace_dstate_delayed: Delayed changes to trace_dstate (includes all ch= anges * to @trace_dstate). @@ -375,7 +376,8 @@ struct CPUState { uint64_t random_seed; sigjmp_buf jmp_env; =20 - QemuMutex work_mutex; + QemuMutex lock; + /* fields below protected by @lock */ QSIMPLEQ_HEAD(, qemu_work_item) work_list; =20 CPUAddressSpace *cpu_ases; --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590079582; cv=none; d=zohomail.com; s=zohoarc; b=W4NpGXKPz0/X0WrUOeMvKFkOdzRMGzweRRvRLuVvhAEtXiEXWil8Cs+oRXyQSmKAEmoiUdXL62LhMFf0Uj3/uEDiAi58KA/4wI29vWCRZC+xcN3qfpRkIz+RVyM70UNY0ru8T0iXqZhI4o1pQp5O6EpeqjxV0d+Lzw2qys6B6xY= ARC-Message-Signature: i=1; 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Thu, 21 May 2020 09:43:17 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 03/74] cpu: introduce cpu_mutex_lock/unlock Date: Thu, 21 May 2020 12:39:00 -0400 Message-Id: <20200521164011.638-4-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::844; envelope-from=robert.foley@linaro.org; helo=mail-qt1-x844.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Emilio G. Cota" The few direct users of &cpu->lock will be converted soon. The per-thread bitmap introduced here might seem unnecessary, since a bool could just do. However, once we complete the conversion to per-vCPU locks, we will need to cover the use case where all vCPUs are locked by the same thread, which explains why the bitmap is introduced here. Reviewed-by: Richard Henderson Signed-off-by: Emilio G. Cota [RF: Add assert in smp_parse. Make cpu_mutex_lock stub empty] Signed-off-by: Robert Foley --- cpus.c | 45 +++++++++++++++++++++++++++++++++++++++++-- hw/core/machine.c | 1 + include/hw/core/cpu.h | 36 ++++++++++++++++++++++++++++++++++ stubs/Makefile.objs | 1 + stubs/cpu-lock.c | 20 +++++++++++++++++++ 5 files changed, 101 insertions(+), 2 deletions(-) create mode 100644 stubs/cpu-lock.c diff --git a/cpus.c b/cpus.c index 77a2d7b7cf..c2da430221 100644 --- a/cpus.c +++ b/cpus.c @@ -92,6 +92,44 @@ static unsigned int throttle_percentage; #define CPU_THROTTLE_PCT_MAX 99 #define CPU_THROTTLE_TIMESLICE_NS 10000000 =20 +/* + * Note: we index the bitmap with cpu->cpu_index + 1 so that the logic + * also works during early CPU initialization, when cpu->cpu_index is set = to + * UNASSIGNED_CPU_INDEX =3D=3D -1. + */ +static __thread DECLARE_BITMAP(cpu_lock_bitmap, CPU_LOCK_BITMAP_SIZE); + +bool no_cpu_mutex_locked(void) +{ + return bitmap_empty(cpu_lock_bitmap, CPU_LOCK_BITMAP_SIZE); +} + +void cpu_mutex_lock_impl(CPUState *cpu, const char *file, int line) +{ +/* coverity gets confused by the indirect function call */ +#ifdef __COVERITY__ + qemu_mutex_lock_impl(&cpu->lock, file, line); +#else + QemuMutexLockFunc f =3D atomic_read(&qemu_mutex_lock_func); + + g_assert(!cpu_mutex_locked(cpu)); + set_bit(cpu->cpu_index + 1, cpu_lock_bitmap); + f(&cpu->lock, file, line); +#endif +} + +void cpu_mutex_unlock_impl(CPUState *cpu, const char *file, int line) +{ + g_assert(cpu_mutex_locked(cpu)); + qemu_mutex_unlock_impl(&cpu->lock, file, line); + clear_bit(cpu->cpu_index + 1, cpu_lock_bitmap); +} + +bool cpu_mutex_locked(const CPUState *cpu) +{ + return test_bit(cpu->cpu_index + 1, cpu_lock_bitmap); +} + bool cpu_is_stopped(CPUState *cpu) { return cpu->stopped || !runstate_is_running(); @@ -101,9 +139,9 @@ static inline bool cpu_work_list_empty(CPUState *cpu) { bool ret; =20 - qemu_mutex_lock(&cpu->lock); + cpu_mutex_lock(cpu); ret =3D QSIMPLEQ_EMPTY(&cpu->work_list); - qemu_mutex_unlock(&cpu->lock); + cpu_mutex_unlock(cpu); return ret; } =20 @@ -1845,6 +1883,9 @@ void qemu_mutex_lock_iothread_impl(const char *file, = int line) { QemuMutexLockFunc bql_lock =3D atomic_read(&qemu_bql_mutex_lock_func); =20 + /* enforce locking order */ + g_assert(no_cpu_mutex_locked()); + g_assert(!qemu_mutex_iothread_locked()); bql_lock(&qemu_global_mutex, file, line); iothread_locked =3D true; diff --git a/hw/core/machine.c b/hw/core/machine.c index bb3a7b18b1..03a9081f55 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -763,6 +763,7 @@ static void smp_parse(MachineState *ms, QemuOpts *opts) ms->smp.threads =3D threads; ms->smp.sockets =3D sockets; } + assert(ms->smp.max_cpus <=3D CPU_LOCK_BITMAP_SIZE); =20 if (ms->smp.cpus > 1) { Error *blocker =3D NULL; diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 873bf23a39..2912d9a7c1 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -457,6 +457,39 @@ extern CPUTailQ cpus; =20 extern __thread CPUState *current_cpu; =20 +/** + * cpu_mutex_lock - lock a CPU's mutex + * @cpu: the CPU whose mutex is to be locked + * + * To avoid deadlock, a CPU's mutex must be acquired after the BQL. + */ +#define cpu_mutex_lock(cpu) \ + cpu_mutex_lock_impl(cpu, __FILE__, __LINE__) +void cpu_mutex_lock_impl(CPUState *cpu, const char *file, int line); + +/** + * cpu_mutex_unlock - unlock a CPU's mutex + * @cpu: the CPU whose mutex is to be unlocked + */ +#define cpu_mutex_unlock(cpu) \ + cpu_mutex_unlock_impl(cpu, __FILE__, __LINE__) +void cpu_mutex_unlock_impl(CPUState *cpu, const char *file, int line); + +/** + * cpu_mutex_locked - check whether a CPU's mutex is locked + * @cpu: the CPU of interest + * + * Returns true if the calling thread is currently holding the CPU's mutex. + */ +bool cpu_mutex_locked(const CPUState *cpu); + +/** + * no_cpu_mutex_locked - check whether any CPU mutex is held + * + * Returns true if the calling thread is not holding any CPU mutex. + */ +bool no_cpu_mutex_locked(void); + static inline void cpu_tb_jmp_cache_clear(CPUState *cpu) { unsigned int i; @@ -1179,4 +1212,7 @@ extern const VMStateDescription vmstate_cpu_common; #define UNASSIGNED_CPU_INDEX -1 #define UNASSIGNED_CLUSTER_INDEX -1 =20 +/* XXX: is this really the max number of CPUs? */ +#define CPU_LOCK_BITMAP_SIZE 2048 + #endif diff --git a/stubs/Makefile.objs b/stubs/Makefile.objs index 45be5dc0ed..d2dd6c94cc 100644 --- a/stubs/Makefile.objs +++ b/stubs/Makefile.objs @@ -5,6 +5,7 @@ stub-obj-y +=3D blockdev-close-all-bdrv-states.o stub-obj-y +=3D clock-warp.o stub-obj-y +=3D cpu-get-clock.o stub-obj-y +=3D cpu-get-icount.o +stub-obj-y +=3D cpu-lock.o stub-obj-y +=3D dump.o stub-obj-y +=3D error-printf.o stub-obj-y +=3D fdset.o diff --git a/stubs/cpu-lock.c b/stubs/cpu-lock.c new file mode 100644 index 0000000000..1981a00fb3 --- /dev/null +++ b/stubs/cpu-lock.c @@ -0,0 +1,20 @@ +#include "qemu/osdep.h" +#include "hw/core/cpu.h" + +void cpu_mutex_lock_impl(CPUState *cpu, const char *file, int line) +{ +} + +void cpu_mutex_unlock_impl(CPUState *cpu, const char *file, int line) +{ +} + +bool cpu_mutex_locked(const CPUState *cpu) +{ + return true; +} + +bool no_cpu_mutex_locked(void) +{ + return true; +} --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590079607; cv=none; d=zohomail.com; s=zohoarc; b=mdcUwbvtqvMMyBndMQZTxSSl1lJocSuq9a9u+YrxuHCDMQ1E/Bj8atQl/CFGCEd0bsx8Jd1W0uySzfc0gBaHOCvdnfaYMn3BhzY8OczH72PyFRxUj7cpGCNo9/bdXho2FYAJlmwvHy5l21hnG3mT+V6CdifQh/MBpImMrPOcO48= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1590079607; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=niJOK+gFFfbZ7oCXJZeMjKiL+kdF4g0cKXPQfbfeKkw=; b=A4Nrzaa1DfNBBVn6i62enWMdGf3UU9yBlqYzwa0BOvPB1JGpr2lSRp0/eHhcYxGZuVE8MfDg+ZsEiGcrHZuF8DDNN7Gt0u4U3NIEZzDTAGb3liz/XlpKxQFQMz9ouD7Oaij4SoKXtcRQ0CfB5ZHM+4TDuFaZFEMKrUmwTsOETrU= ARC-Authentication-Results: i=1; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" This eliminates the need to use the BQL to queue CPU work. While at it, give the per-cpu field a generic name ("cond") since it will soon be used for more than just queueing CPU work. Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- cpus-common.c | 72 ++++++++++++++++++++++++++++++++++--------- cpus.c | 2 +- hw/core/cpu.c | 1 + include/hw/core/cpu.h | 6 ++-- 4 files changed, 63 insertions(+), 18 deletions(-) diff --git a/cpus-common.c b/cpus-common.c index 34025923e3..4db4e0026f 100644 --- a/cpus-common.c +++ b/cpus-common.c @@ -27,7 +27,6 @@ static QemuMutex qemu_cpu_list_lock; static QemuCond exclusive_cond; static QemuCond exclusive_resume; -static QemuCond qemu_work_cond; =20 /* >=3D 1 if a thread is inside start_exclusive/end_exclusive. Written * under qemu_cpu_list_lock, read with atomic operations. @@ -43,7 +42,6 @@ void qemu_init_cpu_list(void) qemu_mutex_init(&qemu_cpu_list_lock); qemu_cond_init(&exclusive_cond); qemu_cond_init(&exclusive_resume); - qemu_cond_init(&qemu_work_cond); } =20 void cpu_list_lock(void) @@ -103,23 +101,37 @@ struct qemu_work_item { bool free, exclusive, done; }; =20 -static void queue_work_on_cpu(CPUState *cpu, struct qemu_work_item *wi) +/* Called with the CPU's lock held */ +static void queue_work_on_cpu_locked(CPUState *cpu, struct qemu_work_item = *wi) { - qemu_mutex_lock(&cpu->lock); QSIMPLEQ_INSERT_TAIL(&cpu->work_list, wi, node); wi->done =3D false; - qemu_mutex_unlock(&cpu->lock); =20 qemu_cpu_kick(cpu); } =20 -void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data da= ta, - QemuMutex *mutex) +static void queue_work_on_cpu(CPUState *cpu, struct qemu_work_item *wi) +{ + cpu_mutex_lock(cpu); + queue_work_on_cpu_locked(cpu, wi); + cpu_mutex_unlock(cpu); +} + +void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data da= ta) { struct qemu_work_item wi; + bool has_bql =3D qemu_mutex_iothread_locked(); + + g_assert(no_cpu_mutex_locked()); =20 if (qemu_cpu_is_self(cpu)) { - func(cpu, data); + if (has_bql) { + func(cpu, data); + } else { + qemu_mutex_lock_iothread(); + func(cpu, data); + qemu_mutex_unlock_iothread(); + } return; } =20 @@ -129,13 +141,34 @@ void do_run_on_cpu(CPUState *cpu, run_on_cpu_func fun= c, run_on_cpu_data data, wi.free =3D false; wi.exclusive =3D false; =20 - queue_work_on_cpu(cpu, &wi); + cpu_mutex_lock(cpu); + queue_work_on_cpu_locked(cpu, &wi); + + /* + * We are going to sleep on the CPU lock, so release the BQL. + * + * During the transition to per-CPU locks, we release the BQL _after_ + * having kicked the destination CPU (from queue_work_on_cpu_locked ab= ove). + * This makes sure that the enqueued work will be seen by the CPU + * after being woken up from the kick, since the CPU sleeps on the BQL. + * Once we complete the transition to per-CPU locks, we will release + * the BQL earlier in this function. + */ + if (has_bql) { + qemu_mutex_unlock_iothread(); + } + while (!atomic_mb_read(&wi.done)) { CPUState *self_cpu =3D current_cpu; =20 - qemu_cond_wait(&qemu_work_cond, mutex); + qemu_cond_wait(&cpu->cond, &cpu->lock); current_cpu =3D self_cpu; } + cpu_mutex_unlock(cpu); + + if (has_bql) { + qemu_mutex_lock_iothread(); + } } =20 void async_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data= data) @@ -299,6 +332,7 @@ void async_safe_run_on_cpu(CPUState *cpu, run_on_cpu_fu= nc func, void process_queued_cpu_work(CPUState *cpu) { struct qemu_work_item *wi; + bool has_bql =3D qemu_mutex_iothread_locked(); =20 qemu_mutex_lock(&cpu->lock); if (QSIMPLEQ_EMPTY(&cpu->work_list)) { @@ -316,13 +350,23 @@ void process_queued_cpu_work(CPUState *cpu) * BQL, so it goes to sleep; start_exclusive() is sleeping too= , so * neither CPU can proceed. */ - qemu_mutex_unlock_iothread(); + if (has_bql) { + qemu_mutex_unlock_iothread(); + } start_exclusive(); wi->func(cpu, wi->data); end_exclusive(); - qemu_mutex_lock_iothread(); + if (has_bql) { + qemu_mutex_lock_iothread(); + } } else { - wi->func(cpu, wi->data); + if (has_bql) { + wi->func(cpu, wi->data); + } else { + qemu_mutex_lock_iothread(); + wi->func(cpu, wi->data); + qemu_mutex_unlock_iothread(); + } } qemu_mutex_lock(&cpu->lock); if (wi->free) { @@ -332,5 +376,5 @@ void process_queued_cpu_work(CPUState *cpu) } } qemu_mutex_unlock(&cpu->lock); - qemu_cond_broadcast(&qemu_work_cond); + qemu_cond_broadcast(&cpu->cond); } diff --git a/cpus.c b/cpus.c index c2da430221..e57e8fe669 100644 --- a/cpus.c +++ b/cpus.c @@ -1196,7 +1196,7 @@ void qemu_init_cpu_loop(void) =20 void run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data) { - do_run_on_cpu(cpu, func, data, &qemu_global_mutex); + do_run_on_cpu(cpu, func, data); } =20 static void qemu_kvm_destroy_vcpu(CPUState *cpu) diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 4d58399cfc..9b9d4296f9 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -368,6 +368,7 @@ static void cpu_common_initfn(Object *obj) cpu->nr_threads =3D 1; =20 qemu_mutex_init(&cpu->lock); + qemu_cond_init(&cpu->cond); QSIMPLEQ_INIT(&cpu->work_list); QTAILQ_INIT(&cpu->breakpoints); QTAILQ_INIT(&cpu->watchpoints); diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 2912d9a7c1..d8b81db262 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -333,6 +333,7 @@ struct qemu_work_item; * @kvm_fd: vCPU file descriptor for KVM. * @lock: Lock to prevent multiple access to per-CPU fields. Must be acqui= red * after the BQL. + * @cond: Condition variable for per-CPU events. * @work_list: List of pending asynchronous work. * @trace_dstate_delayed: Delayed changes to trace_dstate (includes all ch= anges * to @trace_dstate). @@ -378,6 +379,7 @@ struct CPUState { =20 QemuMutex lock; /* fields below protected by @lock */ + QemuCond cond; QSIMPLEQ_HEAD(, qemu_work_item) work_list; =20 CPUAddressSpace *cpu_ases; @@ -769,12 +771,10 @@ bool cpu_is_stopped(CPUState *cpu); * @cpu: The vCPU to run on. * @func: The function to be executed. * @data: Data to pass to the function. - * @mutex: Mutex to release while waiting for @func to run. * * Used internally in the implementation of run_on_cpu. */ -void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data da= ta, - QemuMutex *mutex); +void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data da= ta); =20 /** * run_on_cpu: --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" We don't pass a pointer to qemu_global_mutex anymore. Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- cpus-common.c | 2 +- cpus.c | 5 ----- include/hw/core/cpu.h | 10 ---------- 3 files changed, 1 insertion(+), 16 deletions(-) diff --git a/cpus-common.c b/cpus-common.c index 4db4e0026f..907ba5f0fc 100644 --- a/cpus-common.c +++ b/cpus-common.c @@ -117,7 +117,7 @@ static void queue_work_on_cpu(CPUState *cpu, struct qem= u_work_item *wi) cpu_mutex_unlock(cpu); } =20 -void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data da= ta) +void run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data) { struct qemu_work_item wi; bool has_bql =3D qemu_mutex_iothread_locked(); diff --git a/cpus.c b/cpus.c index e57e8fe669..935fff6e4e 100644 --- a/cpus.c +++ b/cpus.c @@ -1194,11 +1194,6 @@ void qemu_init_cpu_loop(void) qemu_thread_get_self(&io_thread); } =20 -void run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data) -{ - do_run_on_cpu(cpu, func, data); -} - static void qemu_kvm_destroy_vcpu(CPUState *cpu) { if (kvm_destroy_vcpu(cpu) < 0) { diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index d8b81db262..fe79777502 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -766,16 +766,6 @@ void qemu_cpu_kick(CPUState *cpu); */ bool cpu_is_stopped(CPUState *cpu); =20 -/** - * do_run_on_cpu: - * @cpu: The vCPU to run on. - * @func: The function to be executed. - * @data: Data to pass to the function. - * - * Used internally in the implementation of run_on_cpu. - */ -void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data da= ta); - /** * run_on_cpu: * @cpu: The vCPU to run on. --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590079479; cv=none; d=zohomail.com; s=zohoarc; b=FIDKZBoOLHwmORmReGPP+5xsbpw9YHVHnw9Npg3+OCkfydGsEq085OYZP695iA+DucGQ9s7vEpurSXTr285ZTWnSCgcObxGd5BRMWyMo/ql9bkkqOd4t+s7bTb8mQ3CVBZtEbcMlwh3wqJRq3bjsb8dp44WwlFPB+UnP3lFc374= ARC-Message-Signature: i=1; a=rsa-sha256; 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Thu, 21 May 2020 09:43:21 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 06/74] cpu: introduce process_queued_cpu_work_locked Date: Thu, 21 May 2020 12:39:03 -0400 Message-Id: <20200521164011.638-7-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::742; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x742.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" This completes the conversion to cpu_mutex_lock/unlock in the file. Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- cpus-common.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/cpus-common.c b/cpus-common.c index 907ba5f0fc..e2f609c8e2 100644 --- a/cpus-common.c +++ b/cpus-common.c @@ -329,20 +329,19 @@ void async_safe_run_on_cpu(CPUState *cpu, run_on_cpu_= func func, queue_work_on_cpu(cpu, wi); } =20 -void process_queued_cpu_work(CPUState *cpu) +/* Called with the CPU's lock held */ +static void process_queued_cpu_work_locked(CPUState *cpu) { struct qemu_work_item *wi; bool has_bql =3D qemu_mutex_iothread_locked(); =20 - qemu_mutex_lock(&cpu->lock); if (QSIMPLEQ_EMPTY(&cpu->work_list)) { - qemu_mutex_unlock(&cpu->lock); return; } while (!QSIMPLEQ_EMPTY(&cpu->work_list)) { wi =3D QSIMPLEQ_FIRST(&cpu->work_list); QSIMPLEQ_REMOVE_HEAD(&cpu->work_list, node); - qemu_mutex_unlock(&cpu->lock); + cpu_mutex_unlock(cpu); if (wi->exclusive) { /* Running work items outside the BQL avoids the following dea= dlock: * 1) start_exclusive() is called with the BQL taken while ano= ther @@ -368,13 +367,19 @@ void process_queued_cpu_work(CPUState *cpu) qemu_mutex_unlock_iothread(); } } - qemu_mutex_lock(&cpu->lock); + cpu_mutex_lock(cpu); if (wi->free) { g_free(wi); } else { atomic_mb_set(&wi->done, true); } } - qemu_mutex_unlock(&cpu->lock); qemu_cond_broadcast(&cpu->cond); } + +void process_queued_cpu_work(CPUState *cpu) +{ + cpu_mutex_lock(cpu); + process_queued_cpu_work_locked(cpu); + cpu_mutex_unlock(cpu); +} --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590079587; cv=none; d=zohomail.com; s=zohoarc; b=GArYxi+WVGKI0hKiF8lObV2lzEAozhjw4zhyv3JmSVbGQfFIcRO4n/OLMPXsE3CeocpUSBBP3zQRAm0HzBpzpktIlwA0JhB7xZdL9KoGsHiHZoaI8VDb+vdOqfs5z1+GsiUbA78lTPbh6vtxIBlun8mgHWEV+BLCF7TpY/Z6VG4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; 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Thu, 21 May 2020 09:43:23 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 07/74] cpu: make per-CPU locks an alias of the BQL in TCG rr mode Date: Thu, 21 May 2020 12:39:04 -0400 Message-Id: <20200521164011.638-8-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::844; envelope-from=robert.foley@linaro.org; helo=mail-qt1-x844.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Before we can switch from the BQL to per-CPU locks in the CPU loop, we have to accommodate the fact that TCG rr mode (i.e. !MTTCG) cannot work with separate per-vCPU locks. That would lead to deadlock since we need a single lock/condvar pair on which to wait for events that affect any vCPU, e.g. in qemu_tcg_rr_wait_io_event. At the same time, we are moving towards an interface where the BQL and CPU locks are independent, and the only requirement is that the locking order is respected, i.e. the BQL is acquired first if both locks have to be held at the same time. In this patch we make the BQL a recursive lock under the hood. This allows us to (1) keep the BQL and CPU locks interfaces separate, and (2) use a single lock for all vCPUs in TCG rr mode. Note that the BQL's API (qemu_mutex_lock/unlock_iothread) remains non-recursive. Added cpu_mutex_destroy, and call from cpu_common_finalize, to avoid destroying qemu_global_mutex, when cpu mutex is destroyed. Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson Signed-off-by: Emilio G. Cota [RF: Fixed destroy issue, added cpu_mutex_destroy.] Signed-off-by: Robert Foley --- cpus-common.c | 2 +- cpus.c | 101 ++++++++++++++++++++++++++++++++++++++---- hw/core/cpu.c | 5 ++- include/hw/core/cpu.h | 8 +++- stubs/cpu-lock.c | 7 +++ 5 files changed, 110 insertions(+), 13 deletions(-) diff --git a/cpus-common.c b/cpus-common.c index e2f609c8e2..d418eb5aef 100644 --- a/cpus-common.c +++ b/cpus-common.c @@ -161,7 +161,7 @@ void run_on_cpu(CPUState *cpu, run_on_cpu_func func, ru= n_on_cpu_data data) while (!atomic_mb_read(&wi.done)) { CPUState *self_cpu =3D current_cpu; =20 - qemu_cond_wait(&cpu->cond, &cpu->lock); + qemu_cond_wait(&cpu->cond, cpu->lock); current_cpu =3D self_cpu; } cpu_mutex_unlock(cpu); diff --git a/cpus.c b/cpus.c index 935fff6e4e..9cc5f4767e 100644 --- a/cpus.c +++ b/cpus.c @@ -92,6 +92,12 @@ static unsigned int throttle_percentage; #define CPU_THROTTLE_PCT_MAX 99 #define CPU_THROTTLE_TIMESLICE_NS 10000000 =20 +static inline bool qemu_is_tcg_rr(void) +{ + /* in `make check-qtest', "use_icount && !tcg_enabled()" might be true= */ + return use_icount || (tcg_enabled() && !qemu_tcg_mttcg_enabled()); +} + /* * Note: we index the bitmap with cpu->cpu_index + 1 so that the logic * also works during early CPU initialization, when cpu->cpu_index is set = to @@ -104,25 +110,75 @@ bool no_cpu_mutex_locked(void) return bitmap_empty(cpu_lock_bitmap, CPU_LOCK_BITMAP_SIZE); } =20 -void cpu_mutex_lock_impl(CPUState *cpu, const char *file, int line) +static __thread bool iothread_locked; +/* + * In TCG rr mode, we make the BQL a recursive mutex, so that we can use i= t for + * all vCPUs while keeping the interface as if the locks were per-CPU. + * + * The fact that the BQL is implemented recursively is invisible to BQL us= ers; + * the mutex API we export (qemu_mutex_lock_iothread() etc.) is non-recurs= ive. + * + * Locking order: the BQL is always acquired before CPU locks. + */ +static __thread int iothread_lock_count; + +static void rr_cpu_mutex_lock(void) { -/* coverity gets confused by the indirect function call */ + if (iothread_lock_count++ =3D=3D 0) { + /* + * Circumvent qemu_mutex_lock_iothread()'s state keeping by + * acquiring the BQL directly. + */ + qemu_mutex_lock(&qemu_global_mutex); + } +} + +static void rr_cpu_mutex_unlock(void) +{ + g_assert(iothread_lock_count > 0); + if (--iothread_lock_count =3D=3D 0) { + /* + * Circumvent qemu_mutex_unlock_iothread()'s state keeping by + * releasing the BQL directly. + */ + qemu_mutex_unlock(&qemu_global_mutex); + } +} + +static void do_cpu_mutex_lock(CPUState *cpu, const char *file, int line) +{ + /* coverity gets confused by the indirect function call */ #ifdef __COVERITY__ - qemu_mutex_lock_impl(&cpu->lock, file, line); + qemu_mutex_lock_impl(cpu->lock, file, line); #else QemuMutexLockFunc f =3D atomic_read(&qemu_mutex_lock_func); =20 + f(cpu->lock, file, line); +#endif +} + +void cpu_mutex_lock_impl(CPUState *cpu, const char *file, int line) +{ g_assert(!cpu_mutex_locked(cpu)); set_bit(cpu->cpu_index + 1, cpu_lock_bitmap); - f(&cpu->lock, file, line); -#endif + + if (qemu_is_tcg_rr()) { + rr_cpu_mutex_lock(); + } else { + do_cpu_mutex_lock(cpu, file, line); + } } =20 void cpu_mutex_unlock_impl(CPUState *cpu, const char *file, int line) { g_assert(cpu_mutex_locked(cpu)); - qemu_mutex_unlock_impl(&cpu->lock, file, line); clear_bit(cpu->cpu_index + 1, cpu_lock_bitmap); + + if (qemu_is_tcg_rr()) { + rr_cpu_mutex_unlock(); + return; + } + qemu_mutex_unlock_impl(cpu->lock, file, line); } =20 bool cpu_mutex_locked(const CPUState *cpu) @@ -130,6 +186,20 @@ bool cpu_mutex_locked(const CPUState *cpu) return test_bit(cpu->cpu_index + 1, cpu_lock_bitmap); } =20 +void cpu_mutex_destroy(CPUState *cpu) +{ + /* + * In TCG RR, cpu->lock is the BQL under the hood. In all other modes, + * cpu->lock is a standalone per-CPU lock. + */ + if (qemu_is_tcg_rr()) { + cpu->lock =3D NULL; + } else { + qemu_mutex_destroy(cpu->lock); + g_free(cpu->lock); + } +} + bool cpu_is_stopped(CPUState *cpu) { return cpu->stopped || !runstate_is_running(); @@ -1863,8 +1933,6 @@ bool qemu_in_vcpu_thread(void) return current_cpu && qemu_cpu_is_self(current_cpu); } =20 -static __thread bool iothread_locked =3D false; - bool qemu_mutex_iothread_locked(void) { return iothread_locked; @@ -1883,6 +1951,8 @@ void qemu_mutex_lock_iothread_impl(const char *file, = int line) =20 g_assert(!qemu_mutex_iothread_locked()); bql_lock(&qemu_global_mutex, file, line); + g_assert(iothread_lock_count =3D=3D 0); + iothread_lock_count++; iothread_locked =3D true; } =20 @@ -1890,7 +1960,10 @@ void qemu_mutex_unlock_iothread(void) { g_assert(qemu_mutex_iothread_locked()); iothread_locked =3D false; - qemu_mutex_unlock(&qemu_global_mutex); + g_assert(iothread_lock_count > 0); + if (--iothread_lock_count =3D=3D 0) { + qemu_mutex_unlock(&qemu_global_mutex); + } } =20 void qemu_cond_wait_iothread(QemuCond *cond) @@ -2126,6 +2199,16 @@ void qemu_init_vcpu(CPUState *cpu) cpu_address_space_init(cpu, 0, "cpu-memory", cpu->memory); } =20 + /* + * In TCG RR, cpu->lock is the BQL under the hood. In all other modes, + * cpu->lock is a standalone per-CPU lock. + */ + if (qemu_is_tcg_rr()) { + qemu_mutex_destroy(cpu->lock); + g_free(cpu->lock); + cpu->lock =3D &qemu_global_mutex; + } + if (kvm_enabled()) { qemu_kvm_start_vcpu(cpu); } else if (hax_enabled()) { diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 9b9d4296f9..620feed3e9 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -367,7 +367,8 @@ static void cpu_common_initfn(Object *obj) cpu->nr_cores =3D 1; cpu->nr_threads =3D 1; =20 - qemu_mutex_init(&cpu->lock); + cpu->lock =3D g_new(QemuMutex, 1); + qemu_mutex_init(cpu->lock); qemu_cond_init(&cpu->cond); QSIMPLEQ_INIT(&cpu->work_list); QTAILQ_INIT(&cpu->breakpoints); @@ -380,7 +381,7 @@ static void cpu_common_finalize(Object *obj) { CPUState *cpu =3D CPU(obj); =20 - qemu_mutex_destroy(&cpu->lock); + cpu_mutex_destroy(cpu); } =20 static int64_t cpu_common_get_arch_id(CPUState *cpu) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index fe79777502..2959ed1b49 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -377,7 +377,7 @@ struct CPUState { uint64_t random_seed; sigjmp_buf jmp_env; =20 - QemuMutex lock; + QemuMutex *lock; /* fields below protected by @lock */ QemuCond cond; QSIMPLEQ_HEAD(, qemu_work_item) work_list; @@ -485,6 +485,12 @@ void cpu_mutex_unlock_impl(CPUState *cpu, const char *= file, int line); */ bool cpu_mutex_locked(const CPUState *cpu); =20 +/** + * cpu_mutex_destroy - Handle how to destroy this CPU's mutex + * @cpu: the CPU whose mutex to destroy + */ +void cpu_mutex_destroy(CPUState *cpu); + /** * no_cpu_mutex_locked - check whether any CPU mutex is held * diff --git a/stubs/cpu-lock.c b/stubs/cpu-lock.c index 1981a00fb3..97a81f447d 100644 --- a/stubs/cpu-lock.c +++ b/stubs/cpu-lock.c @@ -18,3 +18,10 @@ bool no_cpu_mutex_locked(void) { return true; } + +void cpu_mutex_destroy(CPUState *cpu) +{ + qemu_mutex_destroy(cpu->lock); + g_free(cpu->lock); + cpu->lock =3D NULL; +} --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 21 May 2020 09:43:26 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 08/74] tcg-runtime: define helper_cpu_halted_set Date: Thu, 21 May 2020 12:39:05 -0400 Message-Id: <20200521164011.638-9-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f41; envelope-from=robert.foley@linaro.org; helo=mail-qv1-xf41.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- accel/tcg/tcg-runtime.c | 7 +++++++ accel/tcg/tcg-runtime.h | 2 ++ 2 files changed, 9 insertions(+) diff --git a/accel/tcg/tcg-runtime.c b/accel/tcg/tcg-runtime.c index 446465a09a..32ec18fe40 100644 --- a/accel/tcg/tcg-runtime.c +++ b/accel/tcg/tcg-runtime.c @@ -168,3 +168,10 @@ void HELPER(exit_atomic)(CPUArchState *env) { cpu_loop_exit_atomic(env_cpu(env), GETPC()); } + +void HELPER(cpu_halted_set)(CPUArchState *env, uint32_t val) +{ + CPUState *cpu =3D env_cpu(env); + + cpu->halted =3D val; +} diff --git a/accel/tcg/tcg-runtime.h b/accel/tcg/tcg-runtime.h index 4fa61b49b4..433b6bc88e 100644 --- a/accel/tcg/tcg-runtime.h +++ b/accel/tcg/tcg-runtime.h @@ -28,6 +28,8 @@ DEF_HELPER_FLAGS_1(lookup_tb_ptr, TCG_CALL_NO_WG_SE, ptr,= env) =20 DEF_HELPER_FLAGS_1(exit_atomic, TCG_CALL_NO_WG, noreturn, env) =20 +DEF_HELPER_FLAGS_2(cpu_halted_set, TCG_CALL_NO_RWG, void, env, i32) + #ifdef CONFIG_SOFTMMU =20 DEF_HELPER_FLAGS_5(atomic_cmpxchgb, TCG_CALL_NO_WG, --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, richard.henderson@linaro.org, cota@braap.org, qemu-ppc@nongnu.org, peter.puhov@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Cc: qemu-ppc@nongnu.org Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Acked-by: David Gibson Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- target/ppc/translate.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 338529879f..c801bf915d 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -1595,8 +1595,7 @@ GEN_LOGICAL2(nor, tcg_gen_nor_tl, 0x03, PPC_INTEGER); static void gen_pause(DisasContext *ctx) { TCGv_i32 t0 =3D tcg_const_i32(0); - tcg_gen_st_i32(t0, cpu_env, - -offsetof(PowerPCCPU, env) + offsetof(CPUState, halted)= ); + gen_helper_cpu_halted_set(cpu_env, t0); tcg_temp_free_i32(t0); =20 /* Stop translation, this gives other CPUs a chance to run */ @@ -3620,8 +3619,7 @@ static void gen_sync(DisasContext *ctx) static void gen_wait(DisasContext *ctx) { TCGv_i32 t0 =3D tcg_const_i32(1); - tcg_gen_st_i32(t0, cpu_env, - -offsetof(PowerPCCPU, env) + offsetof(CPUState, halted)= ); + gen_helper_cpu_halted_set(cpu_env, t0); tcg_temp_free_i32(t0); /* Stop translation, as the CPU is supposed to sleep from now */ gen_exception_nip(ctx, EXCP_HLT, ctx->base.pc_next); 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, richard.henderson@linaro.org, cota@braap.org, peter.puhov@linaro.org, "Edgar E. Iglesias" , alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" And fix the temp leak along the way. Cc: "Edgar E. Iglesias" Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley Reviewed-by: Edgar E. Iglesias --- target/cris/translate.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target/cris/translate.c b/target/cris/translate.c index aaa46b5bca..6c4f091b7a 100644 --- a/target/cris/translate.c +++ b/target/cris/translate.c @@ -2823,8 +2823,9 @@ static int dec_rfe_etc(CPUCRISState *env, DisasContex= t *dc) cris_cc_mask(dc, 0); =20 if (dc->op2 =3D=3D 15) { - tcg_gen_st_i32(tcg_const_i32(1), cpu_env, - -offsetof(CRISCPU, env) + offsetof(CPUState, halted= )); + TCGv_i32 tmp =3D tcg_const_i32(1); + gen_helper_cpu_halted_set(cpu_env, tmp); + tcg_temp_free_i32(tmp); tcg_gen_movi_tl(env_pc, dc->pc + 2); t_gen_raise_exception(EXCP_HLT); return 2; --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; 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Thu, 21 May 2020 09:43:29 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 11/74] hppa: convert to helper_cpu_halted_set Date: Thu, 21 May 2020 12:39:08 -0400 Message-Id: <20200521164011.638-12-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::841; envelope-from=robert.foley@linaro.org; helo=mail-qt1-x841.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- target/hppa/translate.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 52d7bea1ea..9c4d5b28b0 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2725,8 +2725,7 @@ static bool trans_or(DisasContext *ctx, arg_rrr_cf *a) =20 /* Tell the qemu main loop to halt until this cpu has work. */ tmp =3D tcg_const_i32(1); - tcg_gen_st_i32(tmp, cpu_env, -offsetof(HPPACPU, env) + - offsetof(CPUState, halted)); + gen_helper_cpu_halted_set(cpu_env, tmp); tcg_temp_free_i32(tmp); gen_excp_1(EXCP_HALTED); ctx->base.is_jmp =3D DISAS_NORETURN; --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; 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Thu, 21 May 2020 09:43:31 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 12/74] m68k: convert to helper_cpu_halted_set Date: Thu, 21 May 2020 12:39:09 -0400 Message-Id: <20200521164011.638-13-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::742; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x742.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Laurent Vivier Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- target/m68k/translate.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 0f80888203..16a64e4776 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -44,7 +44,6 @@ #undef DEFO32 #undef DEFO64 =20 -static TCGv_i32 cpu_halted; static TCGv_i32 cpu_exception_index; =20 static char cpu_reg_names[2 * 8 * 3 + 5 * 4]; @@ -80,9 +79,6 @@ void m68k_tcg_init(void) #undef DEFO32 #undef DEFO64 =20 - cpu_halted =3D tcg_global_mem_new_i32(cpu_env, - -offsetof(M68kCPU, env) + - offsetof(CPUState, halted), "HALTE= D"); cpu_exception_index =3D tcg_global_mem_new_i32(cpu_env, -offsetof(M68kCPU, env) + offsetof(CPUState, except= ion_index), @@ -4698,6 +4694,7 @@ DISAS_INSN(halt) DISAS_INSN(stop) { uint16_t ext; + TCGv_i32 tmp; =20 if (IS_USER(s)) { gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); @@ -4707,7 +4704,9 @@ DISAS_INSN(stop) ext =3D read_im16(env, s); =20 gen_set_sr_im(s, ext, 0); - tcg_gen_movi_i32(cpu_halted, 1); + tmp =3D tcg_const_i32(1); + gen_helper_cpu_halted_set(cpu_env, tmp); + tcg_temp_free_i32(tmp); gen_exception(s, s->pc, EXCP_HLT); } =20 --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590079921; cv=none; d=zohomail.com; s=zohoarc; b=Fszyb3ZHwAdyJtqpbqkPsQnGraRZtAaMeWIWdIIhVbF9uXS3XQaLGUN9PuLq/0OUEyu/O3flNeF/TlZAMxGYvbhvH5HehLtYkq0P/7xt7N184B6+1nFRnYA05tvs9AB4EE1D1Pd6f1t+Jd3j4UrRj8WaSqKwQD9IS9OW2WObdHE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1590079921; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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Cota Signed-off-by: Robert Foley --- target/alpha/translate.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 8870284f57..b1cd55e6ca 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -1226,8 +1226,7 @@ static DisasJumpType gen_call_pal(DisasContext *ctx, = int palcode) /* WTINT */ { TCGv_i32 tmp =3D tcg_const_i32(1); - tcg_gen_st_i32(tmp, cpu_env, -offsetof(AlphaCPU, env) + - offsetof(CPUState, halted)); + gen_helper_cpu_halted_set(cpu_env, tmp); tcg_temp_free_i32(tmp); } tcg_gen_movi_i64(ctx->ir[IR_V0], 0); @@ -1381,8 +1380,7 @@ static DisasJumpType gen_mtpr(DisasContext *ctx, TCGv= vb, int regno) /* WAIT */ { TCGv_i32 tmp =3D tcg_const_i32(1); - tcg_gen_st_i32(tmp, cpu_env, -offsetof(AlphaCPU, env) + - offsetof(CPUState, halted)); + gen_helper_cpu_halted_set(cpu_env, tmp); tcg_temp_free_i32(tmp); } return gen_excp(ctx, EXCP_HALTED, 0); --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Iglesias --- target/microblaze/translate.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index f6ff2591c3..c08a7f1d39 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -1237,9 +1237,7 @@ static void dec_br(DisasContext *dc) LOG_DIS("sleep\n"); =20 t_sync_flags(dc); - tcg_gen_st_i32(tmp_1, cpu_env, - -offsetof(MicroBlazeCPU, env) - +offsetof(CPUState, halted)); + gen_helper_cpu_halted_set(cpu_env, tmp_1); tcg_gen_movi_i64(cpu_SR[SR_PC], dc->pc + 4); gen_helper_raise_exception(cpu_env, tmp_hlt); tcg_temp_free_i32(tmp_hlt); --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; 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Thu, 21 May 2020 09:43:34 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 15/74] cpu: define cpu_halted helpers Date: Thu, 21 May 2020 12:39:12 -0400 Message-Id: <20200521164011.638-16-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::843; envelope-from=robert.foley@linaro.org; helo=mail-qt1-x843.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" cpu->halted will soon be protected by cpu->lock. We will use these helpers to ease the transition, since right now cpu->halted has many direct callers. Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- include/hw/core/cpu.h | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 2959ed1b49..820c5b0a9a 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -498,6 +498,30 @@ void cpu_mutex_destroy(CPUState *cpu); */ bool no_cpu_mutex_locked(void); =20 +static inline uint32_t cpu_halted(CPUState *cpu) +{ + uint32_t ret; + + if (cpu_mutex_locked(cpu)) { + return cpu->halted; + } + cpu_mutex_lock(cpu); + ret =3D cpu->halted; + cpu_mutex_unlock(cpu); + return ret; +} + +static inline void cpu_halted_set(CPUState *cpu, uint32_t val) +{ + if (cpu_mutex_locked(cpu)) { + cpu->halted =3D val; + return; + } + cpu_mutex_lock(cpu); + cpu->halted =3D val; + cpu_mutex_unlock(cpu); +} + static inline void cpu_tb_jmp_cache_clear(CPUState *cpu) { unsigned int i; --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- accel/tcg/tcg-runtime.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/accel/tcg/tcg-runtime.c b/accel/tcg/tcg-runtime.c index 32ec18fe40..ca0774d3bf 100644 --- a/accel/tcg/tcg-runtime.c +++ b/accel/tcg/tcg-runtime.c @@ -173,5 +173,5 @@ void HELPER(cpu_halted_set)(CPUArchState *env, uint32_t= val) { CPUState *cpu =3D env_cpu(env); =20 - cpu->halted =3D val; + cpu_halted_set(cpu, val); } --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590079829; cv=none; d=zohomail.com; s=zohoarc; b=em1nMv+zF9CfX1TkMSGLsEcOFWyxkWBEgxSwEgPdpilBwR2sv6EbIM4yAvHoUs5pKudEJAHEviKwflflRLjG1X7fRQOdEFgThGXflUg7T14LPS/rANrVqrLJKOaRXieB8hp6D0tEXOBOLnv/YrlXPC6vxtZduZyv1Yz7YSLQaq4= ARC-Message-Signature: i=1; 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Thu, 21 May 2020 09:43:37 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 17/74] hw/semihosting: convert to cpu_halted_set Date: Thu, 21 May 2020 12:39:14 -0400 Message-Id: <20200521164011.638-18-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::843; envelope-from=robert.foley@linaro.org; helo=mail-qt1-x843.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. 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X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Signed-off-by: Robert Foley Reviewed-by: Alex Benn=C3=A9e --- hw/semihosting/console.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/semihosting/console.c b/hw/semihosting/console.c index 6346bd7f50..f70085f3c1 100644 --- a/hw/semihosting/console.c +++ b/hw/semihosting/console.c @@ -131,7 +131,7 @@ static void console_wake_up(gpointer data, gpointer use= r_data) { CPUState *cs =3D (CPUState *) data; /* cpu_handle_halt won't know we have work so just unbung here */ - cs->halted =3D 0; + cpu_halted_set(cs, 0); qemu_cpu_kick(cs); } =20 @@ -154,7 +154,7 @@ target_ulong qemu_semihosting_console_inc(CPUArchState = *env) g_assert(current_cpu); if (fifo8_is_empty(&c->fifo)) { c->sleeping_cpus =3D g_slist_prepend(c->sleeping_cpus, current_cpu= ); - current_cpu->halted =3D 1; + cpu_halted_set(current_cpu, 1); current_cpu->exception_index =3D EXCP_HALTED; cpu_loop_exit(current_cpu); /* never returns */ --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590080051; cv=none; d=zohomail.com; s=zohoarc; b=GFk65RBJRpBSW4FIR+wIV0KTqLx2K/evGPQXYx9KuTJxQ1KroWtNaIhxxQlK0qXNQu+dE/a0JnxQvh+9i36r3KXBdAxFssKvBRdgzdGrzPo7uaOeyZknzp4ab/tSCvGO+cp3XWVFFJBGGDOTAie3rWycLrGwJV+70g1bcNyfVuE= ARC-Message-Signature: i=1; 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Thu, 21 May 2020 09:43:38 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 18/74] arm: convert to cpu_halted Date: Thu, 21 May 2020 12:39:15 -0400 Message-Id: <20200521164011.638-19-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f44; envelope-from=robert.foley@linaro.org; helo=mail-qv1-xf44.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , robert.foley@linaro.org, alex.bennee@linaro.org, richard.henderson@linaro.org, cota@braap.org, qemu-arm@nongnu.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Cc: Andrzej Zaborowski Cc: Peter Maydell Cc: qemu-arm@nongnu.org Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- hw/arm/omap1.c | 4 ++-- hw/arm/pxa2xx_gpio.c | 2 +- hw/arm/pxa2xx_pic.c | 2 +- target/arm/arm-powerctl.c | 6 +++--- target/arm/cpu.c | 2 +- target/arm/op_helper.c | 2 +- 6 files changed, 9 insertions(+), 9 deletions(-) diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index 761cc17ea9..83b1d63f27 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -1776,7 +1776,7 @@ static uint64_t omap_clkdsp_read(void *opaque, hwaddr= addr, case 0x18: /* DSP_SYSST */ cpu =3D CPU(s->cpu); return (s->clkm.clocking_scheme << 11) | s->clkm.cold_start | - (cpu->halted << 6); /* Quite useless... */ + (cpu_halted(cpu) << 6); /* Quite useless... */ } =20 OMAP_BAD_REG(addr); @@ -3797,7 +3797,7 @@ void omap_mpu_wakeup(void *opaque, int irq, int req) struct omap_mpu_state_s *mpu =3D (struct omap_mpu_state_s *) opaque; CPUState *cpu =3D CPU(mpu->cpu); =20 - if (cpu->halted) { + if (cpu_halted(cpu)) { cpu_interrupt(cpu, CPU_INTERRUPT_EXITTB); } } diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c index f8df3cc227..23b4a06a4f 100644 --- a/hw/arm/pxa2xx_gpio.c +++ b/hw/arm/pxa2xx_gpio.c @@ -132,7 +132,7 @@ static void pxa2xx_gpio_set(void *opaque, int line, int= level) pxa2xx_gpio_irq_update(s); =20 /* Wake-up GPIOs */ - if (cpu->halted && (mask & ~s->dir[bank] & pxa2xx_gpio_wake[bank])) { + if (cpu_halted(cpu) && (mask & ~s->dir[bank] & pxa2xx_gpio_wake[bank])= ) { cpu_interrupt(cpu, CPU_INTERRUPT_EXITTB); } } diff --git a/hw/arm/pxa2xx_pic.c b/hw/arm/pxa2xx_pic.c index 203d4d28af..057448c2ed 100644 --- a/hw/arm/pxa2xx_pic.c +++ b/hw/arm/pxa2xx_pic.c @@ -58,7 +58,7 @@ static void pxa2xx_pic_update(void *opaque) PXA2xxPICState *s =3D (PXA2xxPICState *) opaque; CPUState *cpu =3D CPU(s->cpu); =20 - if (cpu->halted) { + if (cpu_halted(cpu)) { mask[0] =3D s->int_pending[0] & (s->int_enabled[0] | s->int_idle); mask[1] =3D s->int_pending[1] & (s->int_enabled[1] | s->int_idle); if (mask[0] || mask[1]) { diff --git a/target/arm/arm-powerctl.c b/target/arm/arm-powerctl.c index b75f813b40..f0db413519 100644 --- a/target/arm/arm-powerctl.c +++ b/target/arm/arm-powerctl.c @@ -64,7 +64,7 @@ static void arm_set_cpu_on_async_work(CPUState *target_cp= u_state, =20 /* Initialize the cpu we are turning on */ cpu_reset(target_cpu_state); - target_cpu_state->halted =3D 0; + cpu_halted_set(target_cpu_state, 0); =20 if (info->target_aa64) { if ((info->target_el < 3) && arm_feature(&target_cpu->env, @@ -241,7 +241,7 @@ static void arm_set_cpu_on_and_reset_async_work(CPUStat= e *target_cpu_state, =20 /* Initialize the cpu we are turning on */ cpu_reset(target_cpu_state); - target_cpu_state->halted =3D 0; + cpu_halted_set(target_cpu_state, 0); =20 /* Finally set the power status */ assert(qemu_mutex_iothread_locked()); @@ -297,7 +297,7 @@ static void arm_set_cpu_off_async_work(CPUState *target= _cpu_state, =20 assert(qemu_mutex_iothread_locked()); target_cpu->power_state =3D PSCI_OFF; - target_cpu_state->halted =3D 1; + cpu_halted_set(target_cpu_state, 1); target_cpu_state->exception_index =3D EXCP_HLT; } =20 diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 32bec156f2..dc435a18a1 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -175,7 +175,7 @@ static void arm_cpu_reset(DeviceState *dev) env->vfp.xregs[ARM_VFP_MVFR2] =3D cpu->isar.mvfr2; =20 cpu->power_state =3D cpu->start_powered_off ? PSCI_OFF : PSCI_ON; - s->halted =3D cpu->start_powered_off; + cpu_halted_set(s, cpu->start_powered_off); =20 if (arm_feature(env, ARM_FEATURE_IWMMXT)) { env->iwmmxt.cregs[ARM_IWMMXT_wCID] =3D 0x69051000 | 'Q'; diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c index eb0de080f1..88c86a4346 100644 --- a/target/arm/op_helper.c +++ b/target/arm/op_helper.c @@ -305,7 +305,7 @@ void HELPER(wfi)(CPUARMState *env, uint32_t insn_len) } =20 cs->exception_index =3D EXCP_HLT; - cs->halted =3D 1; + cpu_halted_set(cs, 1); cpu_loop_exit(cs); } =20 --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590079810; cv=none; d=zohomail.com; s=zohoarc; b=GZa9klWOEotOcEIngPbSEDS4xkQBn37QhDHJ/MAmy35/+BZpEcEb2la8JTw4yiMhItmNSpX9YFIzhMfx6bfThEb17zxnlmvbZ/d77O8K+4JLf9LsYEfTq7nn81+JUIbE9j350Ksi92gPdo1BkFbYT7A7P3kiPZJztmquMU3qGnY= ARC-Message-Signature: i=1; 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Thu, 21 May 2020 09:43:40 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 19/74] ppc: convert to cpu_halted Date: Thu, 21 May 2020 12:39:16 -0400 Message-Id: <20200521164011.638-20-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::742; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x742.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, richard.henderson@linaro.org, cota@braap.org, qemu-ppc@nongnu.org, peter.puhov@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Emilio G. Cota" In ppce500_spin.c, acquire the lock just once to update both cpu->halted and cpu->stopped. In hw/ppc/spapr_hcall.c, acquire the lock just once to update cpu->halted and call cpu_has_work, since later in the series we'll acquire the BQL (if not already held) from cpu_has_work. Cc: qemu-ppc@nongnu.org Reviewed-by: Richard Henderson Acked-by: David Gibson Signed-off-by: Emilio G. Cota [RF: hw/ppc/spapr_hcall.c, spapr_rtas.c more conversions] Signed-off-by: Robert Foley --- hw/ppc/e500.c | 4 ++-- hw/ppc/ppc.c | 10 +++++----- hw/ppc/ppce500_spin.c | 6 ++++-- hw/ppc/spapr_cpu_core.c | 4 ++-- hw/ppc/spapr_hcall.c | 14 ++++++++------ hw/ppc/spapr_rtas.c | 8 ++++---- target/ppc/excp_helper.c | 4 ++-- target/ppc/helper_regs.h | 2 +- target/ppc/kvm.c | 4 ++-- target/ppc/translate_init.inc.c | 8 ++++---- 10 files changed, 34 insertions(+), 30 deletions(-) diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 2a0b66a152..5683a8576e 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -706,7 +706,7 @@ static void ppce500_cpu_reset_sec(void *opaque) =20 /* Secondary CPU starts in halted state for now. Needs to change when implementing non-kernel boot. */ - cs->halted =3D 1; + cpu_halted_set(cs, 1); cs->exception_index =3D EXCP_HLT; } =20 @@ -720,7 +720,7 @@ static void ppce500_cpu_reset(void *opaque) cpu_reset(cs); =20 /* Set initial guest state. */ - cs->halted =3D 0; + cpu_halted_set(cs, 0); env->gpr[1] =3D (16 * MiB) - 8; env->gpr[3] =3D bi->dt_base; env->gpr[4] =3D 0; diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c index 4a11fb1640..0e7386ff88 100644 --- a/hw/ppc/ppc.c +++ b/hw/ppc/ppc.c @@ -149,7 +149,7 @@ static void ppc6xx_set_irq(void *opaque, int pin, int l= evel) /* XXX: Note that the only way to restart the CPU is to reset = it */ if (level) { LOG_IRQ("%s: stop the CPU\n", __func__); - cs->halted =3D 1; + cpu_halted_set(cs, 1); } break; case PPC6xx_INPUT_HRESET: @@ -228,10 +228,10 @@ static void ppc970_set_irq(void *opaque, int pin, int= level) /* XXX: TODO: relay the signal to CKSTP_OUT pin */ if (level) { LOG_IRQ("%s: stop the CPU\n", __func__); - cs->halted =3D 1; + cpu_halted_set(cs, 1); } else { LOG_IRQ("%s: restart the CPU\n", __func__); - cs->halted =3D 0; + cpu_halted_set(cs, 0); qemu_cpu_kick(cs); } break; @@ -445,10 +445,10 @@ static void ppc40x_set_irq(void *opaque, int pin, int= level) /* Level sensitive - active low */ if (level) { LOG_IRQ("%s: stop the CPU\n", __func__); - cs->halted =3D 1; + cpu_halted_set(cs, 1); } else { LOG_IRQ("%s: restart the CPU\n", __func__); - cs->halted =3D 0; + cpu_halted_set(cs, 0); qemu_cpu_kick(cs); } break; diff --git a/hw/ppc/ppce500_spin.c b/hw/ppc/ppce500_spin.c index 66c1065db2..79313944cf 100644 --- a/hw/ppc/ppce500_spin.c +++ b/hw/ppc/ppce500_spin.c @@ -107,9 +107,11 @@ static void spin_kick(CPUState *cs, run_on_cpu_data da= ta) map_start =3D ldq_p(&curspin->addr) & ~(map_size - 1); mmubooke_create_initial_mapping(env, 0, map_start, map_size); =20 - cs->halted =3D 0; - cs->exception_index =3D -1; + cpu_mutex_lock(cs); + cpu_halted_set(cs, 0); cs->stopped =3D false; + cpu_mutex_unlock(cs); + cs->exception_index =3D -1; qemu_cpu_kick(cs); } =20 diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index e1f76c74f3..b5d0b06f3a 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -39,7 +39,7 @@ static void spapr_reset_vcpu(PowerPCCPU *cpu) /* All CPUs start halted. CPU0 is unhalted from the machine level * reset code and the rest are explicitly started up by the guest * using an RTAS call */ - cs->halted =3D 1; + cpu_halted_set(cs, 1); =20 env->spr[SPR_HIOR] =3D 0; =20 @@ -88,7 +88,7 @@ void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ul= ong nip, env->gpr[3] =3D r3; env->gpr[4] =3D r4; kvmppc_set_reg_ppc_online(cpu, 1); - CPU(cpu)->halted =3D 0; + cpu_halted_set(CPU(cpu), 0); /* Enable Power-saving mode Exit Cause exceptions */ ppc_store_lpcr(cpu, env->spr[SPR_LPCR] | pcc->lpcr_pm); } diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index 0f54988f2e..e678ca29a5 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -1058,17 +1058,19 @@ static target_ulong h_cede(PowerPCCPU *cpu, SpaprMa= chineState *spapr, env->msr |=3D (1ULL << MSR_EE); hreg_compute_hflags(env); =20 + cpu_mutex_lock(cs); if (spapr_cpu->prod) { spapr_cpu->prod =3D false; + cpu_mutex_unlock(cs); return H_SUCCESS; } =20 if (!cpu_has_work(cs)) { - cs->halted =3D 1; + cpu_halted_set(cs, 1); cs->exception_index =3D EXCP_HLT; cs->exit_request =3D 1; } - + cpu_mutex_unlock(cs); return H_SUCCESS; } =20 @@ -1085,7 +1087,7 @@ static target_ulong h_confer_self(PowerPCCPU *cpu) spapr_cpu->prod =3D false; return H_SUCCESS; } - cs->halted =3D 1; + cpu_halted_set(cs, 1); cs->exception_index =3D EXCP_HALTED; cs->exit_request =3D 1; =20 @@ -1116,7 +1118,7 @@ static target_ulong h_join(PowerPCCPU *cpu, SpaprMach= ineState *spapr, } =20 /* Don't have a way to indicate joined, so use halted && MSR[EE]= =3D0 */ - if (!cs->halted || (e->msr & (1ULL << MSR_EE))) { + if (!cpu_halted(cs) || (e->msr & (1ULL << MSR_EE))) { last_unjoined =3D false; break; } @@ -1199,7 +1201,7 @@ static target_ulong h_prod(PowerPCCPU *cpu, SpaprMach= ineState *spapr, =20 spapr_cpu =3D spapr_cpu_state(tcpu); spapr_cpu->prod =3D true; - cs->halted =3D 0; + cpu_halted_set(cs, 0); qemu_cpu_kick(cs); =20 return H_SUCCESS; @@ -1685,7 +1687,7 @@ target_ulong do_client_architecture_support(PowerPCCP= U *cpu, if (cs =3D=3D CPU(cpu)) { continue; } - if (!cs->halted) { + if (!cpu_halted(cs)) { warn_report("guest has multiple active vCPUs at CAS, which is = not allowed"); return H_MULTI_THREADS_ACTIVE; } diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index bcac0d00e7..2306f2985e 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -111,7 +111,7 @@ static void rtas_query_cpu_stopped_state(PowerPCCPU *cp= u_, id =3D rtas_ld(args, 0); cpu =3D spapr_find_cpu(id); if (cpu !=3D NULL) { - if (CPU(cpu)->halted) { + if (cpu_halted(CPU(cpu))) { rtas_st(rets, 1, 0); } else { rtas_st(rets, 1, 2); @@ -155,7 +155,7 @@ static void rtas_start_cpu(PowerPCCPU *callcpu, SpaprMa= chineState *spapr, env =3D &newcpu->env; pcc =3D POWERPC_CPU_GET_CLASS(newcpu); =20 - if (!CPU(newcpu)->halted) { + if (!cpu_halted(CPU(newcpu))) { rtas_st(rets, 0, RTAS_OUT_HW_ERROR); return; } @@ -213,7 +213,7 @@ static void rtas_stop_self(PowerPCCPU *cpu, SpaprMachin= eState *spapr, */ ppc_store_lpcr(cpu, env->spr[SPR_LPCR] & ~pcc->lpcr_pm); env->spr[SPR_PSSCR] |=3D PSSCR_EC; - cs->halted =3D 1; + cpu_halted_set(cs, 1); kvmppc_set_reg_ppc_online(cpu, 0); qemu_cpu_kick(cs); } @@ -238,7 +238,7 @@ static void rtas_ibm_suspend_me(PowerPCCPU *cpu, SpaprM= achineState *spapr, } =20 /* See h_join */ - if (!cs->halted || (e->msr & (1ULL << MSR_EE))) { + if (!cpu_halted(cs) || (e->msr & (1ULL << MSR_EE))) { rtas_st(rets, 0, H_MULTI_THREADS_ACTIVE); return; } diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index f052979664..4c7da88682 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -293,7 +293,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int ex= cp_model, int excp) qemu_log("Machine check while not allowed. " "Entering checkstop state\n"); } - cs->halted =3D 1; + cpu_halted_set(cs, 1); cpu_interrupt_exittb(cs); } if (env->msr_mask & MSR_HVB) { @@ -1095,7 +1095,7 @@ void helper_pminsn(CPUPPCState *env, powerpc_pm_insn_= t insn) CPUState *cs; =20 cs =3D env_cpu(env); - cs->halted =3D 1; + cpu_halted_set(cs, 1); =20 /* * The architecture specifies that HDEC interrupts are discarded diff --git a/target/ppc/helper_regs.h b/target/ppc/helper_regs.h index d78c2af63e..f84438f639 100644 --- a/target/ppc/helper_regs.h +++ b/target/ppc/helper_regs.h @@ -168,7 +168,7 @@ static inline int hreg_store_msr(CPUPPCState *env, targ= et_ulong value, #if !defined(CONFIG_USER_ONLY) if (unlikely(msr_pow =3D=3D 1)) { if (!env->pending_interrupts && (*env->check_pow)(env)) { - cs->halted =3D 1; + cpu_halted_set(cs, 1); excp =3D EXCP_HALTED; } } diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 2692f76130..aae2ef0ad4 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -1342,7 +1342,7 @@ MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm= _run *run) =20 int kvm_arch_process_async_events(CPUState *cs) { - return cs->halted; + return cpu_halted(cs); } =20 static int kvmppc_handle_halt(PowerPCCPU *cpu) @@ -1351,7 +1351,7 @@ static int kvmppc_handle_halt(PowerPCCPU *cpu) CPUPPCState *env =3D &cpu->env; =20 if (!(cs->interrupt_request & CPU_INTERRUPT_HARD) && (msr_ee)) { - cs->halted =3D 1; + cpu_halted_set(cs, 1); cs->exception_index =3D EXCP_HLT; } =20 diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.in= c.c index d8adc1bd49..5838b6f7bc 100644 --- a/target/ppc/translate_init.inc.c +++ b/target/ppc/translate_init.inc.c @@ -8539,7 +8539,7 @@ static bool cpu_has_work_POWER7(CPUState *cs) PowerPCCPU *cpu =3D POWERPC_CPU(cs); CPUPPCState *env =3D &cpu->env; =20 - if (cs->halted) { + if (cpu_halted(cs)) { if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) { return false; } @@ -8701,7 +8701,7 @@ static bool cpu_has_work_POWER8(CPUState *cs) PowerPCCPU *cpu =3D POWERPC_CPU(cs); CPUPPCState *env =3D &cpu->env; =20 - if (cs->halted) { + if (cpu_halted(cs)) { if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) { return false; } @@ -8901,7 +8901,7 @@ static bool cpu_has_work_POWER9(CPUState *cs) PowerPCCPU *cpu =3D POWERPC_CPU(cs); CPUPPCState *env =3D &cpu->env; =20 - if (cs->halted) { + if (cpu_halted(cs)) { uint64_t psscr =3D env->spr[SPR_PSSCR]; =20 if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) { @@ -9117,7 +9117,7 @@ static bool cpu_has_work_POWER10(CPUState *cs) PowerPCCPU *cpu =3D POWERPC_CPU(cs); CPUPPCState *env =3D &cpu->env; =20 - if (cs->halted) { + if (cpu_halted(cs)) { uint64_t psscr =3D env->spr[SPR_PSSCR]; =20 if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) { --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590079940; cv=none; d=zohomail.com; s=zohoarc; b=bOx0YRRdgUzESeFv0vvPW7xcYoXHhfUJgpc6rfxs3+pTVbpSlS8R9KVicviPvyJENeZLkfSYdG4U3ktVWIOUSVWYJY9XWAB0aWdTcAI97ukK4N1nkdtW/gbFKBOVP6olBe7V2DkRbgIvvwrz2wFS6gJx1R6usmMFLNd+vunRRS8= ARC-Message-Signature: i=1; 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Thu, 21 May 2020 09:43:41 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 20/74] sh4: convert to cpu_halted Date: Thu, 21 May 2020 12:39:17 -0400 Message-Id: <20200521164011.638-21-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f2e; envelope-from=robert.foley@linaro.org; helo=mail-qv1-xf2e.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. 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Cota Signed-off-by: Robert Foley --- target/sh4/op_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c index 14c3db0f48..d338bbe871 100644 --- a/target/sh4/op_helper.c +++ b/target/sh4/op_helper.c @@ -90,7 +90,7 @@ void helper_sleep(CPUSH4State *env) { CPUState *cs =3D env_cpu(env); =20 - cs->halted =3D 1; + cpu_halted_set(cs, 1); env->in_sleep =3D 1; raise_exception(env, EXCP_HLT, 0); } --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590079920; cv=none; d=zohomail.com; s=zohoarc; b=IsuFlme82Kn2OdfTY/y+io9QqHKiCwz2Q8yId9qJ60oG6REshkYucgqfdCe80q89IMydK8yGEC3E03GWRj1u6iqwsocZrACPj/kKbsF295PgB/wTpql0cARMK6VJbBNPFBp68s9ZqRF3x1pqfMcnDuIPum3AXCwwdkmeHfvKu3s= ARC-Message-Signature: i=1; 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Thu, 21 May 2020 09:43:42 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 21/74] i386: convert to cpu_halted Date: Thu, 21 May 2020 12:39:18 -0400 Message-Id: <20200521164011.638-22-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::843; envelope-from=robert.foley@linaro.org; helo=mail-qt1-x843.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, richard.henderson@linaro.org, cota@braap.org, peter.puhov@linaro.org, alex.bennee@linaro.org, Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Cc: Eduardo Habkost Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota [RF: Converted new code in i386/hax-all.c to cpu_halted] Signed-off-by: Robert Foley --- target/i386/cpu.c | 2 +- target/i386/cpu.h | 2 +- target/i386/hax-all.c | 6 +++--- target/i386/helper.c | 4 ++-- target/i386/hvf/hvf.c | 4 ++-- target/i386/hvf/x86hvf.c | 4 ++-- target/i386/kvm.c | 10 +++++----- target/i386/misc_helper.c | 2 +- target/i386/whpx-all.c | 6 +++--- 9 files changed, 20 insertions(+), 20 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 7a4a8e3847..9e8ae1569f 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6045,7 +6045,7 @@ static void x86_cpu_reset(DeviceState *dev) /* We hard-wire the BSP to the first CPU. */ apic_designate_bsp(cpu->apic_state, s->cpu_index =3D=3D 0); =20 - s->halted =3D !cpu_is_bsp(cpu); + cpu_halted_set(s, !cpu_is_bsp(cpu)); =20 if (kvm_enabled()) { kvm_arch_reset_vcpu(cpu); diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 408392dbf6..ef1dca3f98 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1867,7 +1867,7 @@ static inline void cpu_x86_load_seg_cache_sipi(X86CPU= *cpu, sipi_vector << 12, env->segs[R_CS].limit, env->segs[R_CS].flags); - cs->halted =3D 0; + cpu_halted_set(cs, 0); } =20 int cpu_x86_get_descr_debug(CPUX86State *env, unsigned int selector, diff --git a/target/i386/hax-all.c b/target/i386/hax-all.c index f9c83fff25..25bf80b5f2 100644 --- a/target/i386/hax-all.c +++ b/target/i386/hax-all.c @@ -498,7 +498,7 @@ static int hax_vcpu_hax_exec(CPUArchState *env) if (((cpu->interrupt_request & CPU_INTERRUPT_HARD) && (env->eflags & IF_MASK)) || (cpu->interrupt_request & CPU_INTERRUPT_NMI)) { - cpu->halted =3D 0; + cpu_halted_set(cpu, 0); } =20 if (cpu->interrupt_request & CPU_INTERRUPT_INIT) { @@ -516,7 +516,7 @@ static int hax_vcpu_hax_exec(CPUArchState *env) hax_vcpu_sync_state(env, 1); } =20 - if (cpu->halted) { + if (cpu_halted(cpu)) { /* If this vcpu is halted, we must not ask HAXM to run it. Instead= , we * break out of hax_smp_cpu_exec() as if this vcpu had executed HL= T. * That way, this vcpu thread will be trapped in qemu_wait_io_even= t(), @@ -581,7 +581,7 @@ static int hax_vcpu_hax_exec(CPUArchState *env) !(cpu->interrupt_request & CPU_INTERRUPT_NMI)) { /* hlt instruction with interrupt disabled is shutdown */ env->eflags |=3D IF_MASK; - cpu->halted =3D 1; + cpu_halted_set(cpu, 1); cpu->exception_index =3D EXCP_HLT; ret =3D 1; } diff --git a/target/i386/helper.c b/target/i386/helper.c index c3a6e4fabe..058de4073d 100644 --- a/target/i386/helper.c +++ b/target/i386/helper.c @@ -450,7 +450,7 @@ void x86_cpu_dump_state(CPUState *cs, FILE *f, int flag= s) (env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, (env->a20_mask >> 20) & 1, (env->hflags >> HF_SMM_SHIFT) & 1, - cs->halted); + cpu_halted(cs)); } else #endif { @@ -477,7 +477,7 @@ void x86_cpu_dump_state(CPUState *cs, FILE *f, int flag= s) (env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, (env->a20_mask >> 20) & 1, (env->hflags >> HF_SMM_SHIFT) & 1, - cs->halted); + cpu_halted(cs)); } =20 for(i =3D 0; i < 6; i++) { diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index d72543dc31..bf60ce9d66 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -704,7 +704,7 @@ int hvf_vcpu_exec(CPUState *cpu) vmx_update_tpr(cpu); =20 qemu_mutex_unlock_iothread(); - if (!cpu_is_bsp(X86_CPU(cpu)) && cpu->halted) { + if (!cpu_is_bsp(X86_CPU(cpu)) && cpu_halted(cpu)) { qemu_mutex_lock_iothread(); return EXCP_HLT; } @@ -738,7 +738,7 @@ int hvf_vcpu_exec(CPUState *cpu) (EFLAGS(env) & IF_MASK)) && !(cpu->interrupt_request & CPU_INTERRUPT_NMI) && !(idtvec_info & VMCS_IDT_VEC_VALID)) { - cpu->halted =3D 1; + cpu_halted_set(cpu, 1); ret =3D EXCP_HLT; break; } diff --git a/target/i386/hvf/x86hvf.c b/target/i386/hvf/x86hvf.c index edefe5319a..cbb2144724 100644 --- a/target/i386/hvf/x86hvf.c +++ b/target/i386/hvf/x86hvf.c @@ -446,7 +446,7 @@ int hvf_process_events(CPUState *cpu_state) if (((cpu_state->interrupt_request & CPU_INTERRUPT_HARD) && (EFLAGS(env) & IF_MASK)) || (cpu_state->interrupt_request & CPU_INTERRUPT_NMI)) { - cpu_state->halted =3D 0; + cpu_halted_set(cpu_state, 0); } if (cpu_state->interrupt_request & CPU_INTERRUPT_SIPI) { hvf_cpu_synchronize_state(cpu_state); @@ -458,5 +458,5 @@ int hvf_process_events(CPUState *cpu_state) apic_handle_tpr_access_report(cpu->apic_state, env->eip, env->tpr_access_type); } - return cpu_state->halted; + return cpu_halted(cpu_state); } diff --git a/target/i386/kvm.c b/target/i386/kvm.c index 34f838728d..1c1d4c8c0a 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -3568,7 +3568,7 @@ static int kvm_get_mp_state(X86CPU *cpu) } env->mp_state =3D mp_state.mp_state; if (kvm_irqchip_in_kernel()) { - cs->halted =3D (mp_state.mp_state =3D=3D KVM_MP_STATE_HALTED); + cpu_halted_set(cs, mp_state.mp_state =3D=3D KVM_MP_STATE_HALTED); } return 0; } @@ -4126,7 +4126,7 @@ int kvm_arch_process_async_events(CPUState *cs) kvm_queue_exception(env, EXCP12_MCHK, 0, 0); env->has_error_code =3D 0; =20 - cs->halted =3D 0; + cpu_halted_set(cs, 0); if (kvm_irqchip_in_kernel() && env->mp_state =3D=3D KVM_MP_STATE_H= ALTED) { env->mp_state =3D KVM_MP_STATE_RUNNABLE; } @@ -4149,7 +4149,7 @@ int kvm_arch_process_async_events(CPUState *cs) if (((cs->interrupt_request & CPU_INTERRUPT_HARD) && (env->eflags & IF_MASK)) || (cs->interrupt_request & CPU_INTERRUPT_NMI)) { - cs->halted =3D 0; + cpu_halted_set(cs, 0); } if (cs->interrupt_request & CPU_INTERRUPT_SIPI) { kvm_cpu_synchronize_state(cs); @@ -4162,7 +4162,7 @@ int kvm_arch_process_async_events(CPUState *cs) env->tpr_access_type); } =20 - return cs->halted; + return cpu_halted(cs); } =20 static int kvm_handle_halt(X86CPU *cpu) @@ -4173,7 +4173,7 @@ static int kvm_handle_halt(X86CPU *cpu) if (!((cs->interrupt_request & CPU_INTERRUPT_HARD) && (env->eflags & IF_MASK)) && !(cs->interrupt_request & CPU_INTERRUPT_NMI)) { - cs->halted =3D 1; + cpu_halted_set(cs, 1); return EXCP_HLT; } =20 diff --git a/target/i386/misc_helper.c b/target/i386/misc_helper.c index 7d61221024..dace1956a0 100644 --- a/target/i386/misc_helper.c +++ b/target/i386/misc_helper.c @@ -558,7 +558,7 @@ static void do_hlt(X86CPU *cpu) CPUX86State *env =3D &cpu->env; =20 env->hflags &=3D ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before= */ - cs->halted =3D 1; + cpu_halted_set(cs, 1); cs->exception_index =3D EXCP_HLT; cpu_loop_exit(cs); } diff --git a/target/i386/whpx-all.c b/target/i386/whpx-all.c index c78baac6df..efc2d88810 100644 --- a/target/i386/whpx-all.c +++ b/target/i386/whpx-all.c @@ -759,7 +759,7 @@ static int whpx_handle_halt(CPUState *cpu) (env->eflags & IF_MASK)) && !(cpu->interrupt_request & CPU_INTERRUPT_NMI)) { cpu->exception_index =3D EXCP_HLT; - cpu->halted =3D true; + cpu_halted_set(cpu, true); ret =3D 1; } qemu_mutex_unlock_iothread(); @@ -918,7 +918,7 @@ static void whpx_vcpu_process_async_events(CPUState *cp= u) if (((cpu->interrupt_request & CPU_INTERRUPT_HARD) && (env->eflags & IF_MASK)) || (cpu->interrupt_request & CPU_INTERRUPT_NMI)) { - cpu->halted =3D false; + cpu_halted_set(cpu, false); } =20 if (cpu->interrupt_request & CPU_INTERRUPT_SIPI) { @@ -944,7 +944,7 @@ static int whpx_vcpu_run(CPUState *cpu) int ret; =20 whpx_vcpu_process_async_events(cpu); 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Cota Signed-off-by: Robert Foley --- target/lm32/op_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/lm32/op_helper.c b/target/lm32/op_helper.c index e39fcd5647..8e0bd57b9d 100644 --- a/target/lm32/op_helper.c +++ b/target/lm32/op_helper.c @@ -32,7 +32,7 @@ void HELPER(hlt)(CPULM32State *env) { CPUState *cs =3D env_cpu(env); =20 - cs->halted =3D 1; + cpu_halted_set(cs, 1); cs->exception_index =3D EXCP_HLT; cpu_loop_exit(cs); } @@ -45,7 +45,7 @@ void HELPER(ill)(CPULM32State *env) "Connect a debugger or switch to the monitor console " "to find out more.\n"); vm_stop(RUN_STATE_PAUSED); - cs->halted =3D 1; + cpu_halted_set(cs, 1); raise_exception(env, EXCP_HALTED); #endif } --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 21 May 2020 09:43:45 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 23/74] m68k: convert to cpu_halted Date: Thu, 21 May 2020 12:39:20 -0400 Message-Id: <20200521164011.638-24-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::841; envelope-from=robert.foley@linaro.org; helo=mail-qt1-x841.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. 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Cota Signed-off-by: Robert Foley --- target/m68k/op_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index 202498deb5..4a032a150e 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -222,7 +222,7 @@ static void cf_interrupt_all(CPUM68KState *env, int is_= hw) do_m68k_semihosting(env, env->dregs[0]); return; } - cs->halted =3D 1; + cpu_halted_set(cs, 1); cs->exception_index =3D EXCP_HLT; cpu_loop_exit(cs); return; --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590080050; cv=none; d=zohomail.com; s=zohoarc; b=bAj9NFNnzytnQ88FPBdmFwqW4Ah9aynkHSHXFbfWvECQjhNCA2htg758HluaTpzQVeD+xBlJBNYfz9/h+BpFkkNu04DvBbbQQR58rwXogaQUDuXDbxCfJsPLKbpnQCUhU0YYR8sA0ParnBORX5avBAuhXFIn7Jhrv5rG2qfRiwI= ARC-Message-Signature: i=1; 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Thu, 21 May 2020 09:43:47 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 24/74] mips: convert to cpu_halted Date: Thu, 21 May 2020 12:39:21 -0400 Message-Id: <20200521164011.638-25-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::844; envelope-from=robert.foley@linaro.org; helo=mail-qt1-x844.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota [RF: Converted code in target/mips/kvm.c to cpu_halted.] Signed-off-by: Robert Foley --- hw/mips/cps.c | 2 +- hw/misc/mips_itu.c | 4 ++-- target/mips/cp0_helper.c | 6 +++--- target/mips/kvm.c | 2 +- target/mips/op_helper.c | 2 +- target/mips/translate.c | 4 ++-- 6 files changed, 10 insertions(+), 10 deletions(-) diff --git a/hw/mips/cps.c b/hw/mips/cps.c index 92b9b1a5f6..0123510fab 100644 --- a/hw/mips/cps.c +++ b/hw/mips/cps.c @@ -54,7 +54,7 @@ static void main_cpu_reset(void *opaque) cpu_reset(cs); =20 /* All VPs are halted on reset. Leave powering up to CPC. */ - cs->halted =3D 1; + cpu_halted_set(cs, 1); } =20 static bool cpu_mips_itu_supported(CPUMIPSState *env) diff --git a/hw/misc/mips_itu.c b/hw/misc/mips_itu.c index 3540985258..623a600ed1 100644 --- a/hw/misc/mips_itu.c +++ b/hw/misc/mips_itu.c @@ -183,7 +183,7 @@ static void wake_blocked_threads(ITCStorageCell *c) { CPUState *cs; CPU_FOREACH(cs) { - if (cs->halted && (c->blocked_threads & (1ULL << cs->cpu_index))) { + if (cpu_halted(cs) && (c->blocked_threads & (1ULL << cs->cpu_index= ))) { cpu_interrupt(cs, CPU_INTERRUPT_WAKE); } } @@ -193,7 +193,7 @@ static void wake_blocked_threads(ITCStorageCell *c) static void QEMU_NORETURN block_thread_and_exit(ITCStorageCell *c) { c->blocked_threads |=3D 1ULL << current_cpu->cpu_index; - current_cpu->halted =3D 1; + cpu_halted_set(current_cpu, 1); current_cpu->exception_index =3D EXCP_HLT; cpu_loop_exit_restore(current_cpu, current_cpu->mem_io_pc); } diff --git a/target/mips/cp0_helper.c b/target/mips/cp0_helper.c index bbf12e4a97..4d413c24d3 100644 --- a/target/mips/cp0_helper.c +++ b/target/mips/cp0_helper.c @@ -43,7 +43,7 @@ static bool mips_vpe_is_wfi(MIPSCPU *c) * If the VPE is halted but otherwise active, it means it's waiting for * an interrupt.\ */ - return cpu->halted && mips_vpe_active(env); + return cpu_halted(cpu) && mips_vpe_active(env); } =20 static bool mips_vp_is_wfi(MIPSCPU *c) @@ -51,7 +51,7 @@ static bool mips_vp_is_wfi(MIPSCPU *c) CPUState *cpu =3D CPU(c); CPUMIPSState *env =3D &c->env; =20 - return cpu->halted && mips_vp_active(env); + return cpu_halted(cpu) && mips_vp_active(env); } =20 static inline void mips_vpe_wake(MIPSCPU *c) @@ -74,7 +74,7 @@ static inline void mips_vpe_sleep(MIPSCPU *cpu) * The VPE was shut off, really go to bed. * Reset any old _WAKE requests. */ - cs->halted =3D 1; + cpu_halted_set(cs, 1); cpu_reset_interrupt(cs, CPU_INTERRUPT_WAKE); } =20 diff --git a/target/mips/kvm.c b/target/mips/kvm.c index de3e26ef1f..2b7d680547 100644 --- a/target/mips/kvm.c +++ b/target/mips/kvm.c @@ -162,7 +162,7 @@ MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_r= un *run) =20 int kvm_arch_process_async_events(CPUState *cs) { - return cs->halted; + return cpu_halted(cs); } =20 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c index 9552b280e0..152b45826c 100644 --- a/target/mips/op_helper.c +++ b/target/mips/op_helper.c @@ -1124,7 +1124,7 @@ void helper_wait(CPUMIPSState *env) { CPUState *cs =3D env_cpu(env); =20 - cs->halted =3D 1; + cpu_halted_set(cs, 1); cpu_reset_interrupt(cs, CPU_INTERRUPT_WAKE); /* * Last instruction in the block, PC was updated before diff --git a/target/mips/translate.c b/target/mips/translate.c index 25b595a17d..35ea86a49b 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -31328,7 +31328,7 @@ void cpu_state_reset(CPUMIPSState *env) env->tcs[i].CP0_TCHalt =3D 1; } env->active_tc.CP0_TCHalt =3D 1; - cs->halted =3D 1; + cpu_halted_set(cs, 1); =20 if (cs->cpu_index =3D=3D 0) { /* VPE0 starts up enabled. */ @@ -31336,7 +31336,7 @@ void cpu_state_reset(CPUMIPSState *env) env->CP0_VPEConf0 |=3D (1 << CP0VPEC0_MVP) | (1 << CP0VPEC0_VP= A); =20 /* TC0 starts up unhalted. */ - cs->halted =3D 0; + cpu_halted_set(cs, 0); env->active_tc.CP0_TCHalt =3D 0; env->tcs[0].CP0_TCHalt =3D 0; /* With thread 0 active. */ --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 21 May 2020 09:43:48 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 25/74] riscv: convert to cpu_halted Date: Thu, 21 May 2020 12:39:22 -0400 Message-Id: <20200521164011.638-26-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::742; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x742.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. 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Cota" Cc: Sagar Karandikar Cc: Bastian Koppelmann Reviewed-by: Palmer Dabbelt Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- target/riscv/op_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index c6412f680c..91f8833c2e 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -182,7 +182,7 @@ void helper_wfi(CPURISCVState *env) riscv_cpu_virt_enabled(env)) { riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); } else { - cs->halted =3D 1; + cpu_halted_set(cs, 1); cs->exception_index =3D EXCP_HLT; cpu_loop_exit(cs); } --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590080113; cv=none; d=zohomail.com; s=zohoarc; b=FOkqvoan690HTU5f4vdiUZP0JJxKiLSua6QORBx2WmokXi14fcDPIv6iu69+EljWUQV+hePH/BqU86RTVK4D/NTzzJwexbcgEtYL+Kyfi9Owdap97xQ24Oco3sqodoF86phDTnHMSOUsr5qhiFDREVAahoHR6wzhdhinb4/Yrwk= ARC-Message-Signature: i=1; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, David Hildenbrand , richard.henderson@linaro.org, Christian Borntraeger , qemu-s390x@nongnu.org, cota@braap.org, peter.puhov@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Cc: Christian Borntraeger Cc: David Hildenbrand Cc: qemu-s390x@nongnu.org Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Cornelia Huck Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- hw/intc/s390_flic.c | 2 +- target/s390x/cpu.c | 22 +++++++++++++++------- target/s390x/excp_helper.c | 2 +- target/s390x/kvm.c | 2 +- target/s390x/sigp.c | 8 ++++---- 5 files changed, 22 insertions(+), 14 deletions(-) diff --git a/hw/intc/s390_flic.c b/hw/intc/s390_flic.c index baca4d8a2d..a1c6b8a6f6 100644 --- a/hw/intc/s390_flic.c +++ b/hw/intc/s390_flic.c @@ -200,7 +200,7 @@ static void qemu_s390_flic_notify(uint32_t type) } =20 /* we always kick running CPUs for now, this is tricky */ - if (cs->halted) { + if (cpu_halted(cs)) { /* don't check for subclasses, CPUs double check when waking u= p */ if (type & FLIC_PENDING_SERVICE) { if (!(cpu->env.psw.mask & PSW_MASK_EXT)) { diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index ca50b70451..4b1961694e 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -293,7 +293,7 @@ static void s390_cpu_initfn(Object *obj) S390CPU *cpu =3D S390_CPU(obj); =20 cpu_set_cpustate_pointers(cpu); - cs->halted =3D 1; + cpu_halted_set(cs, 1); cs->exception_index =3D EXCP_HLT; object_property_add(obj, "crash-information", "GuestPanicInformation", s390_cpu_get_crash_info_qom, NULL, NULL, NULL); @@ -320,8 +320,8 @@ static void s390_cpu_finalize(Object *obj) #if !defined(CONFIG_USER_ONLY) static bool disabled_wait(CPUState *cpu) { - return cpu->halted && !(S390_CPU(cpu)->env.psw.mask & - (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK)= ); + return cpu_halted(cpu) && !(S390_CPU(cpu)->env.psw.mask & + (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCH= ECK)); } =20 static unsigned s390_count_running_cpus(void) @@ -347,10 +347,16 @@ unsigned int s390_cpu_halt(S390CPU *cpu) CPUState *cs =3D CPU(cpu); trace_cpu_halt(cs->cpu_index); =20 - if (!cs->halted) { - cs->halted =3D 1; + /* + * cpu_halted and cpu_halted_set acquire the cpu lock if it + * isn't already held, so acquire it first. + */ + cpu_mutex_lock(cs); + if (!cpu_halted(cs)) { + cpu_halted_set(cs, 1); cs->exception_index =3D EXCP_HLT; } + cpu_mutex_unlock(cs); =20 return s390_count_running_cpus(); } @@ -360,10 +366,12 @@ void s390_cpu_unhalt(S390CPU *cpu) CPUState *cs =3D CPU(cpu); trace_cpu_unhalt(cs->cpu_index); =20 - if (cs->halted) { - cs->halted =3D 0; + cpu_mutex_lock(cs); + if (cpu_halted(cs)) { + cpu_halted_set(cs, 0); cs->exception_index =3D -1; } + cpu_mutex_unlock(cs); } =20 unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu) diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 3b58d10df3..db6640ba2c 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -537,7 +537,7 @@ try_deliver: if ((env->psw.mask & PSW_MASK_WAIT) || stopped) { /* don't trigger a cpu_loop_exit(), use an interrupt instead */ cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HALT); - } else if (cs->halted) { + } else if (cpu_halted(cs)) { /* unhalt if we had a WAIT PSW somehwere in our injection chain */ s390_cpu_unhalt(cpu); } diff --git a/target/s390x/kvm.c b/target/s390x/kvm.c index 69881a0da0..ae3e0880f1 100644 --- a/target/s390x/kvm.c +++ b/target/s390x/kvm.c @@ -1094,7 +1094,7 @@ MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm= _run *run) =20 int kvm_arch_process_async_events(CPUState *cs) { - return cs->halted; + return cpu_halted(cs); } =20 static int s390_kvm_irq_to_interrupt(struct kvm_s390_irq *irq, diff --git a/target/s390x/sigp.c b/target/s390x/sigp.c index c604f17710..44d22ae3bf 100644 --- a/target/s390x/sigp.c +++ b/target/s390x/sigp.c @@ -115,7 +115,7 @@ static void sigp_stop(CPUState *cs, run_on_cpu_data arg) } =20 /* disabled wait - sleeping in user space */ - if (cs->halted) { + if (cpu_halted(cs)) { s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu); } else { /* execute the stop function */ @@ -131,7 +131,7 @@ static void sigp_stop_and_store_status(CPUState *cs, ru= n_on_cpu_data arg) SigpInfo *si =3D arg.host_ptr; =20 /* disabled wait - sleeping in user space */ - if (s390_cpu_get_state(cpu) =3D=3D S390_CPU_STATE_OPERATING && cs->hal= ted) { + if (s390_cpu_get_state(cpu) =3D=3D S390_CPU_STATE_OPERATING && cpu_hal= ted(cs)) { s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu); } =20 @@ -313,7 +313,7 @@ static void sigp_cond_emergency(S390CPU *src_cpu, S390C= PU *dst_cpu, } =20 /* this looks racy, but these values are only used when STOPPED */ - idle =3D CPU(dst_cpu)->halted; + idle =3D cpu_halted(CPU(dst_cpu)); psw_addr =3D dst_cpu->env.psw.addr; psw_mask =3D dst_cpu->env.psw.mask; asn =3D si->param; @@ -347,7 +347,7 @@ static void sigp_sense_running(S390CPU *dst_cpu, SigpIn= fo *si) } =20 /* If halted (which includes also STOPPED), it is not running */ - if (CPU(dst_cpu)->halted) { + if (cpu_halted(CPU(dst_cpu))) { set_sigp_status(si, SIGP_STAT_NOT_RUNNING); } else { si->cc =3D SIGP_CC_ORDER_CODE_ACCEPTED; --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590080263; cv=none; d=zohomail.com; s=zohoarc; b=HwYfurAr3DJsEiETN9LxC52DjFLSJ7sZBszEsjL/IG8ynISy3xd7QtDfuV7bCSNs+D66fZObCaOXCKk6owzZHRPW5wBK5Th87pHxE920u3LnqH15+gywkZDJNyRg5P9/uI+nimppUmE/lD1aic6LoiCvYllVSzYx6CpmeRAG8TU= ARC-Message-Signature: i=1; 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Thu, 21 May 2020 09:43:51 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 27/74] sparc: convert to cpu_halted Date: Thu, 21 May 2020 12:39:24 -0400 Message-Id: <20200521164011.638-28-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::832; envelope-from=robert.foley@linaro.org; helo=mail-qt1-x832.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, richard.henderson@linaro.org, Fabien Chouteau , cota@braap.org, peter.puhov@linaro.org, alex.bennee@linaro.org, Artyom Tarasenko Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Cc: Fabien Chouteau Cc: Artyom Tarasenko Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Mark Cave-Ayland Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- hw/sparc/leon3.c | 2 +- hw/sparc/sun4m.c | 8 ++++---- hw/sparc64/sparc64.c | 4 ++-- target/sparc/helper.c | 2 +- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 8f024dab7b..00d1efd430 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -132,7 +132,7 @@ static void main_cpu_reset(void *opaque) =20 cpu_reset(cpu); =20 - cpu->halted =3D 0; + cpu_halted_set(cpu, 0); env->pc =3D s->entry; env->npc =3D s->entry + 4; env->regbase[6] =3D s->sp; diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index 8dda3f7292..e189ba5395 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -192,7 +192,7 @@ static void cpu_kick_irq(SPARCCPU *cpu) CPUSPARCState *env =3D &cpu->env; CPUState *cs =3D CPU(cpu); =20 - cs->halted =3D 0; + cpu_halted_set(cs, 0); cpu_check_irqs(env); qemu_cpu_kick(cs); } @@ -223,7 +223,7 @@ static void main_cpu_reset(void *opaque) CPUState *cs =3D CPU(cpu); =20 cpu_reset(cs); - cs->halted =3D 0; + cpu_halted_set(cs, 0); } =20 static void secondary_cpu_reset(void *opaque) @@ -232,7 +232,7 @@ static void secondary_cpu_reset(void *opaque) CPUState *cs =3D CPU(cpu); =20 cpu_reset(cs); - cs->halted =3D 1; + cpu_halted_set(cs, 1); } =20 static void cpu_halt_signal(void *opaque, int irq, int level) @@ -831,7 +831,7 @@ static void cpu_devinit(const char *cpu_type, unsigned = int id, } else { qemu_register_reset(secondary_cpu_reset, cpu); cs =3D CPU(cpu); - cs->halted =3D 1; + cpu_halted_set(cs, 1); } *cpu_irqs =3D qemu_allocate_irqs(cpu_set_irq, cpu, MAX_PILS); env->prom_addr =3D prom_addr; diff --git a/hw/sparc64/sparc64.c b/hw/sparc64/sparc64.c index 100b2fab17..fe9c678459 100644 --- a/hw/sparc64/sparc64.c +++ b/hw/sparc64/sparc64.c @@ -101,7 +101,7 @@ static void cpu_kick_irq(SPARCCPU *cpu) CPUState *cs =3D CPU(cpu); CPUSPARCState *env =3D &cpu->env; =20 - cs->halted =3D 0; + cpu_halted_set(cs, 0); cpu_check_irqs(env); qemu_cpu_kick(cs); } @@ -116,7 +116,7 @@ void sparc64_cpu_set_ivec_irq(void *opaque, int irq, in= t level) if (!(env->ivec_status & 0x20)) { trace_sparc64_cpu_ivec_raise_irq(irq); cs =3D CPU(cpu); - cs->halted =3D 0; + cpu_halted_set(cs, 0); env->interrupt_index =3D TT_IVEC; env->ivec_status |=3D 0x20; env->ivec_data[0] =3D (0x1f << 6) | irq; diff --git a/target/sparc/helper.c b/target/sparc/helper.c index 07d87efa4e..90dfb1e92f 100644 --- a/target/sparc/helper.c +++ b/target/sparc/helper.c @@ -244,7 +244,7 @@ void helper_power_down(CPUSPARCState *env) { CPUState *cs =3D env_cpu(env); =20 - cs->halted =3D 1; + cpu_halted_set(cs, 1); cs->exception_index =3D EXCP_HLT; env->pc =3D env->npc; env->npc =3D env->pc + 4; --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590080392; cv=none; d=zohomail.com; s=zohoarc; b=WsdWTX7c6/5MUMXItvySxG66Yq59hA18NpAHr5XyNHDUMLpW69HGYxuBgix0+FzogWUt9ob2baHx3QINmCcZSHcdiCse6+B4Lk4vuXOf8veoc4UKDqhgTKzKzax7IeLdu6E16XsxpYMPJuQK9DuSTuFZBAxQUpNOLZ2tyDXzyWs= ARC-Message-Signature: i=1; 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Thu, 21 May 2020 09:43:52 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 28/74] xtensa: convert to cpu_halted Date: Thu, 21 May 2020 12:39:25 -0400 Message-Id: <20200521164011.638-29-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::742; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x742.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. 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Cota Signed-off-by: Robert Foley --- target/xtensa/cpu.c | 2 +- target/xtensa/exc_helper.c | 2 +- target/xtensa/helper.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 82c2ee0679..fda4a73722 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -102,7 +102,7 @@ static void xtensa_cpu_reset(DeviceState *dev) =20 #ifndef CONFIG_USER_ONLY reset_mmu(env); - s->halted =3D env->runstall; + cpu_halted_set(s, env->runstall); #endif } =20 diff --git a/target/xtensa/exc_helper.c b/target/xtensa/exc_helper.c index 601341d13a..01d1e56feb 100644 --- a/target/xtensa/exc_helper.c +++ b/target/xtensa/exc_helper.c @@ -115,7 +115,7 @@ void HELPER(waiti)(CPUXtensaState *env, uint32_t pc, ui= nt32_t intlevel) return; } =20 - cpu->halted =3D 1; + cpu_halted_set(cpu, 1); HELPER(exception)(env, EXCP_HLT); } =20 diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c index 7073381f03..031a14cf86 100644 --- a/target/xtensa/helper.c +++ b/target/xtensa/helper.c @@ -328,7 +328,7 @@ void xtensa_runstall(CPUXtensaState *env, bool runstall) CPUState *cpu =3D env_cpu(env); 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Cota Signed-off-by: Robert Foley --- gdbstub.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/gdbstub.c b/gdbstub.c index 6950fd243f..b25796b33d 100644 --- a/gdbstub.c +++ b/gdbstub.c @@ -2062,10 +2062,10 @@ static void handle_query_thread_extra(GdbCmdContext= *gdb_ctx, void *user_ctx) g_autofree char *cpu_name =3D object_get_canonical_path_component(OBJECT(cpu)); g_string_printf(rs, "%s %s [%s]", cpu_model, cpu_name, - cpu->halted ? "halted " : "running"); + cpu_halted(cpu) ? "halted " : "running"); } else { g_string_printf(rs, "CPU#%d [%s]", cpu->cpu_index, - cpu->halted ? "halted " : "running"); + cpu_halted(cpu) ? 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Cota Signed-off-by: Robert Foley --- target/openrisc/sys_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c index d9fe6c5948..2615571ce7 100644 --- a/target/openrisc/sys_helper.c +++ b/target/openrisc/sys_helper.c @@ -134,7 +134,7 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong = spr, target_ulong rb) if (env->pmr & PMR_DME || env->pmr & PMR_SME) { cpu_restore_state(cs, GETPC(), true); env->pc +=3D 4; - cs->halted =3D 1; + cpu_halted_set(cs, 1); raise_exception(cpu, EXCP_HALTED); } break; --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590080201; cv=none; d=zohomail.com; s=zohoarc; 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Thu, 21 May 2020 09:43:56 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 31/74] cpu-exec: convert to cpu_halted Date: Thu, 21 May 2020 12:39:28 -0400 Message-Id: <20200521164011.638-32-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f42; envelope-from=robert.foley@linaro.org; helo=mail-qv1-xf42.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- accel/tcg/cpu-exec.c | 25 +++++++++++++++++++++---- 1 file changed, 21 insertions(+), 4 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index d95c4848a4..e296894ea1 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -425,14 +425,21 @@ static inline TranslationBlock *tb_find(CPUState *cpu, return tb; } =20 -static inline bool cpu_handle_halt(CPUState *cpu) +static inline bool cpu_handle_halt_locked(CPUState *cpu) { - if (cpu->halted) { + g_assert(cpu_mutex_locked(cpu)); + + if (cpu_halted(cpu)) { #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) if ((cpu->interrupt_request & CPU_INTERRUPT_POLL) && replay_interrupt()) { X86CPU *x86_cpu =3D X86_CPU(cpu); + + /* prevent deadlock; cpu_mutex must be acquired _after_ the BQ= L */ + cpu_mutex_unlock(cpu); qemu_mutex_lock_iothread(); + cpu_mutex_lock(cpu); + apic_poll_irq(x86_cpu->apic_state); cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); qemu_mutex_unlock_iothread(); @@ -442,12 +449,22 @@ static inline bool cpu_handle_halt(CPUState *cpu) return true; } =20 - cpu->halted =3D 0; + cpu_halted_set(cpu, 0); } =20 return false; } =20 +static inline bool cpu_handle_halt(CPUState *cpu) +{ + bool ret; + + cpu_mutex_lock(cpu); + ret =3D cpu_handle_halt_locked(cpu); + cpu_mutex_unlock(cpu); + return ret; +} + static inline void cpu_handle_debug_exception(CPUState *cpu) { CPUClass *cc =3D CPU_GET_CLASS(cpu); @@ -546,7 +563,7 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, } else if (interrupt_request & CPU_INTERRUPT_HALT) { replay_interrupt(); cpu->interrupt_request &=3D ~CPU_INTERRUPT_HALT; - cpu->halted =3D 1; + cpu_halted_set(cpu, 1); cpu->exception_index =3D EXCP_HLT; qemu_mutex_unlock_iothread(); return true; --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 21 May 2020 09:43:57 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 32/74] cpu: convert to cpu_halted Date: Thu, 21 May 2020 12:39:29 -0400 Message-Id: <20200521164011.638-33-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::741; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x741.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" This finishes the conversion to cpu_halted. Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- accel/tcg/cpu-exec.c | 2 +- cpus.c | 4 ++-- hw/core/cpu.c | 2 +- hw/core/machine-qmp-cmds.c | 2 +- 4 files changed, 5 insertions(+), 5 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index e296894ea1..099dd83ee0 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -435,7 +435,7 @@ static inline bool cpu_handle_halt_locked(CPUState *cpu) && replay_interrupt()) { X86CPU *x86_cpu =3D X86_CPU(cpu); =20 - /* prevent deadlock; cpu_mutex must be acquired _after_ the BQ= L */ + /* locking order: cpu_mutex must be acquired _after_ the BQL */ cpu_mutex_unlock(cpu); qemu_mutex_lock_iothread(); cpu_mutex_lock(cpu); diff --git a/cpus.c b/cpus.c index 9cc5f4767e..ff67fa9f5f 100644 --- a/cpus.c +++ b/cpus.c @@ -223,7 +223,7 @@ static bool cpu_thread_is_idle(CPUState *cpu) if (cpu_is_stopped(cpu)) { return true; } - if (!cpu->halted || cpu_has_work(cpu) || + if (!cpu_halted(cpu) || cpu_has_work(cpu) || kvm_halt_in_kernel()) { return false; } @@ -1845,7 +1845,7 @@ static void *qemu_tcg_cpu_thread_fn(void *arg) * * cpu->halted should ensure we sleep in wait_io_event */ - g_assert(cpu->halted); + g_assert(cpu_halted(cpu)); break; case EXCP_ATOMIC: qemu_mutex_unlock_iothread(); diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 620feed3e9..67a9c2bb16 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -257,7 +257,7 @@ static void cpu_common_reset(DeviceState *dev) } =20 cpu->interrupt_request =3D 0; - cpu->halted =3D 0; + cpu_halted_set(cpu, 0); cpu->mem_io_pc =3D 0; cpu->icount_extra =3D 0; atomic_set(&cpu->icount_decr_ptr->u32, 0); diff --git a/hw/core/machine-qmp-cmds.c b/hw/core/machine-qmp-cmds.c index 2c5da8413d..a35559b5d8 100644 --- a/hw/core/machine-qmp-cmds.c +++ b/hw/core/machine-qmp-cmds.c @@ -62,7 +62,7 @@ CpuInfoList *qmp_query_cpus(Error **errp) info->value =3D g_malloc0(sizeof(*info->value)); info->value->CPU =3D cpu->cpu_index; info->value->current =3D (cpu =3D=3D first_cpu); - info->value->halted =3D cpu->halted; + info->value->halted =3D cpu_halted(cpu); info->value->qom_path =3D object_get_canonical_path(OBJECT(cpu)); info->value->thread_id =3D cpu->thread_id; #if defined(TARGET_I386) --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590080390; cv=none; d=zohomail.com; s=zohoarc; b=ARPvqbNTuWAqoxIMBvdxYbvC6V5eb3ka9d6Z+fR8YjNgBr8vcOTjcdZNqJbD72fvJ5kd0gO5Lx9pSA3SRwedZdhw79eARUTSRrR4nwj7TDN6dz2K8VIaGggwbOzXsherLxs2JquuK9wWb/iatta+UhzuvfxfFRSYtnxw7R8W5Pk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1590080390; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f32; envelope-from=robert.foley@linaro.org; helo=mail-qv1-xf32.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Add a comment about how atomic_read works here. The comment refers to a "BQL-less CPU loop", which will materialize toward the end of this series. Note that the modifications to cpu_reset_interrupt are there to avoid deadlock during the CPU lock transition; once that is complete, cpu_interrupt_request will be simple again. Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- hw/core/cpu.c | 27 +++++++++++++++++++++------ include/hw/core/cpu.h | 37 +++++++++++++++++++++++++++++++++++++ 2 files changed, 58 insertions(+), 6 deletions(-) diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 67a9c2bb16..be9efbeaf4 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -99,14 +99,29 @@ static void cpu_common_get_memory_mapping(CPUState *cpu, * BQL here if we need to. cpu_interrupt assumes it is held.*/ void cpu_reset_interrupt(CPUState *cpu, int mask) { - bool need_lock =3D !qemu_mutex_iothread_locked(); + bool has_bql =3D qemu_mutex_iothread_locked(); + bool has_cpu_lock =3D cpu_mutex_locked(cpu); =20 - if (need_lock) { - qemu_mutex_lock_iothread(); + if (has_bql) { + if (has_cpu_lock) { + atomic_set(&cpu->interrupt_request, cpu->interrupt_request & ~= mask); + } else { + cpu_mutex_lock(cpu); + atomic_set(&cpu->interrupt_request, cpu->interrupt_request & ~= mask); + cpu_mutex_unlock(cpu); + } + return; + } + + if (has_cpu_lock) { + cpu_mutex_unlock(cpu); } - cpu->interrupt_request &=3D ~mask; - if (need_lock) { - qemu_mutex_unlock_iothread(); + qemu_mutex_lock_iothread(); + cpu_mutex_lock(cpu); + atomic_set(&cpu->interrupt_request, cpu->interrupt_request & ~mask); + qemu_mutex_unlock_iothread(); + if (!has_cpu_lock) { + cpu_mutex_unlock(cpu); } } =20 diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 820c5b0a9a..6ed806db60 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -522,6 +522,43 @@ static inline void cpu_halted_set(CPUState *cpu, uint3= 2_t val) cpu_mutex_unlock(cpu); } =20 +/* + * When sending an interrupt, setters OR the appropriate bit and kick the + * destination vCPU. The latter can then read interrupt_request without + * acquiring the CPU lock, because once the kick-induced completes, they'l= l read + * an up-to-date interrupt_request. + * Setters always acquire the lock, which guarantees that (1) concurrent + * updates from different threads won't result in data races, and (2) the + * BQL-less CPU loop will always see an up-to-date interrupt_request, sinc= e the + * loop holds the CPU lock. + */ +static inline uint32_t cpu_interrupt_request(CPUState *cpu) +{ + return atomic_read(&cpu->interrupt_request); +} + +static inline void cpu_interrupt_request_or(CPUState *cpu, uint32_t mask) +{ + if (cpu_mutex_locked(cpu)) { + atomic_set(&cpu->interrupt_request, cpu->interrupt_request | mask); + return; + } + cpu_mutex_lock(cpu); + atomic_set(&cpu->interrupt_request, cpu->interrupt_request | mask); + cpu_mutex_unlock(cpu); +} + +static inline void cpu_interrupt_request_set(CPUState *cpu, uint32_t val) +{ + if (cpu_mutex_locked(cpu)) { + atomic_set(&cpu->interrupt_request, val); + return; + } + cpu_mutex_lock(cpu); + atomic_set(&cpu->interrupt_request, val); + cpu_mutex_unlock(cpu); +} + static inline void cpu_tb_jmp_cache_clear(CPUState *cpu) { unsigned int i; --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590080277; cv=none; d=zohomail.com; s=zohoarc; b=POxprl/FccfLlOecMAcaYf1cckv/EJGzOk+XIoIqQG4xu6Xeiilp//Y4xAz0YFrSZTHU/ytN+J975BYmuHMzffzqwDwd/QgNXkOc8ZSTGo1l4xuYhVSNkmlzbYfDFRfpx6aMfywGw9E/QufSXn7H1AGJccLWMLdfX+29xjMJN3g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1590080277; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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Cota Signed-off-by: Robert Foley --- target/ppc/excp_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 4c7da88682..5fee92c310 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -1021,7 +1021,7 @@ bool ppc_cpu_exec_interrupt(CPUState *cs, int interru= pt_request) if (interrupt_request & CPU_INTERRUPT_HARD) { ppc_hw_interrupt(env); if (env->pending_interrupts =3D=3D 0) { - cs->interrupt_request &=3D ~CPU_INTERRUPT_HARD; + cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); } return true; } --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590080479; cv=none; d=zohomail.com; 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Thu, 21 May 2020 09:44:01 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 35/74] exec: use cpu_reset_interrupt Date: Thu, 21 May 2020 12:39:32 -0400 Message-Id: <20200521164011.638-36-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::842; envelope-from=robert.foley@linaro.org; helo=mail-qt1-x842.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. 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Cota Signed-off-by: Robert Foley --- exec.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/exec.c b/exec.c index 5162f0d12f..37e039de06 100644 --- a/exec.c +++ b/exec.c @@ -752,7 +752,7 @@ static int cpu_common_post_load(void *opaque, int versi= on_id) =20 /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the version_id is increased. */ - cpu->interrupt_request &=3D ~0x01; + cpu_reset_interrupt(cpu, 1); tlb_flush(cpu); =20 /* loadvm has just updated the content of RAM, bypassing the --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590080534; cv=none; d=zohomail.com; s=zohoarc; b=FgmMfWDarNxkQXqhdEvZoy4Exf2vdwPMODRtH5xNb/q3yghjQtSA+EP6ojkPP3WrhXoHbBRSj1hVBbnGCq67iYM5qTnx2fQW8oaQP5A61VkUCnhQVEO5gDuhHkLsnG+xRUqKuVID5Rsbo9WSQNCMnbJqb9Flif4Yp27aO2rEbVk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1590080534; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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Cota Signed-off-by: Robert Foley --- target/i386/hax-all.c | 4 ++-- target/i386/hvf/x86hvf.c | 8 ++++---- target/i386/kvm.c | 14 +++++++------- target/i386/seg_helper.c | 13 ++++++------- target/i386/svm_helper.c | 2 +- target/i386/whpx-all.c | 10 +++++----- 6 files changed, 25 insertions(+), 26 deletions(-) diff --git a/target/i386/hax-all.c b/target/i386/hax-all.c index 25bf80b5f2..1edd6c77df 100644 --- a/target/i386/hax-all.c +++ b/target/i386/hax-all.c @@ -425,7 +425,7 @@ static int hax_vcpu_interrupt(CPUArchState *env) irq =3D cpu_get_pic_interrupt(env); if (irq >=3D 0) { hax_inject_interrupt(env, irq); - cpu->interrupt_request &=3D ~CPU_INTERRUPT_HARD; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD); } } =20 @@ -473,7 +473,7 @@ static int hax_vcpu_hax_exec(CPUArchState *env) } =20 if (cpu->interrupt_request & CPU_INTERRUPT_POLL) { - cpu->interrupt_request &=3D ~CPU_INTERRUPT_POLL; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); apic_poll_irq(x86_cpu->apic_state); } =20 diff --git a/target/i386/hvf/x86hvf.c b/target/i386/hvf/x86hvf.c index cbb2144724..90f1662d0c 100644 --- a/target/i386/hvf/x86hvf.c +++ b/target/i386/hvf/x86hvf.c @@ -402,7 +402,7 @@ bool hvf_inject_interrupts(CPUState *cpu_state) =20 if (cpu_state->interrupt_request & CPU_INTERRUPT_NMI) { if (!(env->hflags2 & HF2_NMI_MASK) && !(info & VMCS_INTR_VALID)) { - cpu_state->interrupt_request &=3D ~CPU_INTERRUPT_NMI; + cpu_reset_interrupt(cpu_state, CPU_INTERRUPT_NMI); info =3D VMCS_INTR_VALID | VMCS_INTR_T_NMI | EXCP02_NMI; wvmcs(cpu_state->hvf_fd, VMCS_ENTRY_INTR_INFO, info); } else { @@ -414,7 +414,7 @@ bool hvf_inject_interrupts(CPUState *cpu_state) (cpu_state->interrupt_request & CPU_INTERRUPT_HARD) && (EFLAGS(env) & IF_MASK) && !(info & VMCS_INTR_VALID)) { int line =3D cpu_get_pic_interrupt(&x86cpu->env); - cpu_state->interrupt_request &=3D ~CPU_INTERRUPT_HARD; + cpu_reset_interrupt(cpu_state, CPU_INTERRUPT_HARD); if (line >=3D 0) { wvmcs(cpu_state->hvf_fd, VMCS_ENTRY_INTR_INFO, line | VMCS_INTR_VALID | VMCS_INTR_T_HWINTR); @@ -440,7 +440,7 @@ int hvf_process_events(CPUState *cpu_state) } =20 if (cpu_state->interrupt_request & CPU_INTERRUPT_POLL) { - cpu_state->interrupt_request &=3D ~CPU_INTERRUPT_POLL; + cpu_reset_interrupt(cpu_state, CPU_INTERRUPT_POLL); apic_poll_irq(cpu->apic_state); } if (((cpu_state->interrupt_request & CPU_INTERRUPT_HARD) && @@ -453,7 +453,7 @@ int hvf_process_events(CPUState *cpu_state) do_cpu_sipi(cpu); } if (cpu_state->interrupt_request & CPU_INTERRUPT_TPR) { - cpu_state->interrupt_request &=3D ~CPU_INTERRUPT_TPR; + cpu_reset_interrupt(cpu_state, CPU_INTERRUPT_TPR); hvf_cpu_synchronize_state(cpu_state); apic_handle_tpr_access_report(cpu->apic_state, env->eip, env->tpr_access_type); diff --git a/target/i386/kvm.c b/target/i386/kvm.c index 1c1d4c8c0a..2451840b36 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -3632,7 +3632,7 @@ static int kvm_put_vcpu_events(X86CPU *cpu, int level) */ events.smi.pending =3D cs->interrupt_request & CPU_INTERRUPT_S= MI; events.smi.latched_init =3D cs->interrupt_request & CPU_INTERR= UPT_INIT; - cs->interrupt_request &=3D ~(CPU_INTERRUPT_INIT | CPU_INTERRUP= T_SMI); + cpu_reset_interrupt(cs, CPU_INTERRUPT_INIT | CPU_INTERRUPT_SMI= ); } else { /* Keep these in cs->interrupt_request. */ events.smi.pending =3D 0; @@ -3995,7 +3995,7 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *= run) if (cpu->interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_SMI)) { if (cpu->interrupt_request & CPU_INTERRUPT_NMI) { qemu_mutex_lock_iothread(); - cpu->interrupt_request &=3D ~CPU_INTERRUPT_NMI; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_NMI); qemu_mutex_unlock_iothread(); DPRINTF("injected NMI\n"); ret =3D kvm_vcpu_ioctl(cpu, KVM_NMI); @@ -4006,7 +4006,7 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *= run) } if (cpu->interrupt_request & CPU_INTERRUPT_SMI) { qemu_mutex_lock_iothread(); - cpu->interrupt_request &=3D ~CPU_INTERRUPT_SMI; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_SMI); qemu_mutex_unlock_iothread(); DPRINTF("injected SMI\n"); ret =3D kvm_vcpu_ioctl(cpu, KVM_SMI); @@ -4042,7 +4042,7 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *= run) (env->eflags & IF_MASK)) { int irq; =20 - cpu->interrupt_request &=3D ~CPU_INTERRUPT_HARD; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD); irq =3D cpu_get_pic_interrupt(env); if (irq >=3D 0) { struct kvm_interrupt intr; @@ -4113,7 +4113,7 @@ int kvm_arch_process_async_events(CPUState *cs) /* We must not raise CPU_INTERRUPT_MCE if it's not supported. */ assert(env->mcg_cap); =20 - cs->interrupt_request &=3D ~CPU_INTERRUPT_MCE; + cpu_reset_interrupt(cs, CPU_INTERRUPT_MCE); =20 kvm_cpu_synchronize_state(cs); =20 @@ -4143,7 +4143,7 @@ int kvm_arch_process_async_events(CPUState *cs) } =20 if (cs->interrupt_request & CPU_INTERRUPT_POLL) { - cs->interrupt_request &=3D ~CPU_INTERRUPT_POLL; + cpu_reset_interrupt(cs, CPU_INTERRUPT_POLL); apic_poll_irq(cpu->apic_state); } if (((cs->interrupt_request & CPU_INTERRUPT_HARD) && @@ -4156,7 +4156,7 @@ int kvm_arch_process_async_events(CPUState *cs) do_cpu_sipi(cpu); } if (cs->interrupt_request & CPU_INTERRUPT_TPR) { - cs->interrupt_request &=3D ~CPU_INTERRUPT_TPR; + cpu_reset_interrupt(cs, CPU_INTERRUPT_TPR); kvm_cpu_synchronize_state(cs); apic_handle_tpr_access_report(cpu->apic_state, env->eip, env->tpr_access_type); diff --git a/target/i386/seg_helper.c b/target/i386/seg_helper.c index b96de068ca..818f65f35f 100644 --- a/target/i386/seg_helper.c +++ b/target/i386/seg_helper.c @@ -1332,7 +1332,7 @@ bool x86_cpu_exec_interrupt(CPUState *cs, int interru= pt_request) switch (interrupt_request) { #if !defined(CONFIG_USER_ONLY) case CPU_INTERRUPT_POLL: - cs->interrupt_request &=3D ~CPU_INTERRUPT_POLL; + cpu_reset_interrupt(cs, CPU_INTERRUPT_POLL); apic_poll_irq(cpu->apic_state); break; #endif @@ -1341,23 +1341,22 @@ bool x86_cpu_exec_interrupt(CPUState *cs, int inter= rupt_request) break; case CPU_INTERRUPT_SMI: cpu_svm_check_intercept_param(env, SVM_EXIT_SMI, 0, 0); - cs->interrupt_request &=3D ~CPU_INTERRUPT_SMI; + cpu_reset_interrupt(cs, CPU_INTERRUPT_SMI); do_smm_enter(cpu); break; case CPU_INTERRUPT_NMI: cpu_svm_check_intercept_param(env, SVM_EXIT_NMI, 0, 0); - cs->interrupt_request &=3D ~CPU_INTERRUPT_NMI; + cpu_reset_interrupt(cs, CPU_INTERRUPT_NMI); env->hflags2 |=3D HF2_NMI_MASK; do_interrupt_x86_hardirq(env, EXCP02_NMI, 1); break; case CPU_INTERRUPT_MCE: - cs->interrupt_request &=3D ~CPU_INTERRUPT_MCE; + cpu_reset_interrupt(cs, CPU_INTERRUPT_MCE); do_interrupt_x86_hardirq(env, EXCP12_MCHK, 0); break; case CPU_INTERRUPT_HARD: cpu_svm_check_intercept_param(env, SVM_EXIT_INTR, 0, 0); - cs->interrupt_request &=3D ~(CPU_INTERRUPT_HARD | - CPU_INTERRUPT_VIRQ); + cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD | CPU_INTERRUPT_VIRQ); intno =3D cpu_get_pic_interrupt(env); qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing hardware INT=3D0x%02x\n", intno); @@ -1372,7 +1371,7 @@ bool x86_cpu_exec_interrupt(CPUState *cs, int interru= pt_request) qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing virtual hardware INT=3D0x%02x\n", intno); do_interrupt_x86_hardirq(env, intno, 1); - cs->interrupt_request &=3D ~CPU_INTERRUPT_VIRQ; + cpu_reset_interrupt(cs, CPU_INTERRUPT_VIRQ); break; #endif } diff --git a/target/i386/svm_helper.c b/target/i386/svm_helper.c index 7b8105a1c3..63eb136743 100644 --- a/target/i386/svm_helper.c +++ b/target/i386/svm_helper.c @@ -700,7 +700,7 @@ void do_vmexit(CPUX86State *env, uint32_t exit_code, ui= nt64_t exit_info_1) env->hflags &=3D ~HF_GUEST_MASK; env->intercept =3D 0; env->intercept_exceptions =3D 0; - cs->interrupt_request &=3D ~CPU_INTERRUPT_VIRQ; + cpu_reset_interrupt(cs, CPU_INTERRUPT_VIRQ); env->tsc_offset =3D 0; =20 env->gdt.base =3D x86_ldq_phys(cs, env->vm_hsave + offsetof(struct vm= cb, diff --git a/target/i386/whpx-all.c b/target/i386/whpx-all.c index efc2d88810..d5beb4a5e2 100644 --- a/target/i386/whpx-all.c +++ b/target/i386/whpx-all.c @@ -790,14 +790,14 @@ static void whpx_vcpu_pre_run(CPUState *cpu) if (!vcpu->interruption_pending && cpu->interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_SMI)) { if (cpu->interrupt_request & CPU_INTERRUPT_NMI) { - cpu->interrupt_request &=3D ~CPU_INTERRUPT_NMI; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_NMI); vcpu->interruptable =3D false; new_int.InterruptionType =3D WHvX64PendingNmi; new_int.InterruptionPending =3D 1; new_int.InterruptionVector =3D 2; } if (cpu->interrupt_request & CPU_INTERRUPT_SMI) { - cpu->interrupt_request &=3D ~CPU_INTERRUPT_SMI; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_SMI); } } =20 @@ -820,7 +820,7 @@ static void whpx_vcpu_pre_run(CPUState *cpu) vcpu->interruptable && (env->eflags & IF_MASK)) { assert(!new_int.InterruptionPending); if (cpu->interrupt_request & CPU_INTERRUPT_HARD) { - cpu->interrupt_request &=3D ~CPU_INTERRUPT_HARD; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD); irq =3D cpu_get_pic_interrupt(env); if (irq >=3D 0) { new_int.InterruptionType =3D WHvX64PendingInterrupt; @@ -911,7 +911,7 @@ static void whpx_vcpu_process_async_events(CPUState *cp= u) } =20 if (cpu->interrupt_request & CPU_INTERRUPT_POLL) { - cpu->interrupt_request &=3D ~CPU_INTERRUPT_POLL; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); apic_poll_irq(x86_cpu->apic_state); } =20 @@ -927,7 +927,7 @@ static void whpx_vcpu_process_async_events(CPUState *cp= u) } =20 if (cpu->interrupt_request & CPU_INTERRUPT_TPR) { - cpu->interrupt_request &=3D ~CPU_INTERRUPT_TPR; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_TPR); whpx_cpu_synchronize_state(cpu); apic_handle_tpr_access_report(x86_cpu->apic_state, env->eip, env->tpr_access_type); --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590080648; cv=none; d=zohomail.com; s=zohoarc; b=OefFsR77cF/RNSmAu9pw2+RxvOLX3fN/5lT9qxowgOMvKHuv4hP/RU34KSyXL/8b1CnerL0knOEfHnL3vg9QfeGm6Vo+wLscaOQX60Je9IApKWDzyr+VZSUKa+NqdjWOqiUHIXY0i1zUxBlhlCMXILtASGSr+pUJ/wBhf06TJPM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; 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Thu, 21 May 2020 09:44:04 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 37/74] s390x: use cpu_reset_interrupt Date: Thu, 21 May 2020 12:39:34 -0400 Message-Id: <20200521164011.638-38-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::744; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x744.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. 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Cota Signed-off-by: Robert Foley --- target/s390x/excp_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index db6640ba2c..dde7afc2f0 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -530,7 +530,7 @@ try_deliver: =20 /* we might still have pending interrupts, but not deliverable */ if (!env->pending_int && !qemu_s390_flic_has_any(flic)) { - cs->interrupt_request &=3D ~CPU_INTERRUPT_HARD; + cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); } =20 /* WAIT PSW during interrupt injection or STOP interrupt */ --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590080394; cv=none; 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Thu, 21 May 2020 09:44:05 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 38/74] openrisc: use cpu_reset_interrupt Date: Thu, 21 May 2020 12:39:35 -0400 Message-Id: <20200521164011.638-39-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::742; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x742.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, richard.henderson@linaro.org, cota@braap.org, peter.puhov@linaro.org, Paolo Bonzini , Stafford Horne , alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Paolo Bonzini Cc: Stafford Horne Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Paolo Bonzini Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- target/openrisc/sys_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c index 2615571ce7..e54c148d4f 100644 --- a/target/openrisc/sys_helper.c +++ b/target/openrisc/sys_helper.c @@ -167,7 +167,7 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong = spr, target_ulong rb) env->ttmr =3D (rb & ~TTMR_IP) | ip; } else { /* Clear IP bit. */ env->ttmr =3D rb & ~TTMR_IP; - cs->interrupt_request &=3D ~CPU_INTERRUPT_TIMER; + cpu_reset_interrupt(cs, CPU_INTERRUPT_TIMER); } =20 cpu_openrisc_timer_update(cpu); --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590080599; 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Thu, 21 May 2020 09:44:07 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 39/74] arm: convert to cpu_interrupt_request Date: Thu, 21 May 2020 12:39:36 -0400 Message-Id: <20200521164011.638-40-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::742; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x742.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , robert.foley@linaro.org, richard.henderson@linaro.org, cota@braap.org, qemu-arm@nongnu.org, peter.puhov@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Cc: Peter Maydell Cc: qemu-arm@nongnu.org Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- target/arm/cpu.c | 6 +++--- target/arm/helper.c | 16 +++++++--------- target/arm/machine.c | 2 +- 3 files changed, 11 insertions(+), 13 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index dc435a18a1..6c308268a9 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -75,7 +75,7 @@ static bool arm_cpu_has_work(CPUState *cs) ARMCPU *cpu =3D ARM_CPU(cs); =20 return (cpu->power_state !=3D PSCI_OFF) - && cs->interrupt_request & + && cpu_interrupt_request(cs) & (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_VFIQ | CPU_INTERRUPT_VIRQ | CPU_INTERRUPT_EXITTB); @@ -586,7 +586,7 @@ void arm_cpu_update_virq(ARMCPU *cpu) bool new_state =3D (env->cp15.hcr_el2 & HCR_VI) || (env->irq_line_state & CPU_INTERRUPT_VIRQ); =20 - if (new_state !=3D ((cs->interrupt_request & CPU_INTERRUPT_VIRQ) !=3D = 0)) { + if (new_state !=3D ((cpu_interrupt_request(cs) & CPU_INTERRUPT_VIRQ) != =3D 0)) { if (new_state) { cpu_interrupt(cs, CPU_INTERRUPT_VIRQ); } else { @@ -607,7 +607,7 @@ void arm_cpu_update_vfiq(ARMCPU *cpu) bool new_state =3D (env->cp15.hcr_el2 & HCR_VF) || (env->irq_line_state & CPU_INTERRUPT_VFIQ); =20 - if (new_state !=3D ((cs->interrupt_request & CPU_INTERRUPT_VFIQ) !=3D = 0)) { + if (new_state !=3D ((cpu_interrupt_request(cs) & CPU_INTERRUPT_VFIQ) != =3D 0)) { if (new_state) { cpu_interrupt(cs, CPU_INTERRUPT_VFIQ); } else { diff --git a/target/arm/helper.c b/target/arm/helper.c index a92ae55672..5d018b2d88 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -2079,26 +2079,27 @@ static uint64_t isr_read(CPUARMState *env, const AR= MCPRegInfo *ri) CPUState *cs =3D env_cpu(env); uint64_t hcr_el2 =3D arm_hcr_el2_eff(env); uint64_t ret =3D 0; + uint32_t interrupt_request =3D cpu_interrupt_request(cs); bool allow_virt =3D (arm_current_el(env) =3D=3D 1 && (!arm_is_secure_below_el3(env) || (env->cp15.scr_el3 & SCR_EEL2))); =20 if (allow_virt && (hcr_el2 & HCR_IMO)) { - if (cs->interrupt_request & CPU_INTERRUPT_VIRQ) { + if (interrupt_request & CPU_INTERRUPT_VIRQ) { ret |=3D CPSR_I; } } else { - if (cs->interrupt_request & CPU_INTERRUPT_HARD) { + if (interrupt_request & CPU_INTERRUPT_HARD) { ret |=3D CPSR_I; } } =20 if (allow_virt && (hcr_el2 & HCR_FMO)) { - if (cs->interrupt_request & CPU_INTERRUPT_VFIQ) { + if (interrupt_request & CPU_INTERRUPT_VFIQ) { ret |=3D CPSR_F; } } else { - if (cs->interrupt_request & CPU_INTERRUPT_FIQ) { + if (interrupt_request & CPU_INTERRUPT_FIQ) { ret |=3D CPSR_F; } } @@ -9591,10 +9592,7 @@ void arm_cpu_do_interrupt(CPUState *cs) } #endif =20 - /* Hooks may change global state so BQL should be held, also the - * BQL needs to be held for any modification of - * cs->interrupt_request. - */ + /* Hooks may change global state so BQL should be held */ g_assert(qemu_mutex_iothread_locked()); =20 arm_call_pre_el_change_hook(cpu); @@ -9609,7 +9607,7 @@ void arm_cpu_do_interrupt(CPUState *cs) arm_call_el_change_hook(cpu); =20 if (!kvm_enabled()) { - cs->interrupt_request |=3D CPU_INTERRUPT_EXITTB; + cpu_interrupt_request_or(cs, CPU_INTERRUPT_EXITTB); } } #endif /* !CONFIG_USER_ONLY */ diff --git a/target/arm/machine.c b/target/arm/machine.c index c5a2114f51..42f4368de3 100644 --- a/target/arm/machine.c +++ b/target/arm/machine.c @@ -713,7 +713,7 @@ static int cpu_post_load(void *opaque, int version_id) if (env->irq_line_state =3D=3D UINT32_MAX) { CPUState *cs =3D CPU(cpu); =20 - env->irq_line_state =3D cs->interrupt_request & + env->irq_line_state =3D cpu_interrupt_request(cs) & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_FIQ | CPU_INTERRUPT_VIRQ | CPU_INTERRUPT_VFIQ); } --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590080657; cv=none; d=zohomail.com; s=zohoarc; b=h5GqceYzZaZVGwH362eWR+M1W9i56mjWSg8svBawAJ0q8tfrNADiCMjlpqcNBS3MX2GjOoLWDHdHt+7ZQfl1RP+mS5RpHOIgkrOB7YDYwGr4ZT0tlYQCCUugZCGl4ag4VvYNTgDzXd2EfXbRHWODioV9+useAaXgJWLH7SAlW7s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1590080657; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- target/i386/cpu.c | 2 +- target/i386/helper.c | 4 ++-- target/i386/svm_helper.c | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 9e8ae1569f..2b60537b23 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7051,7 +7051,7 @@ int x86_cpu_pending_interrupt(CPUState *cs, int inter= rupt_request) =20 static bool x86_cpu_has_work(CPUState *cs) { - return x86_cpu_pending_interrupt(cs, cs->interrupt_request) !=3D 0; + return x86_cpu_pending_interrupt(cs, cpu_interrupt_request(cs)) !=3D 0; } =20 static void x86_disas_set_info(CPUState *cs, disassemble_info *info) diff --git a/target/i386/helper.c b/target/i386/helper.c index 058de4073d..623a7299ac 100644 --- a/target/i386/helper.c +++ b/target/i386/helper.c @@ -1029,12 +1029,12 @@ void do_cpu_init(X86CPU *cpu) CPUState *cs =3D CPU(cpu); CPUX86State *env =3D &cpu->env; CPUX86State *save =3D g_new(CPUX86State, 1); - int sipi =3D cs->interrupt_request & CPU_INTERRUPT_SIPI; + int sipi =3D cpu_interrupt_request(cs) & CPU_INTERRUPT_SIPI; =20 *save =3D *env; =20 cpu_reset(cs); - cs->interrupt_request =3D sipi; + cpu_interrupt_request_set(cs, sipi); memcpy(&env->start_init_save, &save->start_init_save, offsetof(CPUX86State, end_init_save) - offsetof(CPUX86State, start_init_save)); diff --git a/target/i386/svm_helper.c b/target/i386/svm_helper.c index 63eb136743..c739bf0d9c 100644 --- a/target/i386/svm_helper.c +++ b/target/i386/svm_helper.c @@ -316,7 +316,7 @@ void helper_vmrun(CPUX86State *env, int aflag, int next= _eip_addend) if (int_ctl & V_IRQ_MASK) { CPUState *cs =3D env_cpu(env); =20 - cs->interrupt_request |=3D CPU_INTERRUPT_VIRQ; + cpu_interrupt_request_or(cs, CPU_INTERRUPT_VIRQ); } =20 /* maybe we need to inject an event */ @@ -674,7 +674,7 @@ void do_vmexit(CPUX86State *env, uint32_t exit_code, ui= nt64_t exit_info_1) env->vm_vmcb + offsetof(struct vmcb, control.int_ct= l)); int_ctl &=3D ~(V_TPR_MASK | V_IRQ_MASK); int_ctl |=3D env->v_tpr & V_TPR_MASK; - if (cs->interrupt_request & CPU_INTERRUPT_VIRQ) { + if (cpu_interrupt_request(cs) & CPU_INTERRUPT_VIRQ) { int_ctl |=3D V_IRQ_MASK; } x86_stl_phys(cs, --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590080699; cv=none; d=zohomail.com; s=zohoarc; b=mVfgf8M9P4ejjJ53QUn0azasM4k9dcseekSrna2dRJpldn0oibRJbFiEa7GKs/Uek6ySLmI8aBuMBdHObq1u1tRvJZL1sM5rFgB1+gC8WYXfktoup7FRJxPYGDu5zqOhFhrZPotcZ9i9KFMcWitt5kJKqMXamzbGPs3DThx+ZMs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1590080699; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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Cota Signed-off-by: Robert Foley --- target/i386/kvm.c | 58 ++++++++++++++++++++++++++++------------------- 1 file changed, 35 insertions(+), 23 deletions(-) diff --git a/target/i386/kvm.c b/target/i386/kvm.c index 2451840b36..9b0080a629 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -3627,11 +3627,14 @@ static int kvm_put_vcpu_events(X86CPU *cpu, int lev= el) events.smi.smm =3D !!(env->hflags & HF_SMM_MASK); events.smi.smm_inside_nmi =3D !!(env->hflags2 & HF2_SMM_INSIDE_NMI= _MASK); if (kvm_irqchip_in_kernel()) { + uint32_t interrupt_request; + /* As soon as these are moved to the kernel, remove them * from cs->interrupt_request. */ - events.smi.pending =3D cs->interrupt_request & CPU_INTERRUPT_S= MI; - events.smi.latched_init =3D cs->interrupt_request & CPU_INTERR= UPT_INIT; + interrupt_request =3D cpu_interrupt_request(cs); + events.smi.pending =3D interrupt_request & CPU_INTERRUPT_SMI; + events.smi.latched_init =3D interrupt_request & CPU_INTERRUPT_= INIT; cpu_reset_interrupt(cs, CPU_INTERRUPT_INIT | CPU_INTERRUPT_SMI= ); } else { /* Keep these in cs->interrupt_request. */ @@ -3989,14 +3992,14 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run= *run) { X86CPU *x86_cpu =3D X86_CPU(cpu); CPUX86State *env =3D &x86_cpu->env; + uint32_t interrupt_request; int ret; =20 + interrupt_request =3D cpu_interrupt_request(cpu); /* Inject NMI */ - if (cpu->interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_SMI)) { - if (cpu->interrupt_request & CPU_INTERRUPT_NMI) { - qemu_mutex_lock_iothread(); + if (interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_SMI)) { + if (interrupt_request & CPU_INTERRUPT_NMI) { cpu_reset_interrupt(cpu, CPU_INTERRUPT_NMI); - qemu_mutex_unlock_iothread(); DPRINTF("injected NMI\n"); ret =3D kvm_vcpu_ioctl(cpu, KVM_NMI); if (ret < 0) { @@ -4004,10 +4007,8 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run = *run) strerror(-ret)); } } - if (cpu->interrupt_request & CPU_INTERRUPT_SMI) { - qemu_mutex_lock_iothread(); + if (interrupt_request & CPU_INTERRUPT_SMI) { cpu_reset_interrupt(cpu, CPU_INTERRUPT_SMI); - qemu_mutex_unlock_iothread(); DPRINTF("injected SMI\n"); ret =3D kvm_vcpu_ioctl(cpu, KVM_SMI); if (ret < 0) { @@ -4021,16 +4022,22 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run= *run) qemu_mutex_lock_iothread(); } =20 + /* + * We might have cleared some bits in cpu->interrupt_request since rea= ding + * it; read it again. + */ + interrupt_request =3D cpu_interrupt_request(cpu); + /* Force the VCPU out of its inner loop to process any INIT requests * or (for userspace APIC, but it is cheap to combine the checks here) * pending TPR access reports. */ - if (cpu->interrupt_request & (CPU_INTERRUPT_INIT | CPU_INTERRUPT_TPR))= { - if ((cpu->interrupt_request & CPU_INTERRUPT_INIT) && + if (interrupt_request & (CPU_INTERRUPT_INIT | CPU_INTERRUPT_TPR)) { + if ((interrupt_request & CPU_INTERRUPT_INIT) && !(env->hflags & HF_SMM_MASK)) { cpu->exit_request =3D 1; } - if (cpu->interrupt_request & CPU_INTERRUPT_TPR) { + if (interrupt_request & CPU_INTERRUPT_TPR) { cpu->exit_request =3D 1; } } @@ -4038,7 +4045,7 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *= run) if (!kvm_pic_in_kernel()) { /* Try to inject an interrupt if the guest can accept it */ if (run->ready_for_interrupt_injection && - (cpu->interrupt_request & CPU_INTERRUPT_HARD) && + (interrupt_request & CPU_INTERRUPT_HARD) && (env->eflags & IF_MASK)) { int irq; =20 @@ -4062,7 +4069,7 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *= run) * interrupt, request an interrupt window exit. This will * cause a return to userspace as soon as the guest is ready to * receive interrupts. */ - if ((cpu->interrupt_request & CPU_INTERRUPT_HARD)) { + if ((cpu_interrupt_request(cpu) & CPU_INTERRUPT_HARD)) { run->request_interrupt_window =3D 1; } else { run->request_interrupt_window =3D 0; @@ -4108,8 +4115,9 @@ int kvm_arch_process_async_events(CPUState *cs) { X86CPU *cpu =3D X86_CPU(cs); CPUX86State *env =3D &cpu->env; + uint32_t interrupt_request; =20 - if (cs->interrupt_request & CPU_INTERRUPT_MCE) { + if (cpu_interrupt_request(cs) & CPU_INTERRUPT_MCE) { /* We must not raise CPU_INTERRUPT_MCE if it's not supported. */ assert(env->mcg_cap); =20 @@ -4132,7 +4140,7 @@ int kvm_arch_process_async_events(CPUState *cs) } } =20 - if ((cs->interrupt_request & CPU_INTERRUPT_INIT) && + if ((cpu_interrupt_request(cs) & CPU_INTERRUPT_INIT) && !(env->hflags & HF_SMM_MASK)) { kvm_cpu_synchronize_state(cs); do_cpu_init(cpu); @@ -4142,20 +4150,21 @@ int kvm_arch_process_async_events(CPUState *cs) return 0; } =20 - if (cs->interrupt_request & CPU_INTERRUPT_POLL) { + if (cpu_interrupt_request(cs) & CPU_INTERRUPT_POLL) { cpu_reset_interrupt(cs, CPU_INTERRUPT_POLL); apic_poll_irq(cpu->apic_state); } - if (((cs->interrupt_request & CPU_INTERRUPT_HARD) && + interrupt_request =3D cpu_interrupt_request(cs); + if (((interrupt_request & CPU_INTERRUPT_HARD) && (env->eflags & IF_MASK)) || - (cs->interrupt_request & CPU_INTERRUPT_NMI)) { + (interrupt_request & CPU_INTERRUPT_NMI)) { cpu_halted_set(cs, 0); } - if (cs->interrupt_request & CPU_INTERRUPT_SIPI) { + if (interrupt_request & CPU_INTERRUPT_SIPI) { kvm_cpu_synchronize_state(cs); do_cpu_sipi(cpu); } - if (cs->interrupt_request & CPU_INTERRUPT_TPR) { + if (cpu_interrupt_request(cs) & CPU_INTERRUPT_TPR) { cpu_reset_interrupt(cs, CPU_INTERRUPT_TPR); kvm_cpu_synchronize_state(cs); apic_handle_tpr_access_report(cpu->apic_state, env->eip, @@ -4169,10 +4178,13 @@ static int kvm_handle_halt(X86CPU *cpu) { CPUState *cs =3D CPU(cpu); CPUX86State *env =3D &cpu->env; + uint32_t interrupt_request; + + interrupt_request =3D cpu_interrupt_request(cs); =20 - if (!((cs->interrupt_request & CPU_INTERRUPT_HARD) && + if (!((interrupt_request & CPU_INTERRUPT_HARD) && (env->eflags & IF_MASK)) && - !(cs->interrupt_request & CPU_INTERRUPT_NMI)) { + !(interrupt_request & CPU_INTERRUPT_NMI)) { cpu_halted_set(cs, 1); return EXCP_HLT; } --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590080817; cv=none; d=zohomail.com; s=zohoarc; b=nkbPr/3zVjHuXyMkYN6CUY2yGyDjOSLuCzSGeyAV9EkjM84OGiypaHdEvxcjOxkGj7e3+qqMKGTEcM5ceEXtd5RTdIfyhcfVbx77m6t3jVCJa2ONbuECIriZm0JeCyKxpBWs4xT0AqEO9PIKlFZ4FuwWnrjHIDtYIZ2MHOb8TRc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; 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Thu, 21 May 2020 09:44:11 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 42/74] i386/hax-all: convert to cpu_interrupt_request Date: Thu, 21 May 2020 12:39:39 -0400 Message-Id: <20200521164011.638-43-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::743; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x743.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota [RF: Converted new code to cpu_interrupt_request] Signed-off-by: Robert Foley --- target/i386/hax-all.c | 34 +++++++++++++++++++--------------- 1 file changed, 19 insertions(+), 15 deletions(-) diff --git a/target/i386/hax-all.c b/target/i386/hax-all.c index 1edd6c77df..66de14b27b 100644 --- a/target/i386/hax-all.c +++ b/target/i386/hax-all.c @@ -285,7 +285,7 @@ int hax_vm_destroy(struct hax_vm *vm) =20 static void hax_handle_interrupt(CPUState *cpu, int mask) { - cpu->interrupt_request |=3D mask; + cpu_interrupt_request_or(cpu, mask); =20 if (!qemu_cpu_is_self(cpu)) { qemu_cpu_kick(cpu); @@ -419,7 +419,7 @@ static int hax_vcpu_interrupt(CPUArchState *env) * Unlike KVM, HAX kernel check for the eflags, instead of qemu */ if (ht->ready_for_interrupt_injection && - (cpu->interrupt_request & CPU_INTERRUPT_HARD)) { + (cpu_interrupt_request(cpu) & CPU_INTERRUPT_HARD)) { int irq; =20 irq =3D cpu_get_pic_interrupt(env); @@ -433,7 +433,7 @@ static int hax_vcpu_interrupt(CPUArchState *env) * interrupt, request an interrupt window exit. This will * cause a return to userspace as soon as the guest is ready to * receive interrupts. */ - if ((cpu->interrupt_request & CPU_INTERRUPT_HARD)) { + if ((cpu_interrupt_request(cpu) & CPU_INTERRUPT_HARD)) { ht->request_interrupt_window =3D 1; } else { ht->request_interrupt_window =3D 0; @@ -472,7 +472,7 @@ static int hax_vcpu_hax_exec(CPUArchState *env) return 0; } =20 - if (cpu->interrupt_request & CPU_INTERRUPT_POLL) { + if (cpu_interrupt_request(cpu) & CPU_INTERRUPT_POLL) { cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); apic_poll_irq(x86_cpu->apic_state); } @@ -495,20 +495,20 @@ static int hax_vcpu_hax_exec(CPUArchState *env) * c) INIT signal; * d) SIPI signal. */ - if (((cpu->interrupt_request & CPU_INTERRUPT_HARD) && + if (((cpu_interrupt_request(cpu) & CPU_INTERRUPT_HARD) && (env->eflags & IF_MASK)) || - (cpu->interrupt_request & CPU_INTERRUPT_NMI)) { + (cpu_interrupt_request(cpu) & CPU_INTERRUPT_NMI)) { cpu_halted_set(cpu, 0); } =20 - if (cpu->interrupt_request & CPU_INTERRUPT_INIT) { + if (cpu_interrupt_request(cpu) & CPU_INTERRUPT_INIT) { DPRINTF("\nhax_vcpu_hax_exec: handling INIT for %d\n", cpu->cpu_index); do_cpu_init(x86_cpu); hax_vcpu_sync_state(env, 1); } =20 - if (cpu->interrupt_request & CPU_INTERRUPT_SIPI) { + if (cpu_interrupt_request(cpu) & CPU_INTERRUPT_SIPI) { DPRINTF("hax_vcpu_hax_exec: handling SIPI for %d\n", cpu->cpu_index); hax_vcpu_sync_state(env, 0); @@ -577,13 +577,17 @@ static int hax_vcpu_hax_exec(CPUArchState *env) ret =3D -1; break; case HAX_EXIT_HLT: - if (!(cpu->interrupt_request & CPU_INTERRUPT_HARD) && - !(cpu->interrupt_request & CPU_INTERRUPT_NMI)) { - /* hlt instruction with interrupt disabled is shutdown */ - env->eflags |=3D IF_MASK; - cpu_halted_set(cpu, 1); - cpu->exception_index =3D EXCP_HLT; - ret =3D 1; + { + uint32_t interrupt_request =3D cpu_interrupt_request(cpu); + + if (!(interrupt_request & CPU_INTERRUPT_HARD) && + !(interrupt_request & CPU_INTERRUPT_NMI)) { + /* hlt instruction with interrupt disabled is shutdown= */ + env->eflags |=3D IF_MASK; + cpu_halted_set(cpu, 1); + cpu->exception_index =3D EXCP_HLT; + ret =3D 1; + } } break; /* these situations will continue to hax module */ --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Thu, 21 May 2020 09:44:12 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 43/74] i386/whpx-all: convert to cpu_interrupt_request Date: Thu, 21 May 2020 12:39:40 -0400 Message-Id: <20200521164011.638-44-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::742; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x742.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Emilio G. Cota" Reviewed-by: Richard Henderson Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- target/i386/whpx-all.c | 41 ++++++++++++++++++++++++----------------- 1 file changed, 24 insertions(+), 17 deletions(-) diff --git a/target/i386/whpx-all.c b/target/i386/whpx-all.c index d5beb4a5e2..cb424f04a3 100644 --- a/target/i386/whpx-all.c +++ b/target/i386/whpx-all.c @@ -752,12 +752,14 @@ static int whpx_handle_portio(CPUState *cpu, static int whpx_handle_halt(CPUState *cpu) { struct CPUX86State *env =3D (CPUArchState *)(cpu->env_ptr); + uint32_t interrupt_request; int ret =3D 0; =20 qemu_mutex_lock_iothread(); - if (!((cpu->interrupt_request & CPU_INTERRUPT_HARD) && + interrupt_request =3D cpu_interrupt_request(cpu); + if (!((interrupt_request & CPU_INTERRUPT_HARD) && (env->eflags & IF_MASK)) && - !(cpu->interrupt_request & CPU_INTERRUPT_NMI)) { + !(interrupt_request & CPU_INTERRUPT_NMI)) { cpu->exception_index =3D EXCP_HLT; cpu_halted_set(cpu, true); ret =3D 1; @@ -775,6 +777,7 @@ static void whpx_vcpu_pre_run(CPUState *cpu) struct CPUX86State *env =3D (CPUArchState *)(cpu->env_ptr); X86CPU *x86_cpu =3D X86_CPU(cpu); int irq; + uint32_t interrupt_request; uint8_t tpr; WHV_X64_PENDING_INTERRUPTION_REGISTER new_int; UINT32 reg_count =3D 0; @@ -786,17 +789,19 @@ static void whpx_vcpu_pre_run(CPUState *cpu) =20 qemu_mutex_lock_iothread(); =20 + interrupt_request =3D cpu_interrupt_request(cpu); + /* Inject NMI */ if (!vcpu->interruption_pending && - cpu->interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_SMI)) { - if (cpu->interrupt_request & CPU_INTERRUPT_NMI) { + interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_SMI)) { + if (interrupt_request & CPU_INTERRUPT_NMI) { cpu_reset_interrupt(cpu, CPU_INTERRUPT_NMI); vcpu->interruptable =3D false; new_int.InterruptionType =3D WHvX64PendingNmi; new_int.InterruptionPending =3D 1; new_int.InterruptionVector =3D 2; } - if (cpu->interrupt_request & CPU_INTERRUPT_SMI) { + if (interrupt_request & CPU_INTERRUPT_SMI) { cpu_reset_interrupt(cpu, CPU_INTERRUPT_SMI); } } @@ -805,12 +810,12 @@ static void whpx_vcpu_pre_run(CPUState *cpu) * Force the VCPU out of its inner loop to process any INIT requests or * commit pending TPR access. */ - if (cpu->interrupt_request & (CPU_INTERRUPT_INIT | CPU_INTERRUPT_TPR))= { - if ((cpu->interrupt_request & CPU_INTERRUPT_INIT) && + if (interrupt_request & (CPU_INTERRUPT_INIT | CPU_INTERRUPT_TPR)) { + if ((interrupt_request & CPU_INTERRUPT_INIT) && !(env->hflags & HF_SMM_MASK)) { cpu->exit_request =3D 1; } - if (cpu->interrupt_request & CPU_INTERRUPT_TPR) { + if (interrupt_request & CPU_INTERRUPT_TPR) { cpu->exit_request =3D 1; } } @@ -819,7 +824,7 @@ static void whpx_vcpu_pre_run(CPUState *cpu) if (!vcpu->interruption_pending && vcpu->interruptable && (env->eflags & IF_MASK)) { assert(!new_int.InterruptionPending); - if (cpu->interrupt_request & CPU_INTERRUPT_HARD) { + if (interrupt_request & CPU_INTERRUPT_HARD) { cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD); irq =3D cpu_get_pic_interrupt(env); if (irq >=3D 0) { @@ -849,7 +854,7 @@ static void whpx_vcpu_pre_run(CPUState *cpu) =20 /* Update the state of the interrupt delivery notification */ if (!vcpu->window_registered && - cpu->interrupt_request & CPU_INTERRUPT_HARD) { + cpu_interrupt_request(cpu) & CPU_INTERRUPT_HARD) { reg_values[reg_count].DeliverabilityNotifications.InterruptNotific= ation =3D 1; vcpu->window_registered =3D 1; @@ -902,31 +907,33 @@ static void whpx_vcpu_process_async_events(CPUState *= cpu) struct CPUX86State *env =3D (CPUArchState *)(cpu->env_ptr); X86CPU *x86_cpu =3D X86_CPU(cpu); struct whpx_vcpu *vcpu =3D get_whpx_vcpu(cpu); + uint32_t interrupt_request; =20 - if ((cpu->interrupt_request & CPU_INTERRUPT_INIT) && + if ((cpu_interrupt_request(cpu) & CPU_INTERRUPT_INIT) && !(env->hflags & HF_SMM_MASK)) { whpx_cpu_synchronize_state(cpu); do_cpu_init(x86_cpu); vcpu->interruptable =3D true; } =20 - if (cpu->interrupt_request & CPU_INTERRUPT_POLL) { + if (cpu_interrupt_request(cpu) & CPU_INTERRUPT_POLL) { cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); apic_poll_irq(x86_cpu->apic_state); } =20 - if (((cpu->interrupt_request & CPU_INTERRUPT_HARD) && + interrupt_request =3D cpu_interrupt_request(cpu); + if (((interrupt_request & CPU_INTERRUPT_HARD) && (env->eflags & IF_MASK)) || - (cpu->interrupt_request & CPU_INTERRUPT_NMI)) { + (interrupt_request & CPU_INTERRUPT_NMI)) { cpu_halted_set(cpu, false); } =20 - if (cpu->interrupt_request & CPU_INTERRUPT_SIPI) { + if (interrupt_request & CPU_INTERRUPT_SIPI) { whpx_cpu_synchronize_state(cpu); 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Thu, 21 May 2020 09:44:14 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 44/74] i386/hvf: convert to cpu_request_interrupt Date: Thu, 21 May 2020 12:39:41 -0400 Message-Id: <20200521164011.638-45-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::844; envelope-from=robert.foley@linaro.org; helo=mail-qt1-x844.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. 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Cota Signed-off-by: Robert Foley --- target/i386/hvf/hvf.c | 8 +++++--- target/i386/hvf/x86hvf.c | 26 +++++++++++++++----------- 2 files changed, 20 insertions(+), 14 deletions(-) diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index bf60ce9d66..52ccdf85e4 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -262,7 +262,7 @@ void update_apic_tpr(CPUState *cpu) =20 static void hvf_handle_interrupt(CPUState * cpu, int mask) { - cpu->interrupt_request |=3D mask; + cpu_interrupt_request_or(cpu, mask); if (!qemu_cpu_is_self(cpu)) { qemu_cpu_kick(cpu); } @@ -733,10 +733,12 @@ int hvf_vcpu_exec(CPUState *cpu) ret =3D 0; switch (exit_reason) { case EXIT_REASON_HLT: { + uint32_t interrupt_request =3D cpu_interrupt_request(cpu); + macvm_set_rip(cpu, rip + ins_len); - if (!((cpu->interrupt_request & CPU_INTERRUPT_HARD) && + if (!((interrupt_request & CPU_INTERRUPT_HARD) && (EFLAGS(env) & IF_MASK)) - && !(cpu->interrupt_request & CPU_INTERRUPT_NMI) && + && !(interrupt_request & CPU_INTERRUPT_NMI) && !(idtvec_info & VMCS_IDT_VEC_VALID)) { cpu_halted_set(cpu, 1); ret =3D EXCP_HLT; diff --git a/target/i386/hvf/x86hvf.c b/target/i386/hvf/x86hvf.c index 90f1662d0c..892ae0e99a 100644 --- a/target/i386/hvf/x86hvf.c +++ b/target/i386/hvf/x86hvf.c @@ -352,6 +352,7 @@ bool hvf_inject_interrupts(CPUState *cpu_state) =20 uint8_t vector; uint64_t intr_type; + uint32_t interrupt_request; bool have_event =3D true; if (env->interrupt_injected !=3D -1) { vector =3D env->interrupt_injected; @@ -400,7 +401,7 @@ bool hvf_inject_interrupts(CPUState *cpu_state) }; } =20 - if (cpu_state->interrupt_request & CPU_INTERRUPT_NMI) { + if (cpu_interrupt_request(cpu_state) & CPU_INTERRUPT_NMI) { if (!(env->hflags2 & HF2_NMI_MASK) && !(info & VMCS_INTR_VALID)) { cpu_reset_interrupt(cpu_state, CPU_INTERRUPT_NMI); info =3D VMCS_INTR_VALID | VMCS_INTR_T_NMI | EXCP02_NMI; @@ -411,7 +412,7 @@ bool hvf_inject_interrupts(CPUState *cpu_state) } =20 if (!(env->hflags & HF_INHIBIT_IRQ_MASK) && - (cpu_state->interrupt_request & CPU_INTERRUPT_HARD) && + (cpu_interrupt_request(cpu_state) & CPU_INTERRUPT_HARD) && (EFLAGS(env) & IF_MASK) && !(info & VMCS_INTR_VALID)) { int line =3D cpu_get_pic_interrupt(&x86cpu->env); cpu_reset_interrupt(cpu_state, CPU_INTERRUPT_HARD); @@ -420,39 +421,42 @@ bool hvf_inject_interrupts(CPUState *cpu_state) VMCS_INTR_VALID | VMCS_INTR_T_HWINTR); } } - if (cpu_state->interrupt_request & CPU_INTERRUPT_HARD) { + if (cpu_interrupt_request(cpu_state) & CPU_INTERRUPT_HARD) { vmx_set_int_window_exiting(cpu_state); } - return (cpu_state->interrupt_request - & (CPU_INTERRUPT_INIT | CPU_INTERRUPT_TPR)); + return cpu_interrupt_request(cpu_state) & (CPU_INTERRUPT_INIT | + CPU_INTERRUPT_TPR); } =20 int hvf_process_events(CPUState *cpu_state) { X86CPU *cpu =3D X86_CPU(cpu_state); CPUX86State *env =3D &cpu->env; + uint32_t interrupt_request; =20 EFLAGS(env) =3D rreg(cpu_state->hvf_fd, HV_X86_RFLAGS); =20 - if (cpu_state->interrupt_request & CPU_INTERRUPT_INIT) { + if (cpu_interrupt_request(cpu_state) & CPU_INTERRUPT_INIT) { hvf_cpu_synchronize_state(cpu_state); do_cpu_init(cpu); } =20 - if (cpu_state->interrupt_request & CPU_INTERRUPT_POLL) { + if (cpu_interrupt_request(cpu_state) & CPU_INTERRUPT_POLL) { cpu_reset_interrupt(cpu_state, CPU_INTERRUPT_POLL); apic_poll_irq(cpu->apic_state); } - if (((cpu_state->interrupt_request & CPU_INTERRUPT_HARD) && + + interrupt_request =3D cpu_interrupt_request(cpu_state); + if (((interrupt_request & CPU_INTERRUPT_HARD) && (EFLAGS(env) & IF_MASK)) || - (cpu_state->interrupt_request & CPU_INTERRUPT_NMI)) { + (interrupt_request & CPU_INTERRUPT_NMI)) { cpu_halted_set(cpu_state, 0); } - if (cpu_state->interrupt_request & CPU_INTERRUPT_SIPI) { + if (interrupt_request & CPU_INTERRUPT_SIPI) { hvf_cpu_synchronize_state(cpu_state); do_cpu_sipi(cpu); } - if (cpu_state->interrupt_request & CPU_INTERRUPT_TPR) { + if (cpu_interrupt_request(cpu_state) & CPU_INTERRUPT_TPR) { cpu_reset_interrupt(cpu_state, CPU_INTERRUPT_TPR); hvf_cpu_synchronize_state(cpu_state); apic_handle_tpr_access_report(cpu->apic_state, env->eip, --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 21 May 2020 09:44:15 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 45/74] ppc: convert to cpu_interrupt_request Date: Thu, 21 May 2020 12:39:42 -0400 Message-Id: <20200521164011.638-46-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f30; envelope-from=robert.foley@linaro.org; helo=mail-qv1-xf30.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, richard.henderson@linaro.org, cota@braap.org, qemu-ppc@nongnu.org, peter.puhov@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Emilio G. Cota" Cc: qemu-ppc@nongnu.org Reviewed-by: Richard Henderson Acked-by: David Gibson Signed-off-by: Emilio G. Cota [RF: Minor adjustment for new code in hvf_inject_interrupts] Signed-off-by: Robert Foley --- hw/ppc/ppc.c | 2 +- target/i386/hvf/x86hvf.c | 1 - target/ppc/kvm.c | 2 +- target/ppc/translate_init.inc.c | 14 +++++++------- 4 files changed, 9 insertions(+), 10 deletions(-) diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c index 0e7386ff88..89f92c4a88 100644 --- a/hw/ppc/ppc.c +++ b/hw/ppc/ppc.c @@ -89,7 +89,7 @@ void ppc_set_irq(PowerPCCPU *cpu, int n_IRQ, int level) =20 LOG_IRQ("%s: %p n_IRQ %d level %d =3D> pending %08" PRIx32 "req %08x\n", __func__, env, n_IRQ, level, - env->pending_interrupts, CPU(cpu)->interrupt_request); + env->pending_interrupts, cpu_interrupt_request(CPU(cpu))); =20 if (locked) { qemu_mutex_unlock_iothread(); diff --git a/target/i386/hvf/x86hvf.c b/target/i386/hvf/x86hvf.c index 892ae0e99a..68175074e4 100644 --- a/target/i386/hvf/x86hvf.c +++ b/target/i386/hvf/x86hvf.c @@ -352,7 +352,6 @@ bool hvf_inject_interrupts(CPUState *cpu_state) =20 uint8_t vector; uint64_t intr_type; - uint32_t interrupt_request; bool have_event =3D true; if (env->interrupt_injected !=3D -1) { vector =3D env->interrupt_injected; diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index aae2ef0ad4..084e158c34 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -1350,7 +1350,7 @@ static int kvmppc_handle_halt(PowerPCCPU *cpu) CPUState *cs =3D CPU(cpu); CPUPPCState *env =3D &cpu->env; =20 - if (!(cs->interrupt_request & CPU_INTERRUPT_HARD) && (msr_ee)) { + if (!(cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD) && (msr_ee)) { cpu_halted_set(cs, 1); cs->exception_index =3D EXCP_HLT; } diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.in= c.c index 5838b6f7bc..e61ba39982 100644 --- a/target/ppc/translate_init.inc.c +++ b/target/ppc/translate_init.inc.c @@ -8540,7 +8540,7 @@ static bool cpu_has_work_POWER7(CPUState *cs) CPUPPCState *env =3D &cpu->env; =20 if (cpu_halted(cs)) { - if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) { + if (!(cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD)) { return false; } if ((env->pending_interrupts & (1u << PPC_INTERRUPT_EXT)) && @@ -8564,7 +8564,7 @@ static bool cpu_has_work_POWER7(CPUState *cs) } return false; } else { - return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD); + return msr_ee && (cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD); } } =20 @@ -8702,7 +8702,7 @@ static bool cpu_has_work_POWER8(CPUState *cs) CPUPPCState *env =3D &cpu->env; =20 if (cpu_halted(cs)) { - if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) { + if (!(cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD)) { return false; } if ((env->pending_interrupts & (1u << PPC_INTERRUPT_EXT)) && @@ -8734,7 +8734,7 @@ static bool cpu_has_work_POWER8(CPUState *cs) } return false; } else { - return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD); + return msr_ee && (cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD); } } =20 @@ -8904,7 +8904,7 @@ static bool cpu_has_work_POWER9(CPUState *cs) if (cpu_halted(cs)) { uint64_t psscr =3D env->spr[SPR_PSSCR]; =20 - if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) { + if (!(cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD)) { return false; } =20 @@ -8950,7 +8950,7 @@ static bool cpu_has_work_POWER9(CPUState *cs) } return false; } else { - return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD); + return msr_ee && (cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD); } } =20 @@ -10655,7 +10655,7 @@ static bool ppc_cpu_has_work(CPUState *cs) PowerPCCPU *cpu =3D POWERPC_CPU(cs); CPUPPCState *env =3D &cpu->env; =20 - return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD); + return msr_ee && (cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD); } =20 static void ppc_cpu_reset(DeviceState *dev) --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590080887; cv=none; d=zohomail.com; s=zohoarc; b=fcl9xfmt18LsOvwTLv5aj6tuyxb54ZWKpUNcQJ4b8dSlKgakYEc4mp2QZs++j/n9tPqIn9NhQqAgTTkb6Co9eIVnKPKV4rDjPpzruB5Rx20zz6C0iSuRRa+pIm9SMx+/jQ0Xfiq0nZbeD/P9jSj9BXb6/vzV9WH8jgSa6fhlJbA= ARC-Message-Signature: i=1; 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Thu, 21 May 2020 09:44:16 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 46/74] sh4: convert to cpu_interrupt_request Date: Thu, 21 May 2020 12:39:43 -0400 Message-Id: <20200521164011.638-47-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f43; envelope-from=robert.foley@linaro.org; helo=mail-qv1-xf43.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. 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Cota Signed-off-by: Robert Foley --- target/sh4/cpu.c | 2 +- target/sh4/helper.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 3c68021c56..18f3448183 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -44,7 +44,7 @@ static void superh_cpu_synchronize_from_tb(CPUState *cs, = TranslationBlock *tb) =20 static bool superh_cpu_has_work(CPUState *cs) { - return cs->interrupt_request & CPU_INTERRUPT_HARD; + return cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD; } =20 static void superh_cpu_reset(DeviceState *dev) diff --git a/target/sh4/helper.c b/target/sh4/helper.c index 408478ce5d..1e32365c75 100644 --- a/target/sh4/helper.c +++ b/target/sh4/helper.c @@ -62,7 +62,7 @@ void superh_cpu_do_interrupt(CPUState *cs) { SuperHCPU *cpu =3D SUPERH_CPU(cs); CPUSH4State *env =3D &cpu->env; - int do_irq =3D cs->interrupt_request & CPU_INTERRUPT_HARD; + int do_irq =3D cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD; int do_exp, irq_vector =3D cs->exception_index; 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Iglesias --- target/cris/cpu.c | 2 +- target/cris/helper.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/target/cris/cpu.c b/target/cris/cpu.c index cff6b9eabf..6d7e266042 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -37,7 +37,7 @@ static void cris_cpu_set_pc(CPUState *cs, vaddr value) =20 static bool cris_cpu_has_work(CPUState *cs) { - return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI= ); + return cpu_interrupt_request(cs) & (CPU_INTERRUPT_HARD | CPU_INTERRUPT= _NMI); } =20 static void cris_cpu_reset(DeviceState *dev) diff --git a/target/cris/helper.c b/target/cris/helper.c index b5159b8357..67946d9246 100644 --- a/target/cris/helper.c +++ b/target/cris/helper.c @@ -131,7 +131,7 @@ void crisv10_cpu_do_interrupt(CPUState *cs) =20 D_LOG("exception index=3D%d interrupt_req=3D%d\n", cs->exception_index, - cs->interrupt_request); + cpu_interrupt_request(cs)); =20 if (env->dslot) { /* CRISv10 never takes interrupts while in a delay-slot. */ @@ -193,7 +193,7 @@ void cris_cpu_do_interrupt(CPUState *cs) =20 D_LOG("exception index=3D%d interrupt_req=3D%d\n", cs->exception_index, - cs->interrupt_request); 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Cota Signed-off-by: Robert Foley --- target/hppa/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 71b6aca45d..287055f96e 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -61,7 +61,7 @@ static void hppa_cpu_synchronize_from_tb(CPUState *cs, Tr= anslationBlock *tb) =20 static bool hppa_cpu_has_work(CPUState *cs) { - return cs->interrupt_request & CPU_INTERRUPT_HARD; + return cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD; } =20 static void hppa_cpu_disas_set_info(CPUState *cs, disassemble_info *info) --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590081001; cv=none; d=zohomail.com; s=zohoarc; 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Thu, 21 May 2020 09:44:20 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 49/74] lm32: convert to cpu_interrupt_request Date: Thu, 21 May 2020 12:39:46 -0400 Message-Id: <20200521164011.638-50-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f43; envelope-from=robert.foley@linaro.org; helo=mail-qv1-xf43.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. 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Cota Signed-off-by: Robert Foley --- target/lm32/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c index c50ad5fa15..9e7d8ca929 100644 --- a/target/lm32/cpu.c +++ b/target/lm32/cpu.c @@ -96,7 +96,7 @@ static void lm32_cpu_init_cfg_reg(LM32CPU *cpu) =20 static bool lm32_cpu_has_work(CPUState *cs) { - return cs->interrupt_request & CPU_INTERRUPT_HARD; + return cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD; } =20 static void lm32_cpu_reset(DeviceState *dev) --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590081163; cv=none; d=zohomail.com; s=zohoarc; b=D0ILpkphadAHVK9Fd5sU1TyZEA9vUTYq2/KiuiWJDE7agLwPQjgpo/q3T6Uz66drZ3L+2bXoEp1cYDhhwcEB8VCKOFhRc9c8molvaCxMYU3gLkFTGOuPypxm4388VibeiKHx/EYLp/IIZFrfDCCQnPu0CmgkXmTbQBSqDYOaaPw= ARC-Message-Signature: i=1; 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Thu, 21 May 2020 09:44:21 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 50/74] m68k: convert to cpu_interrupt_request Date: Thu, 21 May 2020 12:39:47 -0400 Message-Id: <20200521164011.638-51-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::744; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x744.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. 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Cota Signed-off-by: Robert Foley --- target/m68k/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 72c545149e..f2585154f5 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -33,7 +33,7 @@ static void m68k_cpu_set_pc(CPUState *cs, vaddr value) =20 static bool m68k_cpu_has_work(CPUState *cs) { - return cs->interrupt_request & CPU_INTERRUPT_HARD; + return cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD; } =20 static void m68k_set_feature(CPUM68KState *env, int feature) --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590081289; cv=none; d=zohomail.com; s=zohoarc; b=Tka7ySi0+BlM3s0tEJgzEACTowrRTaO74Z/YWb3rXNOSlibnULaTjR0HeZ0lgkfsgQBngqxsbuSMDW+K3hv+mMA6g2EDHDYnSuRq97m1GBxHqXrwEUCsF6i6RAENxqPbY9uSVVnt3fsmcX3c/EKTVlAVV9z54VhL0KQ07ng+3ZY= ARC-Message-Signature: i=1; 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Thu, 21 May 2020 09:44:23 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 51/74] mips: convert to cpu_interrupt_request Date: Thu, 21 May 2020 12:39:48 -0400 Message-Id: <20200521164011.638-52-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::743; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x743.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. 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Cota Signed-off-by: Robert Foley --- target/mips/cpu.c | 7 ++++--- target/mips/kvm.c | 2 +- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index e86cd06548..761d8aaa54 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -56,13 +56,14 @@ static bool mips_cpu_has_work(CPUState *cs) MIPSCPU *cpu =3D MIPS_CPU(cs); CPUMIPSState *env =3D &cpu->env; bool has_work =3D false; + uint32_t interrupt_request =3D cpu_interrupt_request(cs); =20 /* * Prior to MIPS Release 6 it is implementation dependent if non-enabl= ed * interrupts wake-up the CPU, however most of the implementations only * check for interrupts that can be taken. */ - if ((cs->interrupt_request & CPU_INTERRUPT_HARD) && + if ((interrupt_request & CPU_INTERRUPT_HARD) && cpu_mips_hw_interrupts_pending(env)) { if (cpu_mips_hw_interrupts_enabled(env) || (env->insn_flags & ISA_MIPS32R6)) { @@ -76,7 +77,7 @@ static bool mips_cpu_has_work(CPUState *cs) * The QEMU model will issue an _WAKE request whenever the CPUs * should be woken up. */ - if (cs->interrupt_request & CPU_INTERRUPT_WAKE) { + if (interrupt_request & CPU_INTERRUPT_WAKE) { has_work =3D true; } =20 @@ -86,7 +87,7 @@ static bool mips_cpu_has_work(CPUState *cs) } /* MIPS Release 6 has the ability to halt the CPU. */ if (env->CP0_Config5 & (1 << CP0C5_VP)) { - if (cs->interrupt_request & CPU_INTERRUPT_WAKE) { + if (interrupt_request & CPU_INTERRUPT_WAKE) { has_work =3D true; } if (!mips_vp_active(env)) { diff --git a/target/mips/kvm.c b/target/mips/kvm.c index 2b7d680547..e9b7a9f2ad 100644 --- a/target/mips/kvm.c +++ b/target/mips/kvm.c @@ -141,7 +141,7 @@ void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run) =20 qemu_mutex_lock_iothread(); =20 - if ((cs->interrupt_request & CPU_INTERRUPT_HARD) && + if ((cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD) && cpu_mips_io_interrupts_pending(cpu)) { intr.cpu =3D -1; intr.irq =3D 2; --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 21 May 2020 09:44:24 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 52/74] nios: convert to cpu_interrupt_request Date: Thu, 21 May 2020 12:39:49 -0400 Message-Id: <20200521164011.638-53-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::744; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x744.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. 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Cota Signed-off-by: Robert Foley --- target/nios2/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index 8f7011fcb9..fe5fd9adfd 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -36,7 +36,7 @@ static void nios2_cpu_set_pc(CPUState *cs, vaddr value) =20 static bool nios2_cpu_has_work(CPUState *cs) { - return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI= ); + return cpu_interrupt_request(cs) & (CPU_INTERRUPT_HARD | CPU_INTERRUPT= _NMI); } =20 static void nios2_cpu_reset(DeviceState *dev) --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590081402; cv=none; d=zohomail.com; s=zohoarc; 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Thu, 21 May 2020 09:44:25 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 53/74] s390x: convert to cpu_interrupt_request Date: Thu, 21 May 2020 12:39:50 -0400 Message-Id: <20200521164011.638-54-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f2d; envelope-from=robert.foley@linaro.org; helo=mail-qv1-xf2d.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. 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Cota" Cc: Christian Borntraeger Cc: David Hildenbrand Cc: qemu-s390x@nongnu.org Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Cornelia Huck Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- hw/intc/s390_flic.c | 2 +- target/s390x/cpu.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/intc/s390_flic.c b/hw/intc/s390_flic.c index a1c6b8a6f6..40b1a5b940 100644 --- a/hw/intc/s390_flic.c +++ b/hw/intc/s390_flic.c @@ -191,7 +191,7 @@ static void qemu_s390_flic_notify(uint32_t type) CPU_FOREACH(cs) { S390CPU *cpu =3D S390_CPU(cs); =20 - cs->interrupt_request |=3D CPU_INTERRUPT_HARD; + cpu_interrupt_request_or(cs, CPU_INTERRUPT_HARD); =20 /* ignore CPUs that are not sleeping */ if (s390_cpu_get_state(cpu) !=3D S390_CPU_STATE_OPERATING && diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 4b1961694e..490644e12b 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -65,7 +65,7 @@ static bool s390_cpu_has_work(CPUState *cs) return false; } =20 - if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) { + if (!(cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD)) { return false; } =20 --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Cota Signed-off-by: Robert Foley --- target/alpha/cpu.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index b3fd6643e8..09677c6c44 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -42,10 +42,10 @@ static bool alpha_cpu_has_work(CPUState *cs) assume that if a CPU really wants to stay asleep, it will mask interrupts at the chipset level, which will prevent these bits from being set in the first place. */ - return cs->interrupt_request & (CPU_INTERRUPT_HARD - | CPU_INTERRUPT_TIMER - | CPU_INTERRUPT_SMP - | CPU_INTERRUPT_MCHK); + return cpu_interrupt_request(cs) & (CPU_INTERRUPT_HARD + | CPU_INTERRUPT_TIMER + | CPU_INTERRUPT_SMP + | CPU_INTERRUPT_MCHK); } =20 static void alpha_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 21 May 2020 09:44:28 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 55/74] moxie: convert to cpu_interrupt_request Date: Thu, 21 May 2020 12:39:52 -0400 Message-Id: <20200521164011.638-56-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::72e; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x72e.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. 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Cota Signed-off-by: Robert Foley --- target/moxie/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c index 6e0443ccb7..f823eb234d 100644 --- a/target/moxie/cpu.c +++ b/target/moxie/cpu.c @@ -32,7 +32,7 @@ static void moxie_cpu_set_pc(CPUState *cs, vaddr value) =20 static bool moxie_cpu_has_work(CPUState *cs) { - return cs->interrupt_request & CPU_INTERRUPT_HARD; + return cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD; } =20 static void moxie_cpu_reset(DeviceState *dev) --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590081141; cv=none; d=zohomail.com; s=zohoarc; b=hIXEfiJXU1BYJdW2mOw0kBBqs4wNI1xD+5tvTd6SBUQWW8Yp2GBX2FNDM1Xoi2o1+yeGoNd/AcKrOojbat1WueG6T77Kga6F8xainMNOngxowAQJvhgf1+qj7bJ8Z3yW7jrfZtWVxT6UTJ30NFfGrzBrbj+2yei9/HnutFvAYB8= ARC-Message-Signature: i=1; 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Thu, 21 May 2020 09:44:30 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 56/74] sparc: convert to cpu_interrupt_request Date: Thu, 21 May 2020 12:39:53 -0400 Message-Id: <20200521164011.638-57-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::741; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x741.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, richard.henderson@linaro.org, cota@braap.org, peter.puhov@linaro.org, alex.bennee@linaro.org, Artyom Tarasenko Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Cc: Artyom Tarasenko Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Mark Cave-Ayland Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- hw/sparc64/sparc64.c | 4 ++-- target/sparc/cpu.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/sparc64/sparc64.c b/hw/sparc64/sparc64.c index fe9c678459..191ebfbb93 100644 --- a/hw/sparc64/sparc64.c +++ b/hw/sparc64/sparc64.c @@ -57,7 +57,7 @@ void cpu_check_irqs(CPUSPARCState *env) /* The bit corresponding to psrpil is (1<< psrpil), the next bit is (2 << psrpil). */ if (pil < (2 << env->psrpil)) { - if (cs->interrupt_request & CPU_INTERRUPT_HARD) { + if (cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD) { trace_sparc64_cpu_check_irqs_reset_irq(env->interrupt_index); env->interrupt_index =3D 0; cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); @@ -88,7 +88,7 @@ void cpu_check_irqs(CPUSPARCState *env) break; } } - } else if (cs->interrupt_request & CPU_INTERRUPT_HARD) { + } else if (cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD) { trace_sparc64_cpu_check_irqs_disabled(pil, env->pil_in, env->softi= nt, env->interrupt_index); env->interrupt_index =3D 0; diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 3f05aba9d6..cef25238a5 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -704,7 +704,7 @@ static bool sparc_cpu_has_work(CPUState *cs) SPARCCPU *cpu =3D SPARC_CPU(cs); CPUSPARCState *env =3D &cpu->env; =20 - return (cs->interrupt_request & CPU_INTERRUPT_HARD) && + return (cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD) && cpu_interrupts_enabled(env); } =20 --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590081256; cv=none; d=zohomail.com; s=zohoarc; b=U+KwQCTmsANIBmg7PmmVQ/Ybfmaw4OSgYHfl6srNcn9RHJazv7MPvTaoHkTPbpBsEFjnvDd1TWY0K8/Qgjvlw5BgtBzq6cNDbPEY12MfuLUkSEjf2J8VuQkLQG/oPOsiBKxK/igJqVs5qb1YEvjCm99yEdaIgbFi23cmMjK6+3M= ARC-Message-Signature: i=1; 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Thu, 21 May 2020 09:44:31 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 57/74] openrisc: convert to cpu_interrupt_request Date: Thu, 21 May 2020 12:39:54 -0400 Message-Id: <20200521164011.638-58-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f43; envelope-from=robert.foley@linaro.org; helo=mail-qv1-xf43.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, richard.henderson@linaro.org, cota@braap.org, peter.puhov@linaro.org, Stafford Horne , alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Cc: Stafford Horne Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- hw/openrisc/cputimer.c | 2 +- target/openrisc/cpu.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/openrisc/cputimer.c b/hw/openrisc/cputimer.c index 93268815d8..9475b77d0a 100644 --- a/hw/openrisc/cputimer.c +++ b/hw/openrisc/cputimer.c @@ -102,7 +102,7 @@ static void openrisc_timer_cb(void *opaque) CPUState *cs =3D CPU(cpu); =20 cpu->env.ttmr |=3D TTMR_IP; - cs->interrupt_request |=3D CPU_INTERRUPT_TIMER; + cpu_interrupt_request_or(cs, CPU_INTERRUPT_TIMER); } =20 switch (cpu->env.ttmr & TTMR_M) { diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index 5528c0918f..fd2da39124 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -32,8 +32,8 @@ static void openrisc_cpu_set_pc(CPUState *cs, vaddr value) =20 static bool openrisc_cpu_has_work(CPUState *cs) { - return cs->interrupt_request & (CPU_INTERRUPT_HARD | - CPU_INTERRUPT_TIMER); + return cpu_interrupt_request(cs) & (CPU_INTERRUPT_HARD | + CPU_INTERRUPT_TIMER); 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, richard.henderson@linaro.org, cota@braap.org, peter.puhov@linaro.org, Guan Xuetao , alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Cc: Guan Xuetao Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- target/unicore32/cpu.c | 2 +- target/unicore32/softmmu.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target/unicore32/cpu.c b/target/unicore32/cpu.c index b27fb9689f..06bf4b4b63 100644 --- a/target/unicore32/cpu.c +++ b/target/unicore32/cpu.c @@ -27,7 +27,7 @@ static void uc32_cpu_set_pc(CPUState *cs, vaddr value) =20 static bool uc32_cpu_has_work(CPUState *cs) { - return cs->interrupt_request & + return cpu_interrupt_request(cs) & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB); } =20 diff --git a/target/unicore32/softmmu.c b/target/unicore32/softmmu.c index cbdaa500b7..9660bd2a27 100644 --- a/target/unicore32/softmmu.c +++ b/target/unicore32/softmmu.c @@ -117,7 +117,7 @@ void uc32_cpu_do_interrupt(CPUState *cs) /* The PC already points to the proper instruction. */ env->regs[30] =3D env->regs[31]; env->regs[31] =3D addr; - cs->interrupt_request |=3D CPU_INTERRUPT_EXITTB; + cpu_interrupt_request_or(cs, CPU_INTERRUPT_EXITTB); } =20 static int get_phys_addr_ucv2(CPUUniCore32State *env, uint32_t address, --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Iglesias --- target/microblaze/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 51e5c85b10..ce70f7d281 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -84,7 +84,7 @@ static void mb_cpu_set_pc(CPUState *cs, vaddr value) =20 static bool mb_cpu_has_work(CPUState *cs) { - return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI= ); + return cpu_interrupt_request(cs) & (CPU_INTERRUPT_HARD | CPU_INTERRUPT= _NMI); } =20 #ifndef CONFIG_USER_ONLY --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590080746; cv=none; d=zohomail.com; s=zohoarc; b=XWVQpLFDkp/qTa0fasWgin5vVwcsch9eslAJrvqjR7f80fFfTcPo63hK4pHISKYZfnmbbyi40VBiLUaA0J975SEl17WZVmRUh5HslitwaICVPWnx7xQPYs+HSPOEq2UapLUusk+2s31XQORTusI7vDldGTCXiymkLq8D8hp5sys= ARC-Message-Signature: i=1; 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Thu, 21 May 2020 09:44:35 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 60/74] accel/tcg: convert to cpu_interrupt_request Date: Thu, 21 May 2020 12:39:57 -0400 Message-Id: <20200521164011.638-61-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::744; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x744.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. 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Cota Signed-off-by: Robert Foley --- accel/tcg/cpu-exec.c | 15 ++++++++------- accel/tcg/tcg-all.c | 12 +++++++++--- accel/tcg/translate-all.c | 2 +- 3 files changed, 18 insertions(+), 11 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 099dd83ee0..b549a37847 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -431,7 +431,7 @@ static inline bool cpu_handle_halt_locked(CPUState *cpu) =20 if (cpu_halted(cpu)) { #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) - if ((cpu->interrupt_request & CPU_INTERRUPT_POLL) + if ((cpu_interrupt_request(cpu) & CPU_INTERRUPT_POLL) && replay_interrupt()) { X86CPU *x86_cpu =3D X86_CPU(cpu); =20 @@ -544,16 +544,17 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, */ atomic_mb_set(&cpu_neg(cpu)->icount_decr.u16.high, 0); =20 - if (unlikely(atomic_read(&cpu->interrupt_request))) { + if (unlikely(cpu_interrupt_request(cpu))) { int interrupt_request; + qemu_mutex_lock_iothread(); - interrupt_request =3D cpu->interrupt_request; + interrupt_request =3D cpu_interrupt_request(cpu); if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) { /* Mask out external interrupts for this step. */ interrupt_request &=3D ~CPU_INTERRUPT_SSTEP_MASK; } if (interrupt_request & CPU_INTERRUPT_DEBUG) { - cpu->interrupt_request &=3D ~CPU_INTERRUPT_DEBUG; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_DEBUG); cpu->exception_index =3D EXCP_DEBUG; qemu_mutex_unlock_iothread(); return true; @@ -562,7 +563,7 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, /* Do nothing */ } else if (interrupt_request & CPU_INTERRUPT_HALT) { replay_interrupt(); - cpu->interrupt_request &=3D ~CPU_INTERRUPT_HALT; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_HALT); cpu_halted_set(cpu, 1); cpu->exception_index =3D EXCP_HLT; qemu_mutex_unlock_iothread(); @@ -599,10 +600,10 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, } /* The target hook may have updated the 'cpu->interrupt_reques= t'; * reload the 'interrupt_request' value */ - interrupt_request =3D cpu->interrupt_request; + interrupt_request =3D cpu_interrupt_request(cpu); } if (interrupt_request & CPU_INTERRUPT_EXITTB) { - cpu->interrupt_request &=3D ~CPU_INTERRUPT_EXITTB; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_EXITTB); /* ensure that no TB jump will be modified as the program flow was changed */ *last_tb =3D NULL; diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c index 3b4fda5640..5eda24d87b 100644 --- a/accel/tcg/tcg-all.c +++ b/accel/tcg/tcg-all.c @@ -52,10 +52,16 @@ typedef struct TCGState { static void tcg_handle_interrupt(CPUState *cpu, int mask) { int old_mask; - g_assert(qemu_mutex_iothread_locked()); =20 - old_mask =3D cpu->interrupt_request; - cpu->interrupt_request |=3D mask; + if (!cpu_mutex_locked(cpu)) { + cpu_mutex_lock(cpu); + old_mask =3D cpu_interrupt_request(cpu); + cpu_interrupt_request_or(cpu, mask); + cpu_mutex_unlock(cpu); + } else { + old_mask =3D cpu_interrupt_request(cpu); + cpu_interrupt_request_or(cpu, mask); + } =20 /* * If called from iothread context, wake the target cpu in diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 42ce1dfcff..af8ecf3380 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -2392,7 +2392,7 @@ void dump_opcount_info(void) void cpu_interrupt(CPUState *cpu, int mask) { g_assert(qemu_mutex_iothread_locked()); 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" This finishes the conversion to interrupt_request. Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- hw/core/cpu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/core/cpu.c b/hw/core/cpu.c index be9efbeaf4..ee20f8e0ad 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -271,7 +271,7 @@ static void cpu_common_reset(DeviceState *dev) log_cpu_state(cpu, cc->reset_dump_flags); } =20 - cpu->interrupt_request =3D 0; + cpu_interrupt_request_set(cpu, 0); cpu_halted_set(cpu, 0); cpu->mem_io_pc =3D 0; cpu->icount_extra =3D 0; @@ -411,7 +411,7 @@ static vaddr cpu_adjust_watchpoint_address(CPUState *cp= u, vaddr addr, int len) =20 static void generic_handle_interrupt(CPUState *cpu, int mask) { - cpu->interrupt_request |=3D mask; + cpu_interrupt_request_or(cpu, mask); =20 if (!qemu_cpu_is_self(cpu)) { qemu_cpu_kick(cpu); --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 21 May 2020 09:44:37 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 62/74] cpu: call .cpu_has_work with the CPU lock held Date: Thu, 21 May 2020 12:39:59 -0400 Message-Id: <20200521164011.638-63-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::741; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x741.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- include/hw/core/cpu.h | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 6ed806db60..7bf7700630 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -80,7 +80,8 @@ struct TranslationBlock; * instantiatable CPU type. * @parse_features: Callback to parse command line arguments. * @reset_dump_flags: #CPUDumpFlags to use for reset logging. - * @has_work: Callback for checking if there is work to do. + * @has_work: Callback for checking if there is work to do. Called with the + * CPU lock held. * @do_interrupt: Callback for interrupt handling. * @do_unaligned_access: Callback for unaligned access handling, if * the target defines #TARGET_ALIGNED_ONLY. @@ -799,9 +800,16 @@ const char *parse_cpu_option(const char *cpu_option); static inline bool cpu_has_work(CPUState *cpu) { CPUClass *cc =3D CPU_GET_CLASS(cpu); + bool ret; =20 g_assert(cc->has_work); - return cc->has_work(cpu); + if (cpu_mutex_locked(cpu)) { + return cc->has_work(cpu); + } + cpu_mutex_lock(cpu); + ret =3D cc->has_work(cpu); + cpu_mutex_unlock(cpu); + return ret; } =20 /** --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590081516; cv=none; d=zohomail.com; s=zohoarc; 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Thu, 21 May 2020 09:44:38 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 63/74] cpu: introduce cpu_has_work_with_iothread_lock Date: Thu, 21 May 2020 12:40:00 -0400 Message-Id: <20200521164011.638-64-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::741; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x741.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" It will gain some users soon. Suggested-by: Paolo Bonzini Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- include/hw/core/cpu.h | 37 ++++++++++++++++++++++++++++++++++--- 1 file changed, 34 insertions(+), 3 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 7bf7700630..9766477e62 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -26,6 +26,7 @@ #include "exec/memattrs.h" #include "qapi/qapi-types-run-state.h" #include "qemu/bitmap.h" +#include "qemu/main-loop.h" #include "qemu/rcu_queue.h" #include "qemu/queue.h" #include "qemu/thread.h" @@ -82,6 +83,8 @@ struct TranslationBlock; * @reset_dump_flags: #CPUDumpFlags to use for reset logging. * @has_work: Callback for checking if there is work to do. Called with the * CPU lock held. + * @has_work_with_iothread_lock: Callback for checking if there is work to= do. + * Called with both the BQL and the CPU lock held. * @do_interrupt: Callback for interrupt handling. * @do_unaligned_access: Callback for unaligned access handling, if * the target defines #TARGET_ALIGNED_ONLY. @@ -167,6 +170,7 @@ typedef struct CPUClass { =20 int reset_dump_flags; bool (*has_work)(CPUState *cpu); + bool (*has_work_with_iothread_lock)(CPUState *cpu); void (*do_interrupt)(CPUState *cpu); void (*do_unaligned_access)(CPUState *cpu, vaddr addr, MMUAccessType access_type, @@ -800,14 +804,41 @@ const char *parse_cpu_option(const char *cpu_option); static inline bool cpu_has_work(CPUState *cpu) { CPUClass *cc =3D CPU_GET_CLASS(cpu); + bool has_cpu_lock =3D cpu_mutex_locked(cpu); + bool (*func)(CPUState *cpu); bool ret; =20 + /* some targets require us to hold the BQL when checking for work */ + if (cc->has_work_with_iothread_lock) { + if (qemu_mutex_iothread_locked()) { + func =3D cc->has_work_with_iothread_lock; + goto call_func; + } + + if (has_cpu_lock) { + /* avoid deadlock by acquiring the locks in order */ + cpu_mutex_unlock(cpu); + } + qemu_mutex_lock_iothread(); + cpu_mutex_lock(cpu); + + ret =3D cc->has_work_with_iothread_lock(cpu); + + qemu_mutex_unlock_iothread(); + if (!has_cpu_lock) { + cpu_mutex_unlock(cpu); + } + return ret; + } + g_assert(cc->has_work); - if (cpu_mutex_locked(cpu)) { - return cc->has_work(cpu); + func =3D cc->has_work; + call_func: + if (has_cpu_lock) { + return func(cpu); } cpu_mutex_lock(cpu); - ret =3D cc->has_work(cpu); + ret =3D func(cpu); cpu_mutex_unlock(cpu); return ret; } --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590080872; cv=none; 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Thu, 21 May 2020 09:44:40 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 64/74] ppc: convert to cpu_has_work_with_iothread_lock Date: Thu, 21 May 2020 12:40:01 -0400 Message-Id: <20200521164011.638-65-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::742; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x742.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, richard.henderson@linaro.org, cota@braap.org, qemu-ppc@nongnu.org, peter.puhov@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Emilio G. Cota" Soon we will call cpu_has_work without the BQL. Cc: qemu-ppc@nongnu.org Reviewed-by: Richard Henderson Acked-by: David Gibson Signed-off-by: Emilio G. Cota [RF: Converted new code related to POWER10] Signed-off-by: Robert Foley --- target/ppc/translate_init.inc.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.in= c.c index e61ba39982..0aeddf3eef 100644 --- a/target/ppc/translate_init.inc.c +++ b/target/ppc/translate_init.inc.c @@ -8539,6 +8539,8 @@ static bool cpu_has_work_POWER7(CPUState *cs) PowerPCCPU *cpu =3D POWERPC_CPU(cs); CPUPPCState *env =3D &cpu->env; =20 + g_assert(qemu_mutex_iothread_locked()); + if (cpu_halted(cs)) { if (!(cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD)) { return false; @@ -8581,7 +8583,7 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data) pcc->pcr_supported =3D PCR_COMPAT_2_06 | PCR_COMPAT_2_05; pcc->init_proc =3D init_proc_POWER7; pcc->check_pow =3D check_pow_nocheck; - cc->has_work =3D cpu_has_work_POWER7; + cc->has_work_with_iothread_lock =3D cpu_has_work_POWER7; pcc->insns_flags =3D PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB= | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | @@ -8701,6 +8703,8 @@ static bool cpu_has_work_POWER8(CPUState *cs) PowerPCCPU *cpu =3D POWERPC_CPU(cs); CPUPPCState *env =3D &cpu->env; =20 + g_assert(qemu_mutex_iothread_locked()); + if (cpu_halted(cs)) { if (!(cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD)) { return false; @@ -8751,7 +8755,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) pcc->pcr_supported =3D PCR_COMPAT_2_07 | PCR_COMPAT_2_06 | PCR_COMPAT_= 2_05; pcc->init_proc =3D init_proc_POWER8; pcc->check_pow =3D check_pow_nocheck; - cc->has_work =3D cpu_has_work_POWER8; + cc->has_work_with_iothread_lock =3D cpu_has_work_POWER8; pcc->insns_flags =3D PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB= | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | @@ -8901,6 +8905,8 @@ static bool cpu_has_work_POWER9(CPUState *cs) PowerPCCPU *cpu =3D POWERPC_CPU(cs); CPUPPCState *env =3D &cpu->env; =20 + g_assert(qemu_mutex_iothread_locked()); + if (cpu_halted(cs)) { uint64_t psscr =3D env->spr[SPR_PSSCR]; =20 @@ -8968,7 +8974,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data) PCR_COMPAT_2_05; pcc->init_proc =3D init_proc_POWER9; pcc->check_pow =3D check_pow_nocheck; - cc->has_work =3D cpu_has_work_POWER9; + cc->has_work_with_iothread_lock =3D cpu_has_work_POWER9; pcc->insns_flags =3D PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB= | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | @@ -9117,6 +9123,7 @@ static bool cpu_has_work_POWER10(CPUState *cs) PowerPCCPU *cpu =3D POWERPC_CPU(cs); CPUPPCState *env =3D &cpu->env; =20 + g_assert(qemu_mutex_iothread_locked()); if (cpu_halted(cs)) { uint64_t psscr =3D env->spr[SPR_PSSCR]; =20 @@ -9185,7 +9192,7 @@ POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data) PCR_COMPAT_2_06 | PCR_COMPAT_2_05; pcc->init_proc =3D init_proc_POWER10; pcc->check_pow =3D check_pow_nocheck; - cc->has_work =3D cpu_has_work_POWER10; + cc->has_work_with_iothread_lock =3D cpu_has_work_POWER10; pcc->insns_flags =3D PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB= | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | @@ -10655,6 +10662,8 @@ static bool ppc_cpu_has_work(CPUState *cs) PowerPCCPU *cpu =3D POWERPC_CPU(cs); CPUPPCState *env =3D &cpu->env; =20 + g_assert(qemu_mutex_iothread_locked()); + return msr_ee && (cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD); } =20 @@ -10879,7 +10888,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, voi= d *data) cc->class_by_name =3D ppc_cpu_class_by_name; pcc->parent_parse_features =3D cc->parse_features; cc->parse_features =3D ppc_cpu_parse_featurestr; - cc->has_work =3D ppc_cpu_has_work; + cc->has_work_with_iothread_lock =3D ppc_cpu_has_work; cc->do_interrupt =3D ppc_cpu_do_interrupt; cc->cpu_exec_interrupt =3D ppc_cpu_exec_interrupt; cc->dump_state =3D ppc_cpu_dump_state; --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590080984; cv=none; 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Thu, 21 May 2020 09:44:41 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 65/74] mips: convert to cpu_has_work_with_iothread_lock Date: Thu, 21 May 2020 12:40:02 -0400 Message-Id: <20200521164011.638-66-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::743; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x743.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, richard.henderson@linaro.org, Aleksandar Markovic , cota@braap.org, peter.puhov@linaro.org, alex.bennee@linaro.org, Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Emilio G. Cota" Soon we will call cpu_has_work without the BQL. Cc: Aurelien Jarno Cc: Aleksandar Markovic Reviewed-by: Richard Henderson Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- target/mips/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 761d8aaa54..ec9dde5100 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -58,6 +58,8 @@ static bool mips_cpu_has_work(CPUState *cs) bool has_work =3D false; uint32_t interrupt_request =3D cpu_interrupt_request(cs); =20 + g_assert(qemu_mutex_iothread_locked()); + /* * Prior to MIPS Release 6 it is implementation dependent if non-enabl= ed * interrupts wake-up the CPU, however most of the implementations only @@ -193,7 +195,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *d= ata) device_class_set_parent_reset(dc, mips_cpu_reset, &mcc->parent_reset); =20 cc->class_by_name =3D mips_cpu_class_by_name; - cc->has_work =3D mips_cpu_has_work; + cc->has_work_with_iothread_lock =3D mips_cpu_has_work; cc->do_interrupt =3D mips_cpu_do_interrupt; cc->cpu_exec_interrupt =3D mips_cpu_exec_interrupt; cc->dump_state =3D mips_cpu_dump_state; --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590081706; cv=none; d=zohomail.com; s=zohoarc; b=AqB5e6iBWJMCQhRTrNqr+sBhXfdOzRTtiYBLq81fOPopojbCC+hIJySPHEkSm/oWzyhHPnffC6zQlXUpMuUwpE9BKP7nlNTD8H/PzwAduL5sC/OqfFYf+C1wJ+ShNk2+coGCypjOdeuQqAsjkpjmStlTql8xE8j2bZ7u3ZVJmVU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1590081706; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; bh=JFBVbjLhWvz//NfxtqcWhFsd9jqQkkiik7lq07yLP/0=; b=NEo+/Ci6SGKDHxX/FO59nSlZLZQVAA5ZjAbJT2zmvD2t/C4P4YilmnyL7lFrDXx4x26XwhXnhbZ/UtUewjPE9cytYSYKgE8SLfargBdJgzsb7brxcf6ZAn2A9yPEumSH9mC4v4PT/WzxXRR+k7fqQ7xjzOmKR5xlmZGDRhYtzP4= ARC-Authentication-Results: i=1; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::844; envelope-from=robert.foley@linaro.org; helo=mail-qt1-x844.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, David Hildenbrand , richard.henderson@linaro.org, qemu-s390x@nongnu.org, cota@braap.org, peter.puhov@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Emilio G. Cota" Soon we will call cpu_has_work without the BQL. Cc: David Hildenbrand Cc: qemu-s390x@nongnu.org Reviewed-by: Richard Henderson Reviewed-by: Cornelia Huck Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- target/s390x/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 490644e12b..e9a014bd02 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -59,6 +59,8 @@ static bool s390_cpu_has_work(CPUState *cs) { S390CPU *cpu =3D S390_CPU(cs); =20 + g_assert(qemu_mutex_iothread_locked()); + /* STOPPED cpus can never wake up */ if (s390_cpu_get_state(cpu) !=3D S390_CPU_STATE_LOAD && s390_cpu_get_state(cpu) !=3D S390_CPU_STATE_OPERATING) { @@ -491,7 +493,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *= data) #endif scc->reset =3D s390_cpu_reset; cc->class_by_name =3D s390_cpu_class_by_name, - cc->has_work =3D s390_cpu_has_work; + cc->has_work_with_iothread_lock =3D s390_cpu_has_work; #ifdef CONFIG_TCG cc->do_interrupt =3D s390_cpu_do_interrupt; #endif --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Thu, 21 May 2020 09:44:44 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 67/74] riscv: convert to cpu_has_work_with_iothread_lock Date: Thu, 21 May 2020 12:40:04 -0400 Message-Id: <20200521164011.638-68-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::843; envelope-from=robert.foley@linaro.org; helo=mail-qt1-x843.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, Sagar Karandikar , Bastian Koppelmann , richard.henderson@linaro.org, cota@braap.org, peter.puhov@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Emilio G. Cota" Soon we will call cpu_has_work without the BQL. Cc: Sagar Karandikar Cc: Bastian Koppelmann Reviewed-by: Palmer Dabbelt Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- target/riscv/cpu.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 059d71f2c7..87827f69cd 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -323,6 +323,9 @@ static bool riscv_cpu_has_work(CPUState *cs) #ifndef CONFIG_USER_ONLY RISCVCPU *cpu =3D RISCV_CPU(cs); CPURISCVState *env =3D &cpu->env; + + g_assert(qemu_mutex_iothread_locked()); + /* * Definition of the WFI instruction requires it to ignore the privile= ge * mode and delegation registers, but respect individual enables @@ -524,7 +527,7 @@ static void riscv_cpu_class_init(ObjectClass *c, void *= data) device_class_set_parent_reset(dc, riscv_cpu_reset, &mcc->parent_reset); =20 cc->class_by_name =3D riscv_cpu_class_by_name; - cc->has_work =3D riscv_cpu_has_work; + cc->has_work_with_iothread_lock =3D riscv_cpu_has_work; cc->do_interrupt =3D riscv_cpu_do_interrupt; cc->cpu_exec_interrupt =3D riscv_cpu_exec_interrupt; cc->dump_state =3D riscv_cpu_dump_state; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::742; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x742.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, richard.henderson@linaro.org, cota@braap.org, peter.puhov@linaro.org, alex.bennee@linaro.org, Artyom Tarasenko Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Emilio G. Cota" Soon we will call cpu_has_work without the BQL. Cc: Artyom Tarasenko Reviewed-by: Richard Henderson Acked-by: Mark Cave-Ayland Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- target/sparc/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index cef25238a5..3fa1a535d9 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -704,6 +704,8 @@ static bool sparc_cpu_has_work(CPUState *cs) SPARCCPU *cpu =3D SPARC_CPU(cs); CPUSPARCState *env =3D &cpu->env; =20 + g_assert(qemu_mutex_iothread_locked()); + return (cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD) && cpu_interrupts_enabled(env); } @@ -863,7 +865,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void = *data) =20 cc->class_by_name =3D sparc_cpu_class_by_name; cc->parse_features =3D sparc_cpu_parse_features; - cc->has_work =3D sparc_cpu_has_work; + cc->has_work_with_iothread_lock =3D sparc_cpu_has_work; cc->do_interrupt =3D sparc_cpu_do_interrupt; cc->cpu_exec_interrupt =3D sparc_cpu_exec_interrupt; cc->dump_state =3D sparc_cpu_dump_state; --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Thu, 21 May 2020 09:44:46 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 69/74] xtensa: convert to cpu_has_work_with_iothread_lock Date: Thu, 21 May 2020 12:40:06 -0400 Message-Id: <20200521164011.638-70-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::731; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x731.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, richard.henderson@linaro.org, Max Filippov , cota@braap.org, peter.puhov@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Emilio G. Cota" Soon we will call cpu_has_work without the BQL. Cc: Max Filippov Reviewed-by: Richard Henderson Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- target/xtensa/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index fda4a73722..0f96483563 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -47,6 +47,8 @@ static bool xtensa_cpu_has_work(CPUState *cs) #ifndef CONFIG_USER_ONLY XtensaCPU *cpu =3D XTENSA_CPU(cs); =20 + g_assert(qemu_mutex_iothread_locked()); + return !cpu->env.runstall && cpu->env.pending_irq_level; #else return true; @@ -187,7 +189,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void= *data) device_class_set_parent_reset(dc, xtensa_cpu_reset, &xcc->parent_reset= ); =20 cc->class_by_name =3D xtensa_cpu_class_by_name; - cc->has_work =3D xtensa_cpu_has_work; + cc->has_work_with_iothread_lock =3D xtensa_cpu_has_work; cc->do_interrupt =3D xtensa_cpu_do_interrupt; cc->cpu_exec_interrupt =3D xtensa_cpu_exec_interrupt; cc->dump_state =3D xtensa_cpu_dump_state; --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" This function is only called from TCG rr mode, so add a prefix to mark this as well as an assertion. Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- cpus.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/cpus.c b/cpus.c index ff67fa9f5f..bcba0552bf 100644 --- a/cpus.c +++ b/cpus.c @@ -230,10 +230,12 @@ static bool cpu_thread_is_idle(CPUState *cpu) return true; } =20 -static bool all_cpu_threads_idle(void) +static bool qemu_tcg_rr_all_cpu_threads_idle(void) { CPUState *cpu; =20 + g_assert(qemu_is_tcg_rr()); + CPU_FOREACH(cpu) { if (!cpu_thread_is_idle(cpu)) { return false; @@ -641,7 +643,7 @@ void qemu_start_warp_timer(void) } =20 if (replay_mode !=3D REPLAY_MODE_PLAY) { - if (!all_cpu_threads_idle()) { + if (!qemu_tcg_rr_all_cpu_threads_idle()) { return; } =20 @@ -1300,7 +1302,7 @@ static void qemu_tcg_rr_wait_io_event(void) { CPUState *cpu; =20 - while (all_cpu_threads_idle()) { + while (qemu_tcg_rr_all_cpu_threads_idle()) { stop_tcg_kick_timer(); qemu_cond_wait(first_cpu->halt_cond, &qemu_global_mutex); } @@ -1656,7 +1658,7 @@ static void *qemu_tcg_rr_cpu_thread_fn(void *arg) atomic_mb_set(&cpu->exit_request, 0); } =20 - if (use_icount && all_cpu_threads_idle()) { + if (use_icount && qemu_tcg_rr_all_cpu_threads_idle()) { /* * When all cpus are sleeping (e.g in WFI), to avoid a deadlock * in the main_loop, wake it up in order to start the warp tim= er. --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590081332; cv=none; d=zohomail.com; s=zohoarc; b=dRyYHwJ4R5UqKa3MmYSwdxa9p1r4NQDzxshG+lZNkunNE/W95OgGB96pWtqcvjR+myodOsn4uqiWcpQyi/RkXYSueTh45N9qLT7/mtXphnzf71x9XZjDPVqK3gon022IQohQQEZuxHktCFi/Np1MBuDspZl/h9gJP6Vv87vRuNY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1590081332; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Use the per-CPU locks to protect the CPUs' state, instead of using the BQL. These locks are uncontended (they are mostly acquired by the corresponding vCPU thread), so acquiring them is cheaper than acquiring the BQL, which particularly in MTTCG can be contended at high core counts. In this conversion we drop qemu_cpu_cond and qemu_pause_cond, and use cpu->cond instead. In qom/cpu.c we can finally remove the ugliness that results from having to hold both the BQL and the CPU lock; now we just have to grab the CPU lock. Removed g_assert(qemu_mutex_iothread_locked()) from qemu_tcg_rr_all_cpu_threads_idle(). There is an existing case where we call qemu_tcg_rr_all_cpu_threads_idle() without the BQL held. Also changed qemu_cond_wait() to qemu_cond_timed_wait() in qemu_tcg_rr_cpu_thread_fn() to fix issue where we might miss the broadcast wakeup. Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson Signed-off-by: Emilio G. Cota [RF: Adjusted assert and changed to use timed_wait] Signed-off-by: Robert Foley --- cpus.c | 288 +++++++++++++++++++++++++++++++----------- hw/core/cpu.c | 29 +---- include/hw/core/cpu.h | 20 +-- 3 files changed, 232 insertions(+), 105 deletions(-) diff --git a/cpus.c b/cpus.c index bcba0552bf..1dbb2fb3f9 100644 --- a/cpus.c +++ b/cpus.c @@ -200,24 +200,30 @@ void cpu_mutex_destroy(CPUState *cpu) } } =20 -bool cpu_is_stopped(CPUState *cpu) +/* Called with the CPU's lock held */ +static bool cpu_is_stopped_locked(CPUState *cpu) { return cpu->stopped || !runstate_is_running(); } =20 -static inline bool cpu_work_list_empty(CPUState *cpu) +bool cpu_is_stopped(CPUState *cpu) { - bool ret; + if (!cpu_mutex_locked(cpu)) { + bool ret; =20 - cpu_mutex_lock(cpu); - ret =3D QSIMPLEQ_EMPTY(&cpu->work_list); - cpu_mutex_unlock(cpu); - return ret; + cpu_mutex_lock(cpu); + ret =3D cpu_is_stopped_locked(cpu); + cpu_mutex_unlock(cpu); + return ret; + } + return cpu_is_stopped_locked(cpu); } =20 static bool cpu_thread_is_idle(CPUState *cpu) { - if (cpu->stop || !cpu_work_list_empty(cpu)) { + g_assert(cpu_mutex_locked(cpu)); + + if (cpu->stop || !QSIMPLEQ_EMPTY(&cpu->work_list)) { return false; } if (cpu_is_stopped(cpu)) { @@ -235,9 +241,16 @@ static bool qemu_tcg_rr_all_cpu_threads_idle(void) CPUState *cpu; =20 g_assert(qemu_is_tcg_rr()); + g_assert(no_cpu_mutex_locked()); =20 CPU_FOREACH(cpu) { - if (!cpu_thread_is_idle(cpu)) { + bool is_idle; + + cpu_mutex_lock(cpu); + is_idle =3D cpu_thread_is_idle(cpu); + cpu_mutex_unlock(cpu); + + if (!is_idle) { return false; } } @@ -730,6 +743,8 @@ void qemu_start_warp_timer(void) =20 static void qemu_account_warp_timer(void) { + g_assert(qemu_mutex_iothread_locked()); + if (!use_icount || !icount_sleep) { return; } @@ -1066,6 +1081,7 @@ static void kick_tcg_thread(void *opaque) static void start_tcg_kick_timer(void) { assert(!mttcg_enabled); + g_assert(qemu_mutex_iothread_locked()); if (!tcg_kick_vcpu_timer && CPU_NEXT(first_cpu)) { tcg_kick_vcpu_timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, kick_tcg_thread, NULL); @@ -1078,6 +1094,7 @@ static void start_tcg_kick_timer(void) static void stop_tcg_kick_timer(void) { assert(!mttcg_enabled); + g_assert(qemu_mutex_iothread_locked()); if (tcg_kick_vcpu_timer && timer_pending(tcg_kick_vcpu_timer)) { timer_del(tcg_kick_vcpu_timer); } @@ -1179,6 +1196,8 @@ int vm_shutdown(void) =20 static bool cpu_can_run(CPUState *cpu) { + g_assert(cpu_mutex_locked(cpu)); + if (cpu->stop) { return false; } @@ -1251,16 +1270,9 @@ static void qemu_init_sigbus(void) =20 static QemuThread io_thread; =20 -/* cpu creation */ -static QemuCond qemu_cpu_cond; -/* system init */ -static QemuCond qemu_pause_cond; - void qemu_init_cpu_loop(void) { qemu_init_sigbus(); - qemu_cond_init(&qemu_cpu_cond); - qemu_cond_init(&qemu_pause_cond); qemu_mutex_init(&qemu_global_mutex); =20 qemu_thread_get_self(&io_thread); @@ -1278,39 +1290,60 @@ static void qemu_tcg_destroy_vcpu(CPUState *cpu) { } =20 -static void qemu_cpu_stop(CPUState *cpu, bool exit) +static void qemu_cpu_stop_locked(CPUState *cpu, bool exit) { + g_assert(cpu_mutex_locked(cpu)); g_assert(qemu_cpu_is_self(cpu)); cpu->stop =3D false; cpu->stopped =3D true; if (exit) { cpu_exit(cpu); } - qemu_cond_broadcast(&qemu_pause_cond); + qemu_cond_broadcast(&cpu->cond); +} + +static void qemu_cpu_stop(CPUState *cpu, bool exit) +{ + cpu_mutex_lock(cpu); + qemu_cpu_stop_locked(cpu, exit); + cpu_mutex_unlock(cpu); } =20 static void qemu_wait_io_event_common(CPUState *cpu) { + g_assert(cpu_mutex_locked(cpu)); + atomic_mb_set(&cpu->thread_kicked, false); if (cpu->stop) { - qemu_cpu_stop(cpu, false); + qemu_cpu_stop_locked(cpu, false); } + /* + * unlock+lock cpu_mutex, so that other vCPUs have a chance to grab the + * lock and queue some work for this vCPU. + */ + cpu_mutex_unlock(cpu); process_queued_cpu_work(cpu); + cpu_mutex_lock(cpu); } =20 static void qemu_tcg_rr_wait_io_event(void) { CPUState *cpu; =20 + g_assert(qemu_mutex_iothread_locked()); + g_assert(no_cpu_mutex_locked()); + while (qemu_tcg_rr_all_cpu_threads_idle()) { stop_tcg_kick_timer(); - qemu_cond_wait(first_cpu->halt_cond, &qemu_global_mutex); + qemu_cond_wait(first_cpu->halt_cond, first_cpu->lock); } =20 start_tcg_kick_timer(); =20 CPU_FOREACH(cpu) { + cpu_mutex_lock(cpu); qemu_wait_io_event_common(cpu); + cpu_mutex_unlock(cpu); } } =20 @@ -1318,12 +1351,15 @@ static void qemu_wait_io_event(CPUState *cpu) { bool slept =3D false; =20 + g_assert(cpu_mutex_locked(cpu)); + g_assert(!qemu_mutex_iothread_locked()); + while (cpu_thread_is_idle(cpu)) { if (!slept) { slept =3D true; qemu_plugin_vcpu_idle_cb(cpu); } - qemu_cond_wait(cpu->halt_cond, &qemu_global_mutex); + qemu_cond_wait(cpu->halt_cond, cpu->lock); } if (slept) { qemu_plugin_vcpu_resume_cb(cpu); @@ -1346,6 +1382,7 @@ static void *qemu_kvm_cpu_thread_fn(void *arg) rcu_register_thread(); =20 qemu_mutex_lock_iothread(); + cpu_mutex_lock(cpu); qemu_thread_get_self(cpu->thread); cpu->thread_id =3D qemu_get_thread_id(); cpu->can_do_io =3D 1; @@ -1358,15 +1395,21 @@ static void *qemu_kvm_cpu_thread_fn(void *arg) } =20 kvm_init_cpu_signals(cpu); + qemu_mutex_unlock_iothread(); =20 /* signal CPU creation */ cpu->created =3D true; - qemu_cond_signal(&qemu_cpu_cond); + qemu_cond_signal(&cpu->cond); qemu_guest_random_seed_thread_part2(cpu->random_seed); =20 do { if (cpu_can_run(cpu)) { + cpu_mutex_unlock(cpu); + qemu_mutex_lock_iothread(); r =3D kvm_cpu_exec(cpu); + qemu_mutex_unlock_iothread(); + cpu_mutex_lock(cpu); + if (r =3D=3D EXCP_DEBUG) { cpu_handle_guest_debug(cpu); } @@ -1374,10 +1417,16 @@ static void *qemu_kvm_cpu_thread_fn(void *arg) qemu_wait_io_event(cpu); } while (!cpu->unplug || cpu_can_run(cpu)); =20 + cpu_mutex_unlock(cpu); + qemu_mutex_lock_iothread(); qemu_kvm_destroy_vcpu(cpu); - cpu->created =3D false; - qemu_cond_signal(&qemu_cpu_cond); qemu_mutex_unlock_iothread(); + + cpu_mutex_lock(cpu); + cpu->created =3D false; + qemu_cond_signal(&cpu->cond); + cpu_mutex_unlock(cpu); + rcu_unregister_thread(); return NULL; } @@ -1394,7 +1443,7 @@ static void *qemu_dummy_cpu_thread_fn(void *arg) =20 rcu_register_thread(); =20 - qemu_mutex_lock_iothread(); + cpu_mutex_lock(cpu); qemu_thread_get_self(cpu->thread); cpu->thread_id =3D qemu_get_thread_id(); cpu->can_do_io =3D 1; @@ -1405,11 +1454,11 @@ static void *qemu_dummy_cpu_thread_fn(void *arg) =20 /* signal CPU creation */ cpu->created =3D true; - qemu_cond_signal(&qemu_cpu_cond); + qemu_cond_signal(&cpu->cond); qemu_guest_random_seed_thread_part2(cpu->random_seed); =20 do { - qemu_mutex_unlock_iothread(); + cpu_mutex_unlock(cpu); do { int sig; r =3D sigwait(&waitset, &sig); @@ -1418,11 +1467,11 @@ static void *qemu_dummy_cpu_thread_fn(void *arg) perror("sigwait"); exit(1); } - qemu_mutex_lock_iothread(); + cpu_mutex_lock(cpu); qemu_wait_io_event(cpu); } while (!cpu->unplug); =20 - qemu_mutex_unlock_iothread(); + cpu_mutex_unlock(cpu); rcu_unregister_thread(); return NULL; #endif @@ -1462,6 +1511,8 @@ static int64_t tcg_get_icount_limit(void) static void handle_icount_deadline(void) { assert(qemu_in_vcpu_thread()); + g_assert(qemu_mutex_iothread_locked()); + if (use_icount) { int64_t deadline =3D qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL, QEMU_TIMER_ATTR_ALL); @@ -1542,12 +1593,15 @@ static void deal_with_unplugged_cpus(void) CPUState *cpu; =20 CPU_FOREACH(cpu) { + cpu_mutex_lock(cpu); if (cpu->unplug && !cpu_can_run(cpu)) { qemu_tcg_destroy_vcpu(cpu); cpu->created =3D false; - qemu_cond_signal(&qemu_cpu_cond); + qemu_cond_signal(&cpu->cond); + cpu_mutex_unlock(cpu); break; } + cpu_mutex_unlock(cpu); } } =20 @@ -1568,25 +1622,45 @@ static void *qemu_tcg_rr_cpu_thread_fn(void *arg) rcu_register_thread(); tcg_register_thread(); =20 + /* + * We call cpu_mutex_lock/unlock just to please the assertions in comm= on + * code, since here cpu->lock is an alias to the BQL. + */ qemu_mutex_lock_iothread(); + cpu_mutex_lock(cpu); qemu_thread_get_self(cpu->thread); - cpu->thread_id =3D qemu_get_thread_id(); cpu->created =3D true; cpu->can_do_io =3D 1; - qemu_cond_signal(&qemu_cpu_cond); + qemu_cond_signal(&cpu->cond); + cpu_mutex_unlock(cpu); qemu_guest_random_seed_thread_part2(cpu->random_seed); =20 /* wait for initial kick-off after machine start */ + cpu_mutex_lock(first_cpu); while (first_cpu->stopped) { - qemu_cond_wait(first_cpu->halt_cond, &qemu_global_mutex); + /* + * a timedwait is needed since this gets kicked off + * by a cond_broadcast, and it is possible + * to not be woken up by the broadcast if we are + * not waiting when the broadcast is sent. + */ + qemu_cond_timedwait(first_cpu->halt_cond, + first_cpu->lock, + 100); + cpu_mutex_unlock(first_cpu); =20 /* process any pending work */ CPU_FOREACH(cpu) { current_cpu =3D cpu; + cpu_mutex_lock(cpu); qemu_wait_io_event_common(cpu); + cpu_mutex_unlock(cpu); } + + cpu_mutex_lock(first_cpu); } + cpu_mutex_unlock(first_cpu); =20 start_tcg_kick_timer(); =20 @@ -1613,7 +1687,12 @@ static void *qemu_tcg_rr_cpu_thread_fn(void *arg) cpu =3D first_cpu; } =20 - while (cpu && cpu_work_list_empty(cpu) && !cpu->exit_request) { + while (cpu) { + cpu_mutex_lock(cpu); + if (!QSIMPLEQ_EMPTY(&cpu->work_list) || cpu->exit_request) { + cpu_mutex_unlock(cpu); + break; + } =20 atomic_mb_set(&tcg_current_rr_cpu, cpu); current_cpu =3D cpu; @@ -1624,6 +1703,7 @@ static void *qemu_tcg_rr_cpu_thread_fn(void *arg) if (cpu_can_run(cpu)) { int r; =20 + cpu_mutex_unlock(cpu); qemu_mutex_unlock_iothread(); prepare_icount_for_run(cpu); =20 @@ -1631,11 +1711,14 @@ static void *qemu_tcg_rr_cpu_thread_fn(void *arg) =20 process_icount_data(cpu); qemu_mutex_lock_iothread(); + cpu_mutex_lock(cpu); =20 if (r =3D=3D EXCP_DEBUG) { cpu_handle_guest_debug(cpu); + cpu_mutex_unlock(cpu); break; } else if (r =3D=3D EXCP_ATOMIC) { + cpu_mutex_unlock(cpu); qemu_mutex_unlock_iothread(); cpu_exec_step_atomic(cpu); qemu_mutex_lock_iothread(); @@ -1645,11 +1728,15 @@ static void *qemu_tcg_rr_cpu_thread_fn(void *arg) if (cpu->unplug) { cpu =3D CPU_NEXT(cpu); } + cpu_mutex_unlock(current_cpu); break; } =20 + cpu_mutex_unlock(cpu); cpu =3D CPU_NEXT(cpu); - } /* while (cpu && !cpu->exit_request).. */ + } /* for (;;) .. */ + + g_assert(no_cpu_mutex_locked()); =20 /* Does not need atomic_mb_set because a spurious wakeup is okay. = */ atomic_set(&tcg_current_rr_cpu, NULL); @@ -1681,6 +1768,7 @@ static void *qemu_hax_cpu_thread_fn(void *arg) =20 rcu_register_thread(); qemu_mutex_lock_iothread(); + cpu_mutex_lock(cpu); qemu_thread_get_self(cpu->thread); =20 cpu->thread_id =3D qemu_get_thread_id(); @@ -1688,12 +1776,18 @@ static void *qemu_hax_cpu_thread_fn(void *arg) current_cpu =3D cpu; =20 hax_init_vcpu(cpu); - qemu_cond_signal(&qemu_cpu_cond); + qemu_mutex_unlock_iothread(); + qemu_cond_signal(&cpu->cond); qemu_guest_random_seed_thread_part2(cpu->random_seed); =20 do { if (cpu_can_run(cpu)) { + cpu_mutex_unlock(cpu); + qemu_mutex_lock_iothread(); r =3D hax_smp_cpu_exec(cpu); + qemu_mutex_unlock_iothread(); + cpu_mutex_lock(cpu); + if (r =3D=3D EXCP_DEBUG) { cpu_handle_guest_debug(cpu); } @@ -1701,6 +1795,8 @@ static void *qemu_hax_cpu_thread_fn(void *arg) =20 qemu_wait_io_event(cpu); } while (!cpu->unplug || cpu_can_run(cpu)); + + cpu_mutex_unlock(cpu); rcu_unregister_thread(); return NULL; } @@ -1718,6 +1814,7 @@ static void *qemu_hvf_cpu_thread_fn(void *arg) rcu_register_thread(); =20 qemu_mutex_lock_iothread(); + cpu_mutex_lock(cpu); qemu_thread_get_self(cpu->thread); =20 cpu->thread_id =3D qemu_get_thread_id(); @@ -1725,15 +1822,21 @@ static void *qemu_hvf_cpu_thread_fn(void *arg) current_cpu =3D cpu; =20 hvf_init_vcpu(cpu); + qemu_mutex_unlock_iothread(); =20 /* signal CPU creation */ cpu->created =3D true; - qemu_cond_signal(&qemu_cpu_cond); + qemu_cond_signal(&cpu->cond); qemu_guest_random_seed_thread_part2(cpu->random_seed); =20 do { if (cpu_can_run(cpu)) { + cpu_mutex_unlock(cpu); + qemu_mutex_lock_iothread(); r =3D hvf_vcpu_exec(cpu); + qemu_mutex_unlock_iothread(); + cpu_mutex_lock(cpu); + if (r =3D=3D EXCP_DEBUG) { cpu_handle_guest_debug(cpu); } @@ -1741,10 +1844,16 @@ static void *qemu_hvf_cpu_thread_fn(void *arg) qemu_wait_io_event(cpu); } while (!cpu->unplug || cpu_can_run(cpu)); =20 + cpu_mutex_unlock(cpu); + qemu_mutex_lock_iothread(); hvf_vcpu_destroy(cpu); - cpu->created =3D false; - qemu_cond_signal(&qemu_cpu_cond); qemu_mutex_unlock_iothread(); + + cpu_mutex_lock(cpu); + cpu->created =3D false; + qemu_cond_signal(&cpu->cond); + cpu_mutex_unlock(cpu); + rcu_unregister_thread(); return NULL; } @@ -1757,6 +1866,7 @@ static void *qemu_whpx_cpu_thread_fn(void *arg) rcu_register_thread(); =20 qemu_mutex_lock_iothread(); + cpu_mutex_lock(cpu); qemu_thread_get_self(cpu->thread); cpu->thread_id =3D qemu_get_thread_id(); current_cpu =3D cpu; @@ -1766,29 +1876,41 @@ static void *qemu_whpx_cpu_thread_fn(void *arg) fprintf(stderr, "whpx_init_vcpu failed: %s\n", strerror(-r)); exit(1); } + qemu_mutex_unlock_iothread(); =20 /* signal CPU creation */ cpu->created =3D true; - qemu_cond_signal(&qemu_cpu_cond); + qemu_cond_signal(&cpu->cond); qemu_guest_random_seed_thread_part2(cpu->random_seed); =20 do { if (cpu_can_run(cpu)) { + cpu_mutex_unlock(cpu); + qemu_mutex_lock_iothread(); r =3D whpx_vcpu_exec(cpu); + qemu_mutex_unlock_iothread(); + cpu_mutex_lock(cpu); + if (r =3D=3D EXCP_DEBUG) { cpu_handle_guest_debug(cpu); } } while (cpu_thread_is_idle(cpu)) { - qemu_cond_wait(cpu->halt_cond, &qemu_global_mutex); + qemu_cond_wait(cpu->halt_cond, cpu->lock); } qemu_wait_io_event_common(cpu); } while (!cpu->unplug || cpu_can_run(cpu)); =20 + cpu_mutex_unlock(cpu); + qemu_mutex_lock_iothread(); whpx_destroy_vcpu(cpu); - cpu->created =3D false; - qemu_cond_signal(&qemu_cpu_cond); qemu_mutex_unlock_iothread(); + + cpu_mutex_lock(cpu); + cpu->created =3D false; + qemu_cond_signal(&cpu->cond); + cpu_mutex_unlock(cpu); + rcu_unregister_thread(); return NULL; } @@ -1816,14 +1938,14 @@ static void *qemu_tcg_cpu_thread_fn(void *arg) rcu_register_thread(); tcg_register_thread(); =20 - qemu_mutex_lock_iothread(); + cpu_mutex_lock(cpu); qemu_thread_get_self(cpu->thread); =20 cpu->thread_id =3D qemu_get_thread_id(); cpu->created =3D true; cpu->can_do_io =3D 1; current_cpu =3D cpu; - qemu_cond_signal(&qemu_cpu_cond); + qemu_cond_signal(&cpu->cond); qemu_guest_random_seed_thread_part2(cpu->random_seed); =20 /* process any pending work */ @@ -1832,9 +1954,9 @@ static void *qemu_tcg_cpu_thread_fn(void *arg) do { if (cpu_can_run(cpu)) { int r; - qemu_mutex_unlock_iothread(); + cpu_mutex_unlock(cpu); r =3D tcg_cpu_exec(cpu); - qemu_mutex_lock_iothread(); + cpu_mutex_lock(cpu); switch (r) { case EXCP_DEBUG: cpu_handle_guest_debug(cpu); @@ -1850,9 +1972,9 @@ static void *qemu_tcg_cpu_thread_fn(void *arg) g_assert(cpu_halted(cpu)); break; case EXCP_ATOMIC: - qemu_mutex_unlock_iothread(); + cpu_mutex_unlock(cpu); cpu_exec_step_atomic(cpu); - qemu_mutex_lock_iothread(); + cpu_mutex_lock(cpu); default: /* Ignore everything else? */ break; @@ -1865,8 +1987,8 @@ static void *qemu_tcg_cpu_thread_fn(void *arg) =20 qemu_tcg_destroy_vcpu(cpu); cpu->created =3D false; - qemu_cond_signal(&qemu_cpu_cond); - qemu_mutex_unlock_iothread(); + qemu_cond_signal(&cpu->cond); + cpu_mutex_unlock(cpu); rcu_unregister_thread(); return NULL; } @@ -1973,54 +2095,69 @@ void qemu_cond_wait_iothread(QemuCond *cond) qemu_cond_wait(cond, &qemu_global_mutex); } =20 -static bool all_vcpus_paused(void) -{ - CPUState *cpu; - - CPU_FOREACH(cpu) { - if (!cpu->stopped) { - return false; - } - } - - return true; -} - void pause_all_vcpus(void) { CPUState *cpu; =20 + g_assert(no_cpu_mutex_locked()); + qemu_clock_enable(QEMU_CLOCK_VIRTUAL, false); CPU_FOREACH(cpu) { + cpu_mutex_lock(cpu); if (qemu_cpu_is_self(cpu)) { qemu_cpu_stop(cpu, true); } else { cpu->stop =3D true; qemu_cpu_kick(cpu); } + cpu_mutex_unlock(cpu); } =20 + drop_locks_and_stop_all_vcpus: /* We need to drop the replay_lock so any vCPU threads woken up * can finish their replay tasks */ replay_mutex_unlock(); + qemu_mutex_unlock_iothread(); =20 - while (!all_vcpus_paused()) { - qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex); - CPU_FOREACH(cpu) { + CPU_FOREACH(cpu) { + cpu_mutex_lock(cpu); + if (!cpu->stopped) { + cpu->stop =3D true; qemu_cpu_kick(cpu); + qemu_cond_wait(&cpu->cond, cpu->lock); } + cpu_mutex_unlock(cpu); } =20 - qemu_mutex_unlock_iothread(); replay_mutex_lock(); qemu_mutex_lock_iothread(); + + /* a CPU might have been hot-plugged while we weren't holding the BQL = */ + CPU_FOREACH(cpu) { + bool stopped; + + cpu_mutex_lock(cpu); + stopped =3D cpu->stopped; + cpu_mutex_unlock(cpu); + + if (!stopped) { + goto drop_locks_and_stop_all_vcpus; + } + } } =20 void cpu_resume(CPUState *cpu) { - cpu->stop =3D false; - cpu->stopped =3D false; + if (cpu_mutex_locked(cpu)) { + cpu->stop =3D false; + cpu->stopped =3D false; + } else { + cpu_mutex_lock(cpu); + cpu->stop =3D false; + cpu->stopped =3D false; + cpu_mutex_unlock(cpu); + } qemu_cpu_kick(cpu); } =20 @@ -2040,8 +2177,11 @@ void resume_all_vcpus(void) =20 void cpu_remove_sync(CPUState *cpu) { + cpu_mutex_lock(cpu); cpu->stop =3D true; cpu->unplug =3D true; + cpu_mutex_unlock(cpu); + qemu_cpu_kick(cpu); qemu_mutex_unlock_iothread(); qemu_thread_join(cpu->thread); @@ -2225,9 +2365,15 @@ void qemu_init_vcpu(CPUState *cpu) qemu_dummy_start_vcpu(cpu); } =20 + qemu_mutex_unlock_iothread(); + + cpu_mutex_lock(cpu); while (!cpu->created) { - qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); + qemu_cond_wait(&cpu->cond, cpu->lock); } + cpu_mutex_unlock(cpu); + + qemu_mutex_lock_iothread(); } =20 void cpu_stop_current(void) diff --git a/hw/core/cpu.c b/hw/core/cpu.c index ee20f8e0ad..2288de90f8 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -95,32 +95,13 @@ static void cpu_common_get_memory_mapping(CPUState *cpu, error_setg(errp, "Obtaining memory mappings is unsupported on this CPU= ."); } =20 -/* Resetting the IRQ comes from across the code base so we take the - * BQL here if we need to. cpu_interrupt assumes it is held.*/ void cpu_reset_interrupt(CPUState *cpu, int mask) { - bool has_bql =3D qemu_mutex_iothread_locked(); - bool has_cpu_lock =3D cpu_mutex_locked(cpu); - - if (has_bql) { - if (has_cpu_lock) { - atomic_set(&cpu->interrupt_request, cpu->interrupt_request & ~= mask); - } else { - cpu_mutex_lock(cpu); - atomic_set(&cpu->interrupt_request, cpu->interrupt_request & ~= mask); - cpu_mutex_unlock(cpu); - } - return; - } - - if (has_cpu_lock) { - cpu_mutex_unlock(cpu); - } - qemu_mutex_lock_iothread(); - cpu_mutex_lock(cpu); - atomic_set(&cpu->interrupt_request, cpu->interrupt_request & ~mask); - qemu_mutex_unlock_iothread(); - if (!has_cpu_lock) { + if (cpu_mutex_locked(cpu)) { + atomic_set(&cpu->interrupt_request, cpu->interrupt_request & ~mask= ); + } else { + cpu_mutex_lock(cpu); + atomic_set(&cpu->interrupt_request, cpu->interrupt_request & ~mask= ); cpu_mutex_unlock(cpu); } } diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 9766477e62..8478628fdb 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -312,10 +312,6 @@ struct qemu_work_item; * valid under cpu_list_lock. * @created: Indicates whether the CPU thread has been successfully create= d. * @interrupt_request: Indicates a pending interrupt request. - * @halted: Nonzero if the CPU is in suspended state. - * @stop: Indicates a pending stop request. - * @stopped: Indicates the CPU has been artificially stopped. - * @unplug: Indicates a pending CPU unplug request. * @crash_occurred: Indicates the OS reported a crash (panic) for this CPU * @singlestep_enabled: Flags for single-stepping. * @icount_extra: Instructions until next timer event. @@ -340,6 +336,10 @@ struct qemu_work_item; * after the BQL. * @cond: Condition variable for per-CPU events. * @work_list: List of pending asynchronous work. + * @halted: Nonzero if the CPU is in suspended state. + * @stop: Indicates a pending stop request. + * @stopped: Indicates the CPU has been artificially stopped. + * @unplug: Indicates a pending CPU unplug request. * @trace_dstate_delayed: Delayed changes to trace_dstate (includes all ch= anges * to @trace_dstate). * @trace_dstate: Dynamic tracing state of events for this vCPU (bitmask). @@ -364,12 +364,7 @@ struct CPUState { #endif int thread_id; bool running, has_waiter; - struct QemuCond *halt_cond; bool thread_kicked; - bool created; - bool stop; - bool stopped; - bool unplug; bool crash_occurred; bool exit_request; bool in_exclusive_context; @@ -385,7 +380,13 @@ struct CPUState { QemuMutex *lock; /* fields below protected by @lock */ QemuCond cond; + QemuCond *halt_cond; QSIMPLEQ_HEAD(, qemu_work_item) work_list; + uint32_t halted; + bool created; + bool stop; + bool stopped; + bool unplug; =20 CPUAddressSpace *cpu_ases; int num_ases; @@ -431,7 +432,6 @@ struct CPUState { /* TODO Move common fields from CPUArchState here. */ int cpu_index; int cluster_index; - uint32_t halted; uint32_t can_do_io; int32_t exception_index; =20 --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590081798; cv=none; d=zohomail.com; s=zohoarc; b=kl3/w9BR2cJi38eEtiaTW4YBzI+KNoBDpyEZ/o2+/kACnYPNrPRBheXnFaW+tFC+kAz3/DDLwu7vD/YIpZLiuieIrrQBzynC81TRanXm28YctFVHtPC6sQaKZIbHauFfBZFgs+lOZF+epo+SgUvlYvAcbegynATV6L0+YWVpn1c= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1590081798; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::843; envelope-from=robert.foley@linaro.org; helo=mail-qt1-x843.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" After completing the conversion to per-CPU locks, there is no need to release the BQL after having called cpu_kick. Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- cpus-common.c | 20 +++++--------------- 1 file changed, 5 insertions(+), 15 deletions(-) diff --git a/cpus-common.c b/cpus-common.c index d418eb5aef..7ccc7df876 100644 --- a/cpus-common.c +++ b/cpus-common.c @@ -135,6 +135,11 @@ void run_on_cpu(CPUState *cpu, run_on_cpu_func func, r= un_on_cpu_data data) return; } =20 + /* We are going to sleep on the CPU lock, so release the BQL */ + if (has_bql) { + qemu_mutex_unlock_iothread(); + } + wi.func =3D func; wi.data =3D data; wi.done =3D false; @@ -143,21 +148,6 @@ void run_on_cpu(CPUState *cpu, run_on_cpu_func func, r= un_on_cpu_data data) =20 cpu_mutex_lock(cpu); queue_work_on_cpu_locked(cpu, &wi); - - /* - * We are going to sleep on the CPU lock, so release the BQL. - * - * During the transition to per-CPU locks, we release the BQL _after_ - * having kicked the destination CPU (from queue_work_on_cpu_locked ab= ove). - * This makes sure that the enqueued work will be seen by the CPU - * after being woken up from the kick, since the CPU sleeps on the BQL. - * Once we complete the transition to per-CPU locks, we will release - * the BQL earlier in this function. - */ - if (has_bql) { - qemu_mutex_unlock_iothread(); - } - while (!atomic_mb_read(&wi.done)) { CPUState *self_cpu =3D current_cpu; =20 --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590081895; cv=none; d=zohomail.com; s=zohoarc; b=OjWCnGK5qurcUPkSrU/Qau4lJq4b72SGcUmYJsZ0gkS6OiaoEnIt3LNx6dQxJX8YMqqmwiyASJgYrI+/rMXhEUkBtUPbcGp2TjE0WBVCa3Z8zcnzRxWPcFVjklpEpQSwQ3w7EF+UY5r+J4JjFyGZZyrcIZyBpF9o+9qnq6HDMyA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1590081895; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=GxlpAA+PZ/IrNPvmGjLlDG9tH8eZcMlAHM/CkfDCuY4=; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::841; envelope-from=robert.foley@linaro.org; helo=mail-qt1-x841.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Some async jobs do not need the BQL. Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- cpus-common.c | 39 ++++++++++++++++++++++++++++++++++----- include/hw/core/cpu.h | 14 ++++++++++++++ 2 files changed, 48 insertions(+), 5 deletions(-) diff --git a/cpus-common.c b/cpus-common.c index 7ccc7df876..651f9b31cc 100644 --- a/cpus-common.c +++ b/cpus-common.c @@ -99,6 +99,7 @@ struct qemu_work_item { run_on_cpu_func func; run_on_cpu_data data; bool free, exclusive, done; + bool bql; }; =20 /* Called with the CPU's lock held */ @@ -145,6 +146,7 @@ void run_on_cpu(CPUState *cpu, run_on_cpu_func func, ru= n_on_cpu_data data) wi.done =3D false; wi.free =3D false; wi.exclusive =3D false; + wi.bql =3D true; =20 cpu_mutex_lock(cpu); queue_work_on_cpu_locked(cpu, &wi); @@ -169,6 +171,21 @@ void async_run_on_cpu(CPUState *cpu, run_on_cpu_func f= unc, run_on_cpu_data data) wi->func =3D func; wi->data =3D data; wi->free =3D true; + wi->bql =3D true; + + queue_work_on_cpu(cpu, wi); +} + +void async_run_on_cpu_no_bql(CPUState *cpu, run_on_cpu_func func, + run_on_cpu_data data) +{ + struct qemu_work_item *wi; + + wi =3D g_malloc0(sizeof(struct qemu_work_item)); + wi->func =3D func; + wi->data =3D data; + wi->free =3D true; + /* wi->bql initialized to false */ =20 queue_work_on_cpu(cpu, wi); } @@ -315,6 +332,7 @@ void async_safe_run_on_cpu(CPUState *cpu, run_on_cpu_fu= nc func, wi->data =3D data; wi->free =3D true; wi->exclusive =3D true; + /* wi->bql initialized to false */ =20 queue_work_on_cpu(cpu, wi); } @@ -339,6 +357,7 @@ static void process_queued_cpu_work_locked(CPUState *cp= u) * BQL, so it goes to sleep; start_exclusive() is sleeping too= , so * neither CPU can proceed. */ + g_assert(!wi->bql); if (has_bql) { qemu_mutex_unlock_iothread(); } @@ -349,12 +368,22 @@ static void process_queued_cpu_work_locked(CPUState *= cpu) qemu_mutex_lock_iothread(); } } else { - if (has_bql) { - wi->func(cpu, wi->data); + if (wi->bql) { + if (has_bql) { + wi->func(cpu, wi->data); + } else { + qemu_mutex_lock_iothread(); + wi->func(cpu, wi->data); + qemu_mutex_unlock_iothread(); + } } else { - qemu_mutex_lock_iothread(); - wi->func(cpu, wi->data); - qemu_mutex_unlock_iothread(); + if (has_bql) { + qemu_mutex_unlock_iothread(); + wi->func(cpu, wi->data); + qemu_mutex_lock_iothread(); + } else { + wi->func(cpu, wi->data); + } } } cpu_mutex_lock(cpu); diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 8478628fdb..b061618666 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -889,9 +889,23 @@ void run_on_cpu(CPUState *cpu, run_on_cpu_func func, r= un_on_cpu_data data); * @data: Data to pass to the function. * * Schedules the function @func for execution on the vCPU @cpu asynchronou= sly. + * See also: async_run_on_cpu_no_bql() */ void async_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data= data); =20 +/** + * async_run_on_cpu_no_bql: + * @cpu: The vCPU to run on. + * @func: The function to be executed. + * @data: Data to pass to the function. + * + * Schedules the function @func for execution on the vCPU @cpu asynchronou= sly. + * This function is run outside the BQL. + * See also: async_run_on_cpu() + */ +void async_run_on_cpu_no_bql(CPUState *cpu, run_on_cpu_func func, + run_on_cpu_data data); + /** * async_safe_run_on_cpu: * @cpu: The vCPU to run on. --=20 2.17.1 From nobody Thu Apr 18 03:19:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1590082017; cv=none; d=zohomail.com; s=zohoarc; b=fCfPbwzl0HKYEQenEoMPeo+uxsXWL9qgoCRc6+5OnvBy/d5iCbZatVjW5wPCuQuPewyLR2Y+xukoNz9c2kIplvjWWoDEuHrw6xk9I+C2rw2RST5MPzkncmPstILaBV8PscJWnu0dLqdekXPjeUmrpGTJRd+WzMDFlFysRU1ec/k= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1590082017; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Un0q+TORCXPo2kVgpbtgd18wfbS4+otCPFQoRusR5X8=; b=ebQqCkk7QUeolJCfxGFAWAi1Jb7JjlGTlOnxMDoWVSZw0aG5z4aBGDwkwpiJLUOVAArnr/tMKPwtn2Ht4pepBKoeOTFf1dchukPbFX9yF5I6t6wKxZqc2D77ewmYWJK9qaUwDfzvvLlAM5K5Hum5HfnIhp6+gFx2vInX6eo8bT4= ARC-Authentication-Results: i=1; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" This yields sizable scalability improvements, as the below results show. Host: Two Intel Xeon Silver 4114 10-core CPUs at 2.20 GHz VM: Ubuntu 18.04 ppc64 Speedup vs a single thread for kernel build =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 7 +-----------------------------------------------------------------= ------+ =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 =C2=A0 + =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0+ =C2=A0 =C2=A0 =C2=A0 =C2=A0 + =C2=A0 =C2=A0 =C2=A0 =C2=A0 + =C2=A0 = =C2=A0 =C2=A0 =C2=A0 + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0+ =C2=A0 =C2=A0 = =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0#########= ## =C2=A0 =C2=A0 =C2=A0 baseline ******* | =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 ##### =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 #### =C2=A0 cpu lock ####### | =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 ## =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0#### =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0| =C2=A0 =C2=A0 6 |-+ =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 ## =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0## =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0+-| =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 ## =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0#### =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0| =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 ## =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0##= # =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 ## =C2=A0 =C2=A0 =C2=A0 =C2=A0***** =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0# =C2= =A0 =C2=A0 =C2=A0| =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 ## =C2=A0 =C2=A0 =C2=A0**** =C2=A0 =C2=A0 *** =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0# =C2=A0 = =C2=A0 | =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 ## = =C2=A0 =C2=A0 *** =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0* =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 5 |-+ =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 ## =C2=A0 =C2=A0*** = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0**** =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 +-| = =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0# =C2=A0***= * =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 ** =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 # ** =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 ** =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 #* =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 ** =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0#* =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0** =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 =C2=A0 #* =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 * =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0| =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 =C2=A0 # =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 ****** =C2=A0 = =C2=A0 =C2=A0 =C2=A0| =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 =C2=A0# =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0** =C2=A0 =C2=A0 =C2=A0| =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 # =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 * =C2=A0 =C2=A0 | =C2=A0 =C2=A0 3 |-+ =C2=A0 =C2=A0 # =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 +-| =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0# =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0| =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0# =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0| =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 # =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 # =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 2 |-+ =C2=A0# =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0+-| =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0# =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0| =C2=A0 =C2=A0 =C2=A0 | =C2=A0 # =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 | =C2=A0 # =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A0 =C2=A0 | =C2=A0# =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0| =C2=A0 =C2=A0 =C2=A0 | =C2=A0# =C2=A0 =C2=A0 =C2=A0+ =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0+ =C2=A0 =C2=A0 =C2=A0 =C2=A0 + =C2=A0 =C2=A0 =C2=A0 =C2=A0 + =C2=A0 = =C2=A0 =C2=A0 =C2=A0 + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0+ =C2=A0 =C2=A0 = =C2=A0 =C2=A0 | =C2=A0 =C2=A0 1 +-----------------------------------------------------------------= ------+ =C2=A0 =C2=A0 =C2=A0 0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 5 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A010 =C2=A0 =C2=A0 =C2=A0 =C2=A015 =C2=A0 =C2=A0 =C2=A0 =C2=A020 =C2=A0= =C2=A0 =C2=A0 =C2=A025 =C2=A0 =C2=A0 =C2=A0 =C2=A0 30 =C2=A0 =C2=A0 =C2=A0= =C2=A035 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0Guest vCPUs =C2=A0 Pictures are also here: https://drive.google.com/file/d/1ASg5XyP9hNfN9VysXC3qe5s9QSJlwFAt/view?usp= =3Dsharing Some notes: - baseline corresponds to the commit before this series - cpu-lock is this series Single-threaded performance is affected very lightly. Results below for debian aarch64 bootup+test for the entire series on an Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz host: - Before: Performance counter stats for 'taskset -c 0 ../img/aarch64/die.sh' (10 run= s): 7269.033478 task-clock (msec) # 0.998 CPUs utilized ( +- 0.06% ) 30,659,870,302 cycles # 4.218 GHz ( +- 0.06% ) 54,790,540,051 instructions # 1.79 insns per cycle ( +- 0.05% ) 9,796,441,380 branches # 1347.695 M/sec ( +- 0.05% ) 165,132,201 branch-misses # 1.69% of all branches ( +- 0.12% ) 7.287011656 seconds time elapsed ( +- 0.10% ) - After: 7375.924053 task-clock (msec) # 0.998 CPUs utilized ( +- 0.13% ) 31,107,548,846 cycles # 4.217 GHz ( +- 0.12% ) 55,355,668,947 instructions # 1.78 insns per cycle ( +- 0.05% ) 9,929,917,664 branches # 1346.261 M/sec ( +- 0.04% ) 166,547,442 branch-misses # 1.68% of all branches ( +- 0.09% ) 7.389068145 seconds time elapsed ( +- 0.13% ) That is, a 1.37% slowdown. Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson Tested-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota [Updated the speedup chart results for re-based series.] Signed-off-by: Robert Foley --- accel/tcg/cputlb.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index eb2cf9de5e..50bc76fb61 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -284,7 +284,7 @@ static void flush_all_helper(CPUState *src, run_on_cpu_= func fn, =20 CPU_FOREACH(cpu) { if (cpu !=3D src) { - async_run_on_cpu(cpu, fn, d); + async_run_on_cpu_no_bql(cpu, fn, d); } } } @@ -352,8 +352,8 @@ void tlb_flush_by_mmuidx(CPUState *cpu, uint16_t idxmap) tlb_debug("mmu_idx: 0x%" PRIx16 "\n", idxmap); =20 if (cpu->created && !qemu_cpu_is_self(cpu)) { - async_run_on_cpu(cpu, tlb_flush_by_mmuidx_async_work, - RUN_ON_CPU_HOST_INT(idxmap)); + async_run_on_cpu_no_bql(cpu, tlb_flush_by_mmuidx_async_work, + RUN_ON_CPU_HOST_INT(idxmap)); } else { tlb_flush_by_mmuidx_async_work(cpu, RUN_ON_CPU_HOST_INT(idxmap)); } @@ -547,7 +547,7 @@ void tlb_flush_page_by_mmuidx(CPUState *cpu, target_ulo= ng addr, uint16_t idxmap) * we can stuff idxmap into the low TARGET_PAGE_BITS, avoid * allocating memory for this operation. */ - async_run_on_cpu(cpu, tlb_flush_page_by_mmuidx_async_1, + async_run_on_cpu_no_bql(cpu, tlb_flush_page_by_mmuidx_async_1, RUN_ON_CPU_TARGET_PTR(addr | idxmap)); } else { TLBFlushPageByMMUIdxData *d =3D g_new(TLBFlushPageByMMUIdxData, 1); @@ -555,7 +555,7 @@ void tlb_flush_page_by_mmuidx(CPUState *cpu, target_ulo= ng addr, uint16_t idxmap) /* Otherwise allocate a structure, freed by the worker. */ d->addr =3D addr; d->idxmap =3D idxmap; - async_run_on_cpu(cpu, tlb_flush_page_by_mmuidx_async_2, + async_run_on_cpu_no_bql(cpu, tlb_flush_page_by_mmuidx_async_2, RUN_ON_CPU_HOST_PTR(d)); } } --=20 2.17.1