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[174.21.143.238]) by smtp.gmail.com with ESMTPSA id gx21sm96685pjb.47.2020.05.19.09.50.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 May 2020 09:50:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cC6AWG5XyAggAOPFHLJeHkmubl9dOS4YtOi8r0R/48A=; b=itfyHYab9iQHkBBPQnJcpg8yYY/2xhzgwFDPtoC6H8Pt4wnw9QA9IyPJadWQDf7PPZ PJ5LKEv7FF6zBNRf9kCMKiGsgo9RT2BXzUoX73gAAfj3OH1Lf1eN9Ugd/LBdrEvIRkf9 mK3DsAS7AN9fgN4sj+yzCKG3Iv4GXavgN9ygUEauXTQMSO7azg4ynaTvosWEZnsn1Srb IgW4XzQjWptl3mcTxidDyItowI3gkwJ3bJ1wbUzI3a1Bo1G+sEC11jkwzoHi4IiLn5SS 9niI9HlXmz1dZGT7n+6GO9NMdRXZ/0LgliKb3WdICJnycvsBi+6TVcX/TFJLEjkFY2FE znbQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cC6AWG5XyAggAOPFHLJeHkmubl9dOS4YtOi8r0R/48A=; b=cbJ9MLfJFVeudSHwZggQoaw1N0pcFKfystOR+7GgmqDQXHIutr48FixTV/7sZSUSbY 6Amx3K4b1UvMGhaLAfytIJ7tNkWFtxxCRPD7dBm8nFXwSUBi+wASJtVYt+XrIKprYHe3 SkdD3muoH66IUYIRRpM3nGuPFUKrjTX1haU3xfWDZoy1bZwMmYEOhkF600ZLbYW8znlx 5Hjyn5lPlOa3qo3hCFVSh5myK7XaQ13vK8miGXz08RBXxHXKvWxbLoicRD727eYNTH6c VqaOl1wxKbkQHiv/Gr/CY7OmC4xfb/VFygrz6c9Z2dXx6hG54jwzQt5yjSRxiECmd0uV CmSQ== X-Gm-Message-State: AOAM533xBTn8mxxFvUTJsfFIvFHXyY6BzzSrx9yajR8rm2kCFhLWVYHe 7DuBLTwmBiJibqswvHIdTTd3B45Ybc0= X-Google-Smtp-Source: ABdhPJxi3PfIDnhlby7tk7GsTKpqBpB2QNnPgRnewWnHxqk1uAYnlhKr9Z0C8/xgupylHhsGqYlfOw== X-Received: by 2002:a17:90a:881:: with SMTP id v1mr435732pjc.227.1589907009332; Tue, 19 May 2020 09:50:09 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 07/10] softfloat: Inline float64 compare specializations Date: Tue, 19 May 2020 09:49:54 -0700 Message-Id: <20200519164957.26920-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200519164957.26920-1-richard.henderson@linaro.org> References: <20200519164957.26920-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x629.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Replace the float64 compare specializations with inline functions that call the standard float64_compare{,_quiet} functions. Use bool as the return type. Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- include/fpu/softfloat.h | 49 ++++++-- fpu/softfloat.c | 220 ---------------------------------- target/s390x/vec_fpu_helper.c | 2 +- 3 files changed, 42 insertions(+), 229 deletions(-) diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 4d1af6ab45..281f0fd971 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -532,14 +532,6 @@ float64 float64_rem(float64, float64, float_status *st= atus); float64 float64_muladd(float64, float64, float64, int, float_status *statu= s); float64 float64_sqrt(float64, float_status *status); float64 float64_log2(float64, float_status *status); -int float64_eq(float64, float64, float_status *status); -int float64_le(float64, float64, float_status *status); -int float64_lt(float64, float64, float_status *status); -int float64_unordered(float64, float64, float_status *status); -int float64_eq_quiet(float64, float64, float_status *status); -int float64_le_quiet(float64, float64, float_status *status); -int float64_lt_quiet(float64, float64, float_status *status); -int float64_unordered_quiet(float64, float64, float_status *status); FloatRelation float64_compare(float64, float64, float_status *status); FloatRelation float64_compare_quiet(float64, float64, float_status *status= ); float64 float64_min(float64, float64, float_status *status); @@ -615,6 +607,47 @@ static inline float64 float64_set_sign(float64 a, int = sign) | ((int64_t)sign << 63)); } =20 +static inline bool float64_eq(float64 a, float64 b, float_status *s) +{ + return float64_compare(a, b, s) =3D=3D float_relation_equal; +} + +static inline bool float64_le(float64 a, float64 b, float_status *s) +{ + return float64_compare(a, b, s) <=3D float_relation_equal; +} + +static inline bool float64_lt(float64 a, float64 b, float_status *s) +{ + return float64_compare(a, b, s) < float_relation_equal; +} + +static inline bool float64_unordered(float64 a, float64 b, float_status *s) +{ + return float64_compare(a, b, s) =3D=3D float_relation_unordered; +} + +static inline bool float64_eq_quiet(float64 a, float64 b, float_status *s) +{ + return float64_compare_quiet(a, b, s) =3D=3D float_relation_equal; +} + +static inline bool float64_le_quiet(float64 a, float64 b, float_status *s) +{ + return float64_compare_quiet(a, b, s) <=3D float_relation_equal; +} + +static inline bool float64_lt_quiet(float64 a, float64 b, float_status *s) +{ + return float64_compare_quiet(a, b, s) < float_relation_equal; +} + +static inline bool float64_unordered_quiet(float64 a, float64 b, + float_status *s) +{ + return float64_compare_quiet(a, b, s) =3D=3D float_relation_unordered; +} + #define float64_zero make_float64(0) #define float64_half make_float64(0x3fe0000000000000LL) #define float64_one make_float64(0x3ff0000000000000LL) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index f6bfc40c97..5d7fc2c17a 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -4941,226 +4941,6 @@ float64 float64_log2(float64 a, float_status *statu= s) return normalizeRoundAndPackFloat64(zSign, 0x408, zSig, status); } =20 -/*------------------------------------------------------------------------= ---- -| Returns 1 if the double-precision floating-point value `a' is equal to t= he -| corresponding value `b', and 0 otherwise. The invalid exception is rais= ed -| if either operand is a NaN. Otherwise, the comparison is performed -| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float64_eq(float64 a, float64 b, float_status *status) -{ - uint64_t av, bv; - a =3D float64_squash_input_denormal(a, status); - b =3D float64_squash_input_denormal(b, status); - - if ( ( ( extractFloat64Exp( a ) =3D=3D 0x7FF ) && extractFloat64Fra= c( a ) ) - || ( ( extractFloat64Exp( b ) =3D=3D 0x7FF ) && extractFloat64Fra= c( b ) ) - ) { - float_raise(float_flag_invalid, status); - return 0; - } - av =3D float64_val(a); - bv =3D float64_val(b); - return ( av =3D=3D bv ) || ( (uint64_t) ( ( av | bv )<<1 ) =3D=3D 0 ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the double-precision floating-point value `a' is less than = or -| equal to the corresponding value `b', and 0 otherwise. The invalid -| exception is raised if either operand is a NaN. The comparison is perfo= rmed -| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float64_le(float64 a, float64 b, float_status *status) -{ - bool aSign, bSign; - uint64_t av, bv; - a =3D float64_squash_input_denormal(a, status); - b =3D float64_squash_input_denormal(b, status); - - if ( ( ( extractFloat64Exp( a ) =3D=3D 0x7FF ) && extractFloat64Fra= c( a ) ) - || ( ( extractFloat64Exp( b ) =3D=3D 0x7FF ) && extractFloat64Fra= c( b ) ) - ) { - float_raise(float_flag_invalid, status); - return 0; - } - aSign =3D extractFloat64Sign( a ); - bSign =3D extractFloat64Sign( b ); - av =3D float64_val(a); - bv =3D float64_val(b); - if ( aSign !=3D bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 = ) =3D=3D 0 ); - return ( av =3D=3D bv ) || ( aSign ^ ( av < bv ) ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the double-precision floating-point value `a' is less than -| the corresponding value `b', and 0 otherwise. The invalid exception is -| raised if either operand is a NaN. The comparison is performed according -| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float64_lt(float64 a, float64 b, float_status *status) -{ - bool aSign, bSign; - uint64_t av, bv; - - a =3D float64_squash_input_denormal(a, status); - b =3D float64_squash_input_denormal(b, status); - if ( ( ( extractFloat64Exp( a ) =3D=3D 0x7FF ) && extractFloat64Fra= c( a ) ) - || ( ( extractFloat64Exp( b ) =3D=3D 0x7FF ) && extractFloat64Fra= c( b ) ) - ) { - float_raise(float_flag_invalid, status); - return 0; - } - aSign =3D extractFloat64Sign( a ); - bSign =3D extractFloat64Sign( b ); - av =3D float64_val(a); - bv =3D float64_val(b); - if ( aSign !=3D bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 = ) !=3D 0 ); - return ( av !=3D bv ) && ( aSign ^ ( av < bv ) ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the double-precision floating-point values `a' and `b' cann= ot -| be compared, and 0 otherwise. The invalid exception is raised if either -| operand is a NaN. The comparison is performed according to the IEC/IEEE -| Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float64_unordered(float64 a, float64 b, float_status *status) -{ - a =3D float64_squash_input_denormal(a, status); - b =3D float64_squash_input_denormal(b, status); - - if ( ( ( extractFloat64Exp( a ) =3D=3D 0x7FF ) && extractFloat64Fra= c( a ) ) - || ( ( extractFloat64Exp( b ) =3D=3D 0x7FF ) && extractFloat64Fra= c( b ) ) - ) { - float_raise(float_flag_invalid, status); - return 1; - } - return 0; -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the double-precision floating-point value `a' is equal to t= he -| corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an -| exception.The comparison is performed according to the IEC/IEEE Standard -| for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float64_eq_quiet(float64 a, float64 b, float_status *status) -{ - uint64_t av, bv; - a =3D float64_squash_input_denormal(a, status); - b =3D float64_squash_input_denormal(b, status); - - if ( ( ( extractFloat64Exp( a ) =3D=3D 0x7FF ) && extractFloat64Fra= c( a ) ) - || ( ( extractFloat64Exp( b ) =3D=3D 0x7FF ) && extractFloat64Fra= c( b ) ) - ) { - if (float64_is_signaling_nan(a, status) - || float64_is_signaling_nan(b, status)) { - float_raise(float_flag_invalid, status); - } - return 0; - } - av =3D float64_val(a); - bv =3D float64_val(b); - return ( av =3D=3D bv ) || ( (uint64_t) ( ( av | bv )<<1 ) =3D=3D 0 ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the double-precision floating-point value `a' is less than = or -| equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do not -| cause an exception. Otherwise, the comparison is performed according to= the -| IEC/IEEE Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float64_le_quiet(float64 a, float64 b, float_status *status) -{ - bool aSign, bSign; - uint64_t av, bv; - a =3D float64_squash_input_denormal(a, status); - b =3D float64_squash_input_denormal(b, status); - - if ( ( ( extractFloat64Exp( a ) =3D=3D 0x7FF ) && extractFloat64Fra= c( a ) ) - || ( ( extractFloat64Exp( b ) =3D=3D 0x7FF ) && extractFloat64Fra= c( b ) ) - ) { - if (float64_is_signaling_nan(a, status) - || float64_is_signaling_nan(b, status)) { - float_raise(float_flag_invalid, status); - } - return 0; - } - aSign =3D extractFloat64Sign( a ); - bSign =3D extractFloat64Sign( b ); - av =3D float64_val(a); - bv =3D float64_val(b); - if ( aSign !=3D bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 = ) =3D=3D 0 ); - return ( av =3D=3D bv ) || ( aSign ^ ( av < bv ) ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the double-precision floating-point value `a' is less than -| the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an -| exception. Otherwise, the comparison is performed according to the IEC/= IEEE -| Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float64_lt_quiet(float64 a, float64 b, float_status *status) -{ - bool aSign, bSign; - uint64_t av, bv; - a =3D float64_squash_input_denormal(a, status); - b =3D float64_squash_input_denormal(b, status); - - if ( ( ( extractFloat64Exp( a ) =3D=3D 0x7FF ) && extractFloat64Fra= c( a ) ) - || ( ( extractFloat64Exp( b ) =3D=3D 0x7FF ) && extractFloat64Fra= c( b ) ) - ) { - if (float64_is_signaling_nan(a, status) - || float64_is_signaling_nan(b, status)) { - float_raise(float_flag_invalid, status); - } - return 0; - } - aSign =3D extractFloat64Sign( a ); - bSign =3D extractFloat64Sign( b ); - av =3D float64_val(a); - bv =3D float64_val(b); - if ( aSign !=3D bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 = ) !=3D 0 ); - return ( av !=3D bv ) && ( aSign ^ ( av < bv ) ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the double-precision floating-point values `a' and `b' cann= ot -| be compared, and 0 otherwise. Quiet NaNs do not cause an exception. The -| comparison is performed according to the IEC/IEEE Standard for Binary -| Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float64_unordered_quiet(float64 a, float64 b, float_status *status) -{ - a =3D float64_squash_input_denormal(a, status); - b =3D float64_squash_input_denormal(b, status); - - if ( ( ( extractFloat64Exp( a ) =3D=3D 0x7FF ) && extractFloat64Fra= c( a ) ) - || ( ( extractFloat64Exp( b ) =3D=3D 0x7FF ) && extractFloat64Fra= c( b ) ) - ) { - if (float64_is_signaling_nan(a, status) - || float64_is_signaling_nan(b, status)) { - float_raise(float_flag_invalid, status); - } - return 1; - } - return 0; -} - /*------------------------------------------------------------------------= ---- | Returns the result of converting the extended double-precision floating- | point value `a' to the 32-bit two's complement integer format. The diff --git a/target/s390x/vec_fpu_helper.c b/target/s390x/vec_fpu_helper.c index a48bd704bc..c1564e819b 100644 --- a/target/s390x/vec_fpu_helper.c +++ b/target/s390x/vec_fpu_helper.c @@ -174,7 +174,7 @@ void HELPER(gvec_wfk64)(const void *v1, const void *v2,= CPUS390XState *env, env->cc_op =3D wfc64(v1, v2, env, true, GETPC()); } =20 -typedef int (*vfc64_fn)(float64 a, float64 b, float_status *status); +typedef bool (*vfc64_fn)(float64 a, float64 b, float_status *status); static int vfc64(S390Vector *v1, const S390Vector *v2, const S390Vector *v= 3, CPUS390XState *env, bool s, vfc64_fn fn, uintptr_t retadd= r) { --=20 2.20.1