From nobody Fri Oct 10 15:41:05 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589907228; cv=none; d=zohomail.com; s=zohoarc; b=FUChMJn43QKxOEo9sVx1hA+steVPhhLwEVT3B8uurCS9bFVuirdyoN6ofVfuKO5RRpin8+IMLp+H6vW0kQV6D/ibzvVhMw+aVrmoyrQuIgrZYwNTGvrQ8iCMDTXn+3H/SBdOJNnvG+2gu5I3yysTP97FKyBN6D1baHiontKxIM8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589907228; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=t9pT0Q4+8hbyGEPnnmWgTKHwMpFAtd7y/gygXUCov5o=; b=UWGGZVrRURvqFoowZ/9r0l+db0lnMjgnwn6x7NBzr0D6cCnQnvk+GW+jbUgjS06lJJk0k5Ivp2hmN38gQVpCqkBVVfi3tQ8VxB8JsqRE8MIENo1qzGftVMCCJQMYuROnHp3RO/o7X7I9NJ8GdNKaGGGTEEM2hEDlCZjDgDBFcmU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589907228018162.46856951721463; Tue, 19 May 2020 09:53:48 -0700 (PDT) Received: from localhost ([::1]:36176 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jb5Uw-0002ZM-Cs for importer@patchew.org; Tue, 19 May 2020 12:53:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59644) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jb5RR-0004hK-G3 for qemu-devel@nongnu.org; Tue, 19 May 2020 12:50:09 -0400 Received: from mail-pf1-x42d.google.com ([2607:f8b0:4864:20::42d]:46322) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jb5RO-0006Cl-0T for qemu-devel@nongnu.org; Tue, 19 May 2020 12:50:09 -0400 Received: by mail-pf1-x42d.google.com with SMTP id 145so161064pfw.13 for ; Tue, 19 May 2020 09:50:05 -0700 (PDT) Received: from localhost.localdomain (174-21-143-238.tukw.qwest.net. [174.21.143.238]) by smtp.gmail.com with ESMTPSA id gx21sm96685pjb.47.2020.05.19.09.50.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 May 2020 09:50:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=t9pT0Q4+8hbyGEPnnmWgTKHwMpFAtd7y/gygXUCov5o=; b=F/Clsgd4xWZAS32K0Bb4jp+FiciQdFwp8KLD+4Jux0ZbdnbMhJfUURQEHfNAF7zHZo eWIRaoca3SF/RMRN/LZVsI5qLCk1QCzFlpML6HqHYESgAnx0LCao4kja2LkpF5YARs9F 0wwQGLPNxDJp4QpEx7t4umBeraJezy59Y31K7lsl3GbcW2yaR1X0+y47R62KTIAoz3Y3 d7wIZpC/GFyZ6AoVQf3dGypcEO8XmGMGYhIjoZkqchSeNyKMAwpu4eDVOft/LwczvpjU smhcdYsYIjVDw9OUfg2+Ref+ENNYYxbQC2BojFMam8fNAf0JGbDk27Hmpq+OaxqXGXXf Redg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=t9pT0Q4+8hbyGEPnnmWgTKHwMpFAtd7y/gygXUCov5o=; b=aFeTootMbzAC/hmfL/RkmqHem1LvDr09/k+NsaoEMntmBqogDpny8LSQ7c8H0+/+9O lwGh+GFeL2aOwbAtcXZVpoj8xUnTn4fJKLkjoF9qpmg3EOUbBmoc1ZPJQPkDk9O+QROZ fYqu4A61lFA0cMG8ZnXhJQOrtFlJQ38/LZ/kus3H93gi4ghx+QMfYXPVfEeSQ/0q6r+o vHrkg65GZLRTAN2/X8vE9hDdFQtfps0wsFRafh/TTyqZRHD5hyEC4M9PVzJhGhpaUZA8 YQ4yYk9YhneRXwWxVC+Tyab7Gi9NcnTXAnYtLA1oBXdLLdtX0+Fom4ArB8QTHa7k3rMd Blig== X-Gm-Message-State: AOAM530x51aABDyZnmUiOOT8MwiLT7Fjnd3alrKQCirkA8C33loz10vd TnpIfkn/OQhq+j8aQcZuKBd2i9QEgBM= X-Google-Smtp-Source: ABdhPJxD//RTdS69ODmbZMGphU0cMihIMRYcpIOfEKtpN+jy6BtOsapgElkHQQ2tRBWivbIfx3WFmA== X-Received: by 2002:a63:ef09:: with SMTP id u9mr123008pgh.406.1589907002115; Tue, 19 May 2020 09:50:02 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 02/10] softfloat: Replace flag with bool Date: Tue, 19 May 2020 09:49:49 -0700 Message-Id: <20200519164957.26920-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200519164957.26920-1-richard.henderson@linaro.org> References: <20200519164957.26920-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42d; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42d.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) We have had this on the to-do list for quite some time. Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- include/fpu/softfloat-helpers.h | 14 +-- include/fpu/softfloat-macros.h | 24 ++-- include/fpu/softfloat-types.h | 14 +-- include/fpu/softfloat.h | 10 +- fpu/softfloat-specialize.inc.c | 16 +-- fpu/softfloat.c | 190 ++++++++++++++++---------------- target/arm/sve_helper.c | 8 +- target/arm/vfp_helper.c | 8 +- target/m68k/softfloat.c | 70 ++++++------ target/mips/msa_helper.c | 10 +- 10 files changed, 174 insertions(+), 190 deletions(-) diff --git a/include/fpu/softfloat-helpers.h b/include/fpu/softfloat-helper= s.h index e0baf24c8f..528d7ebd9f 100644 --- a/include/fpu/softfloat-helpers.h +++ b/include/fpu/softfloat-helpers.h @@ -74,22 +74,22 @@ static inline void set_floatx80_rounding_precision(int = val, status->floatx80_rounding_precision =3D val; } =20 -static inline void set_flush_to_zero(flag val, float_status *status) +static inline void set_flush_to_zero(bool val, float_status *status) { status->flush_to_zero =3D val; } =20 -static inline void set_flush_inputs_to_zero(flag val, float_status *status) +static inline void set_flush_inputs_to_zero(bool val, float_status *status) { status->flush_inputs_to_zero =3D val; } =20 -static inline void set_default_nan_mode(flag val, float_status *status) +static inline void set_default_nan_mode(bool val, float_status *status) { status->default_nan_mode =3D val; } =20 -static inline void set_snan_bit_is_one(flag val, float_status *status) +static inline void set_snan_bit_is_one(bool val, float_status *status) { status->snan_bit_is_one =3D val; } @@ -114,17 +114,17 @@ static inline int get_floatx80_rounding_precision(flo= at_status *status) return status->floatx80_rounding_precision; } =20 -static inline flag get_flush_to_zero(float_status *status) +static inline bool get_flush_to_zero(float_status *status) { return status->flush_to_zero; } =20 -static inline flag get_flush_inputs_to_zero(float_status *status) +static inline bool get_flush_inputs_to_zero(float_status *status) { return status->flush_inputs_to_zero; } =20 -static inline flag get_default_nan_mode(float_status *status) +static inline bool get_default_nan_mode(float_status *status) { return status->default_nan_mode; } diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h index 605c4f4bc6..a35ec2893a 100644 --- a/include/fpu/softfloat-macros.h +++ b/include/fpu/softfloat-macros.h @@ -756,11 +756,9 @@ static inline uint32_t estimateSqrt32(int aExp, uint32= _t a) | Otherwise, returns 0. *-------------------------------------------------------------------------= ---*/ =20 -static inline flag eq128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t = b1 ) +static inline bool eq128(uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b= 1) { - - return ( a0 =3D=3D b0 ) && ( a1 =3D=3D b1 ); - + return a0 =3D=3D b0 && a1 =3D=3D b1; } =20 /*------------------------------------------------------------------------= ---- @@ -769,11 +767,9 @@ static inline flag eq128( uint64_t a0, uint64_t a1, ui= nt64_t b0, uint64_t b1 ) | Otherwise, returns 0. *-------------------------------------------------------------------------= ---*/ =20 -static inline flag le128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t = b1 ) +static inline bool le128(uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b= 1) { - - return ( a0 < b0 ) || ( ( a0 =3D=3D b0 ) && ( a1 <=3D b1 ) ); - + return a0 < b0 || (a0 =3D=3D b0 && a1 <=3D b1); } =20 /*------------------------------------------------------------------------= ---- @@ -782,11 +778,9 @@ static inline flag le128( uint64_t a0, uint64_t a1, ui= nt64_t b0, uint64_t b1 ) | returns 0. *-------------------------------------------------------------------------= ---*/ =20 -static inline flag lt128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t = b1 ) +static inline bool lt128(uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b= 1) { - - return ( a0 < b0 ) || ( ( a0 =3D=3D b0 ) && ( a1 < b1 ) ); - + return a0 < b0 || (a0 =3D=3D b0 && a1 < b1); } =20 /*------------------------------------------------------------------------= ---- @@ -795,11 +789,9 @@ static inline flag lt128( uint64_t a0, uint64_t a1, ui= nt64_t b0, uint64_t b1 ) | Otherwise, returns 0. *-------------------------------------------------------------------------= ---*/ =20 -static inline flag ne128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t = b1 ) +static inline bool ne128(uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b= 1) { - - return ( a0 !=3D b0 ) || ( a1 !=3D b1 ); - + return a0 !=3D b0 || a1 !=3D b1; } =20 #endif diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h index 2aae6a89b1..619b875df6 100644 --- a/include/fpu/softfloat-types.h +++ b/include/fpu/softfloat-types.h @@ -80,12 +80,6 @@ this code that are retained. #ifndef SOFTFLOAT_TYPES_H #define SOFTFLOAT_TYPES_H =20 -/* This 'flag' type must be able to hold at least 0 and 1. It should - * probably be replaced with 'bool' but the uses would need to be audited - * to check that they weren't accidentally relying on it being a larger ty= pe. - */ -typedef uint8_t flag; - /* * Software IEC/IEEE floating-point types. */ @@ -169,12 +163,12 @@ typedef struct float_status { uint8_t float_exception_flags; signed char floatx80_rounding_precision; /* should denormalised results go to zero and set the inexact flag? */ - flag flush_to_zero; + bool flush_to_zero; /* should denormalised inputs go to zero and set the input_denormal fl= ag? */ - flag flush_inputs_to_zero; - flag default_nan_mode; + bool flush_inputs_to_zero; + bool default_nan_mode; /* not always used -- see snan_bit_is_one() in softfloat-specialize.h = */ - flag snan_bit_is_one; + bool snan_bit_is_one; } float_status; =20 #endif /* SOFTFLOAT_TYPES_H */ diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index ecb8ba0114..3f588da7c7 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -440,7 +440,7 @@ static inline float32 float32_set_sign(float32 a, int s= ign) | significand. *-------------------------------------------------------------------------= ---*/ =20 -static inline float32 packFloat32(flag zSign, int zExp, uint32_t zSig) +static inline float32 packFloat32(bool zSign, int zExp, uint32_t zSig) { return make_float32( (((uint32_t)zSign) << 31) + (((uint32_t)zExp) << 23) + zSig); @@ -722,7 +722,7 @@ static inline int32_t extractFloatx80Exp(floatx80 a) | `a'. *-------------------------------------------------------------------------= ---*/ =20 -static inline flag extractFloatx80Sign(floatx80 a) +static inline bool extractFloatx80Sign(floatx80 a) { return a.high >> 15; } @@ -732,7 +732,7 @@ static inline flag extractFloatx80Sign(floatx80 a) | extended double-precision floating-point value, returning the result. *-------------------------------------------------------------------------= ---*/ =20 -static inline floatx80 packFloatx80(flag zSign, int32_t zExp, uint64_t zSi= g) +static inline floatx80 packFloatx80(bool zSign, int32_t zExp, uint64_t zSi= g) { floatx80 z; =20 @@ -783,7 +783,7 @@ floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b, f= loat_status *status); | Floating-Point Arithmetic. *-------------------------------------------------------------------------= ---*/ =20 -floatx80 roundAndPackFloatx80(int8_t roundingPrecision, flag zSign, +floatx80 roundAndPackFloatx80(int8_t roundingPrecision, bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1, float_status *status); =20 @@ -797,7 +797,7 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecision,= flag zSign, *-------------------------------------------------------------------------= ---*/ =20 floatx80 normalizeRoundAndPackFloatx80(int8_t roundingPrecision, - flag zSign, int32_t zExp, + bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1, float_status *status); =20 diff --git a/fpu/softfloat-specialize.inc.c b/fpu/softfloat-specialize.inc.c index 5ab2fa1941..025ee4f991 100644 --- a/fpu/softfloat-specialize.inc.c +++ b/fpu/softfloat-specialize.inc.c @@ -93,7 +93,7 @@ this code that are retained. * 2008 revision and backward compatibility with their original choice. * Thus for MIPS we must make the choice at runtime. */ -static inline flag snan_bit_is_one(float_status *status) +static inline bool snan_bit_is_one(float_status *status) { #if defined(TARGET_MIPS) return status->snan_bit_is_one; @@ -114,7 +114,7 @@ static bool parts_is_snan_frac(uint64_t frac, float_sta= tus *status) #ifdef NO_SIGNALING_NANS return false; #else - flag msb =3D extract64(frac, DECOMPOSED_BINARY_POINT - 1, 1); + bool msb =3D extract64(frac, DECOMPOSED_BINARY_POINT - 1, 1); return msb =3D=3D snan_bit_is_one(status); #endif } @@ -236,7 +236,7 @@ void float_raise(uint8_t flags, float_status *status) | Internal canonical NaN format. *-------------------------------------------------------------------------= ---*/ typedef struct { - flag sign; + bool sign; uint64_t high, low; } commonNaNT; =20 @@ -374,7 +374,7 @@ static float32 commonNaNToFloat32(commonNaNT a, float_s= tatus *status) *-------------------------------------------------------------------------= ---*/ =20 static int pickNaN(FloatClass a_cls, FloatClass b_cls, - flag aIsLargerSignificand) + bool aIsLargerSignificand) { #if defined(TARGET_ARM) || defined(TARGET_MIPS) || defined(TARGET_HPPA) /* ARM mandated NaN propagation rules (see FPProcessNaNs()), take @@ -584,7 +584,7 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass b= _cls, FloatClass c_cls, =20 static float32 propagateFloat32NaN(float32 a, float32 b, float_status *sta= tus) { - flag aIsLargerSignificand; + bool aIsLargerSignificand; uint32_t av, bv; FloatClass a_cls, b_cls; =20 @@ -722,7 +722,7 @@ static float64 commonNaNToFloat64(commonNaNT a, float_s= tatus *status) =20 static float64 propagateFloat64NaN(float64 a, float64 b, float_status *sta= tus) { - flag aIsLargerSignificand; + bool aIsLargerSignificand; uint64_t av, bv; FloatClass a_cls, b_cls; =20 @@ -890,7 +890,7 @@ static floatx80 commonNaNToFloatx80(commonNaNT a, float= _status *status) =20 floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b, float_status *status) { - flag aIsLargerSignificand; + bool aIsLargerSignificand; FloatClass a_cls, b_cls; =20 /* This is not complete, but is good enough for pickNaN. */ @@ -1038,7 +1038,7 @@ static float128 commonNaNToFloat128(commonNaNT a, flo= at_status *status) static float128 propagateFloat128NaN(float128 a, float128 b, float_status *status) { - flag aIsLargerSignificand; + bool aIsLargerSignificand; FloatClass a_cls, b_cls; =20 /* This is not complete, but is good enough for pickNaN. */ diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 5fb4ef75bb..b741cf5bc3 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -423,7 +423,7 @@ static inline int extractFloat32Exp(float32 a) | Returns the sign bit of the single-precision floating-point value `a'. *-------------------------------------------------------------------------= ---*/ =20 -static inline flag extractFloat32Sign(float32 a) +static inline bool extractFloat32Sign(float32 a) { return float32_val(a) >> 31; } @@ -450,7 +450,7 @@ static inline int extractFloat64Exp(float64 a) | Returns the sign bit of the double-precision floating-point value `a'. *-------------------------------------------------------------------------= ---*/ =20 -static inline flag extractFloat64Sign(float64 a) +static inline bool extractFloat64Sign(float64 a) { return float64_val(a) >> 63; } @@ -3328,10 +3328,11 @@ float64 float64_squash_input_denormal(float64 a, fl= oat_status *status) | positive or negative integer is returned. *-------------------------------------------------------------------------= ---*/ =20 -static int32_t roundAndPackInt32(flag zSign, uint64_t absZ, float_status *= status) +static int32_t roundAndPackInt32(bool zSign, uint64_t absZ, + float_status *status) { int8_t roundingMode; - flag roundNearestEven; + bool roundNearestEven; int8_t roundIncrement, roundBits; int32_t z; =20 @@ -3385,11 +3386,11 @@ static int32_t roundAndPackInt32(flag zSign, uint64= _t absZ, float_status *status | returned. *-------------------------------------------------------------------------= ---*/ =20 -static int64_t roundAndPackInt64(flag zSign, uint64_t absZ0, uint64_t absZ= 1, +static int64_t roundAndPackInt64(bool zSign, uint64_t absZ0, uint64_t absZ= 1, float_status *status) { int8_t roundingMode; - flag roundNearestEven, increment; + bool roundNearestEven, increment; int64_t z; =20 roundingMode =3D status->float_rounding_mode; @@ -3443,11 +3444,11 @@ static int64_t roundAndPackInt64(flag zSign, uint64= _t absZ0, uint64_t absZ1, | exception is raised and the largest unsigned integer is returned. *-------------------------------------------------------------------------= ---*/ =20 -static int64_t roundAndPackUint64(flag zSign, uint64_t absZ0, +static int64_t roundAndPackUint64(bool zSign, uint64_t absZ0, uint64_t absZ1, float_status *status) { int8_t roundingMode; - flag roundNearestEven, increment; + bool roundNearestEven, increment; =20 roundingMode =3D status->float_rounding_mode; roundNearestEven =3D (roundingMode =3D=3D float_round_nearest_even); @@ -3531,13 +3532,13 @@ static void | Binary Floating-Point Arithmetic. *-------------------------------------------------------------------------= ---*/ =20 -static float32 roundAndPackFloat32(flag zSign, int zExp, uint32_t zSig, +static float32 roundAndPackFloat32(bool zSign, int zExp, uint32_t zSig, float_status *status) { int8_t roundingMode; - flag roundNearestEven; + bool roundNearestEven; int8_t roundIncrement, roundBits; - flag isTiny; + bool isTiny; =20 roundingMode =3D status->float_rounding_mode; roundNearestEven =3D ( roundingMode =3D=3D float_round_nearest_even ); @@ -3618,7 +3619,7 @@ static float32 roundAndPackFloat32(flag zSign, int zE= xp, uint32_t zSig, *-------------------------------------------------------------------------= ---*/ =20 static float32 - normalizeRoundAndPackFloat32(flag zSign, int zExp, uint32_t zSig, + normalizeRoundAndPackFloat32(bool zSign, int zExp, uint32_t zSig, float_status *status) { int8_t shiftCount; @@ -3658,7 +3659,7 @@ static void | significand. *-------------------------------------------------------------------------= ---*/ =20 -static inline float64 packFloat64(flag zSign, int zExp, uint64_t zSig) +static inline float64 packFloat64(bool zSign, int zExp, uint64_t zSig) { =20 return make_float64( @@ -3688,13 +3689,13 @@ static inline float64 packFloat64(flag zSign, int z= Exp, uint64_t zSig) | Binary Floating-Point Arithmetic. *-------------------------------------------------------------------------= ---*/ =20 -static float64 roundAndPackFloat64(flag zSign, int zExp, uint64_t zSig, +static float64 roundAndPackFloat64(bool zSign, int zExp, uint64_t zSig, float_status *status) { int8_t roundingMode; - flag roundNearestEven; + bool roundNearestEven; int roundIncrement, roundBits; - flag isTiny; + bool isTiny; =20 roundingMode =3D status->float_rounding_mode; roundNearestEven =3D ( roundingMode =3D=3D float_round_nearest_even ); @@ -3774,7 +3775,7 @@ static float64 roundAndPackFloat64(flag zSign, int zE= xp, uint64_t zSig, *-------------------------------------------------------------------------= ---*/ =20 static float64 - normalizeRoundAndPackFloat64(flag zSign, int zExp, uint64_t zSig, + normalizeRoundAndPackFloat64(bool zSign, int zExp, uint64_t zSig, float_status *status) { int8_t shiftCount; @@ -3826,12 +3827,12 @@ void normalizeFloatx80Subnormal(uint64_t aSig, int3= 2_t *zExpPtr, | Floating-Point Arithmetic. *-------------------------------------------------------------------------= ---*/ =20 -floatx80 roundAndPackFloatx80(int8_t roundingPrecision, flag zSign, +floatx80 roundAndPackFloatx80(int8_t roundingPrecision, bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1, float_status *status) { int8_t roundingMode; - flag roundNearestEven, increment, isTiny; + bool roundNearestEven, increment, isTiny; int64_t roundIncrement, roundMask, roundBits; =20 roundingMode =3D status->float_rounding_mode; @@ -4025,7 +4026,7 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecisio= n, flag zSign, *-------------------------------------------------------------------------= ---*/ =20 floatx80 normalizeRoundAndPackFloatx80(int8_t roundingPrecision, - flag zSign, int32_t zExp, + bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1, float_status *status) { @@ -4084,11 +4085,9 @@ static inline int32_t extractFloat128Exp( float128 a= ) | Returns the sign bit of the quadruple-precision floating-point value `a'. *-------------------------------------------------------------------------= ---*/ =20 -static inline flag extractFloat128Sign( float128 a ) +static inline bool extractFloat128Sign(float128 a) { - - return a.high>>63; - + return a.high >> 63; } =20 /*------------------------------------------------------------------------= ---- @@ -4146,14 +4145,13 @@ static void *-------------------------------------------------------------------------= ---*/ =20 static inline float128 - packFloat128( flag zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1 ) +packFloat128(bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1) { float128 z; =20 z.low =3D zSig1; - z.high =3D ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<48 ) = + zSig0; + z.high =3D ((uint64_t)zSign << 63) + ((uint64_t)zExp << 48) + zSig0; return z; - } =20 /*------------------------------------------------------------------------= ---- @@ -4177,12 +4175,12 @@ static inline float128 | overflow follows the IEC/IEEE Standard for Binary Floating-Point Arithme= tic. *-------------------------------------------------------------------------= ---*/ =20 -static float128 roundAndPackFloat128(flag zSign, int32_t zExp, +static float128 roundAndPackFloat128(bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1, uint64_t zSig2, float_status *status) { int8_t roundingMode; - flag roundNearestEven, increment, isTiny; + bool roundNearestEven, increment, isTiny; =20 roundingMode =3D status->float_rounding_mode; roundNearestEven =3D ( roundingMode =3D=3D float_round_nearest_even ); @@ -4302,7 +4300,7 @@ static float128 roundAndPackFloat128(flag zSign, int3= 2_t zExp, | point exponent. *-------------------------------------------------------------------------= ---*/ =20 -static float128 normalizeRoundAndPackFloat128(flag zSign, int32_t zExp, +static float128 normalizeRoundAndPackFloat128(bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSi= g1, float_status *status) { @@ -4338,7 +4336,7 @@ static float128 normalizeRoundAndPackFloat128(flag zS= ign, int32_t zExp, =20 floatx80 int32_to_floatx80(int32_t a, float_status *status) { - flag zSign; + bool zSign; uint32_t absA; int8_t shiftCount; uint64_t zSig; @@ -4360,7 +4358,7 @@ floatx80 int32_to_floatx80(int32_t a, float_status *s= tatus) =20 float128 int32_to_float128(int32_t a, float_status *status) { - flag zSign; + bool zSign; uint32_t absA; int8_t shiftCount; uint64_t zSig0; @@ -4383,7 +4381,7 @@ float128 int32_to_float128(int32_t a, float_status *s= tatus) =20 floatx80 int64_to_floatx80(int64_t a, float_status *status) { - flag zSign; + bool zSign; uint64_t absA; int8_t shiftCount; =20 @@ -4403,7 +4401,7 @@ floatx80 int64_to_floatx80(int64_t a, float_status *s= tatus) =20 float128 int64_to_float128(int64_t a, float_status *status) { - flag zSign; + bool zSign; uint64_t absA; int8_t shiftCount; int32_t zExp; @@ -4451,7 +4449,7 @@ float128 uint64_to_float128(uint64_t a, float_status = *status) =20 floatx80 float32_to_floatx80(float32 a, float_status *status) { - flag aSign; + bool aSign; int aExp; uint32_t aSig; =20 @@ -4487,7 +4485,7 @@ floatx80 float32_to_floatx80(float32 a, float_status = *status) =20 float128 float32_to_float128(float32 a, float_status *status) { - flag aSign; + bool aSign; int aExp; uint32_t aSig; =20 @@ -4518,7 +4516,7 @@ float128 float32_to_float128(float32 a, float_status = *status) =20 float32 float32_rem(float32 a, float32 b, float_status *status) { - flag aSign, zSign; + bool aSign, zSign; int aExp, bExp, expDiff; uint32_t aSig, bSig; uint32_t q; @@ -4653,7 +4651,7 @@ static const float64 float32_exp2_coefficients[15] = =3D =20 float32 float32_exp2(float32 a, float_status *status) { - flag aSign; + bool aSign; int aExp; uint32_t aSig; float64 r, x, xn; @@ -4703,7 +4701,7 @@ float32 float32_exp2(float32 a, float_status *status) *-------------------------------------------------------------------------= ---*/ float32 float32_log2(float32 a, float_status *status) { - flag aSign, zSign; + bool aSign, zSign; int aExp; uint32_t aSig, zSig, i; =20 @@ -4779,7 +4777,7 @@ int float32_eq(float32 a, float32 b, float_status *st= atus) =20 int float32_le(float32 a, float32 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint32_t av, bv; a =3D float32_squash_input_denormal(a, status); b =3D float32_squash_input_denormal(b, status); @@ -4808,7 +4806,7 @@ int float32_le(float32 a, float32 b, float_status *st= atus) =20 int float32_lt(float32 a, float32 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint32_t av, bv; a =3D float32_squash_input_denormal(a, status); b =3D float32_squash_input_denormal(b, status); @@ -4883,7 +4881,7 @@ int float32_eq_quiet(float32 a, float32 b, float_stat= us *status) =20 int float32_le_quiet(float32 a, float32 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint32_t av, bv; a =3D float32_squash_input_denormal(a, status); b =3D float32_squash_input_denormal(b, status); @@ -4915,7 +4913,7 @@ int float32_le_quiet(float32 a, float32 b, float_stat= us *status) =20 int float32_lt_quiet(float32 a, float32 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint32_t av, bv; a =3D float32_squash_input_denormal(a, status); b =3D float32_squash_input_denormal(b, status); @@ -4971,7 +4969,7 @@ int float32_unordered_quiet(float32 a, float32 b, flo= at_status *status) =20 floatx80 float64_to_floatx80(float64 a, float_status *status) { - flag aSign; + bool aSign; int aExp; uint64_t aSig; =20 @@ -5008,7 +5006,7 @@ floatx80 float64_to_floatx80(float64 a, float_status = *status) =20 float128 float64_to_float128(float64 a, float_status *status) { - flag aSign; + bool aSign; int aExp; uint64_t aSig, zSig0, zSig1; =20 @@ -5041,7 +5039,7 @@ float128 float64_to_float128(float64 a, float_status = *status) =20 float64 float64_rem(float64 a, float64 b, float_status *status) { - flag aSign, zSign; + bool aSign, zSign; int aExp, bExp, expDiff; uint64_t aSig, bSig; uint64_t q, alternateASig; @@ -5128,7 +5126,7 @@ float64 float64_rem(float64 a, float64 b, float_statu= s *status) *-------------------------------------------------------------------------= ---*/ float64 float64_log2(float64 a, float_status *status) { - flag aSign, zSign; + bool aSign, zSign; int aExp; uint64_t aSig, aSig0, aSig1, zSig, i; a =3D float64_squash_input_denormal(a, status); @@ -5204,7 +5202,7 @@ int float64_eq(float64 a, float64 b, float_status *st= atus) =20 int float64_le(float64 a, float64 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint64_t av, bv; a =3D float64_squash_input_denormal(a, status); b =3D float64_squash_input_denormal(b, status); @@ -5233,7 +5231,7 @@ int float64_le(float64 a, float64 b, float_status *st= atus) =20 int float64_lt(float64 a, float64 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint64_t av, bv; =20 a =3D float64_squash_input_denormal(a, status); @@ -5311,7 +5309,7 @@ int float64_eq_quiet(float64 a, float64 b, float_stat= us *status) =20 int float64_le_quiet(float64 a, float64 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint64_t av, bv; a =3D float64_squash_input_denormal(a, status); b =3D float64_squash_input_denormal(b, status); @@ -5343,7 +5341,7 @@ int float64_le_quiet(float64 a, float64 b, float_stat= us *status) =20 int float64_lt_quiet(float64 a, float64 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint64_t av, bv; a =3D float64_squash_input_denormal(a, status); b =3D float64_squash_input_denormal(b, status); @@ -5402,7 +5400,7 @@ int float64_unordered_quiet(float64 a, float64 b, flo= at_status *status) =20 int32_t floatx80_to_int32(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig; =20 @@ -5433,7 +5431,7 @@ int32_t floatx80_to_int32(floatx80 a, float_status *s= tatus) =20 int32_t floatx80_to_int32_round_to_zero(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig, savedASig; int32_t z; @@ -5484,7 +5482,7 @@ int32_t floatx80_to_int32_round_to_zero(floatx80 a, f= loat_status *status) =20 int64_t floatx80_to_int64(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig, aSigExtra; =20 @@ -5525,7 +5523,7 @@ int64_t floatx80_to_int64(floatx80 a, float_status *s= tatus) =20 int64_t floatx80_to_int64_round_to_zero(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig; int64_t z; @@ -5572,7 +5570,7 @@ int64_t floatx80_to_int64_round_to_zero(floatx80 a, f= loat_status *status) =20 float32 floatx80_to_float32(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -5606,7 +5604,7 @@ float32 floatx80_to_float32(floatx80 a, float_status = *status) =20 float64 floatx80_to_float64(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig, zSig; =20 @@ -5640,7 +5638,7 @@ float64 floatx80_to_float64(floatx80 a, float_status = *status) =20 float128 floatx80_to_float128(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int aExp; uint64_t aSig, zSig0, zSig1; =20 @@ -5686,7 +5684,7 @@ floatx80 floatx80_round(floatx80 a, float_status *sta= tus) =20 floatx80 floatx80_round_to_int(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t lastBitMask, roundBitsMask; floatx80 z; @@ -5783,7 +5781,7 @@ floatx80 floatx80_round_to_int(floatx80 a, float_stat= us *status) | Floating-Point Arithmetic. *-------------------------------------------------------------------------= ---*/ =20 -static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b, flag zSign, +static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b, bool zSign, float_status *status) { int32_t aExp, bExp, zExp; @@ -5863,7 +5861,7 @@ static floatx80 addFloatx80Sigs(floatx80 a, floatx80 = b, flag zSign, | Standard for Binary Floating-Point Arithmetic. *-------------------------------------------------------------------------= ---*/ =20 -static floatx80 subFloatx80Sigs(floatx80 a, floatx80 b, flag zSign, +static floatx80 subFloatx80Sigs(floatx80 a, floatx80 b, bool zSign, float_status *status) { int32_t aExp, bExp, zExp; @@ -5932,7 +5930,7 @@ static floatx80 subFloatx80Sigs(floatx80 a, floatx80 = b, flag zSign, =20 floatx80 floatx80_add(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) { float_raise(float_flag_invalid, status); @@ -5957,7 +5955,7 @@ floatx80 floatx80_add(floatx80 a, floatx80 b, float_s= tatus *status) =20 floatx80 floatx80_sub(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) { float_raise(float_flag_invalid, status); @@ -5982,7 +5980,7 @@ floatx80 floatx80_sub(floatx80 a, floatx80 b, float_s= tatus *status) =20 floatx80 floatx80_mul(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign, zSign; + bool aSign, bSign, zSign; int32_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig0, zSig1; =20 @@ -6044,7 +6042,7 @@ floatx80 floatx80_mul(floatx80 a, floatx80 b, float_s= tatus *status) =20 floatx80 floatx80_div(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign, zSign; + bool aSign, bSign, zSign; int32_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig0, zSig1; uint64_t rem0, rem1, rem2, term0, term1, term2; @@ -6131,7 +6129,7 @@ floatx80 floatx80_div(floatx80 a, floatx80 b, float_s= tatus *status) =20 floatx80 floatx80_rem(floatx80 a, floatx80 b, float_status *status) { - flag aSign, zSign; + bool aSign, zSign; int32_t aExp, bExp, expDiff; uint64_t aSig0, aSig1, bSig; uint64_t q, term0, term1, alternateASig0, alternateASig1; @@ -6230,7 +6228,7 @@ floatx80 floatx80_rem(floatx80 a, floatx80 b, float_s= tatus *status) =20 floatx80 floatx80_sqrt(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, zExp; uint64_t aSig0, aSig1, zSig0, zSig1, doubleZSig0; uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; @@ -6331,7 +6329,7 @@ int floatx80_eq(floatx80 a, floatx80 b, float_status = *status) =20 int floatx80_le(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b) || (extractFloatx80Exp(a) =3D=3D 0x7FFF @@ -6365,7 +6363,7 @@ int floatx80_le(floatx80 a, floatx80 b, float_status = *status) =20 int floatx80_lt(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b) || (extractFloatx80Exp(a) =3D=3D 0x7FFF @@ -6453,7 +6451,7 @@ int floatx80_eq_quiet(floatx80 a, floatx80 b, float_s= tatus *status) =20 int floatx80_le_quiet(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) { float_raise(float_flag_invalid, status); @@ -6493,7 +6491,7 @@ int floatx80_le_quiet(floatx80 a, floatx80 b, float_s= tatus *status) =20 int floatx80_lt_quiet(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) { float_raise(float_flag_invalid, status); @@ -6562,7 +6560,7 @@ int floatx80_unordered_quiet(floatx80 a, floatx80 b, = float_status *status) =20 int32_t float128_to_int32(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig0, aSig1; =20 @@ -6591,7 +6589,7 @@ int32_t float128_to_int32(float128 a, float_status *s= tatus) =20 int32_t float128_to_int32_round_to_zero(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig0, aSig1, savedASig; int32_t z; @@ -6641,7 +6639,7 @@ int32_t float128_to_int32_round_to_zero(float128 a, f= loat_status *status) =20 int64_t float128_to_int64(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig0, aSig1; =20 @@ -6684,7 +6682,7 @@ int64_t float128_to_int64(float128 a, float_status *s= tatus) =20 int64_t float128_to_int64_round_to_zero(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig0, aSig1; int64_t z; @@ -6749,7 +6747,7 @@ int64_t float128_to_int64_round_to_zero(float128 a, f= loat_status *status) =20 uint64_t float128_to_uint64(float128 a, float_status *status) { - flag aSign; + bool aSign; int aExp; int shiftCount; uint64_t aSig0, aSig1; @@ -6860,7 +6858,7 @@ uint32_t float128_to_uint32(float128 a, float_status = *status) =20 float32 float128_to_float32(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig0, aSig1; uint32_t zSig; @@ -6895,7 +6893,7 @@ float32 float128_to_float32(float128 a, float_status = *status) =20 float64 float128_to_float64(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig0, aSig1; =20 @@ -6928,7 +6926,7 @@ float64 float128_to_float64(float128 a, float_status = *status) =20 floatx80 float128_to_floatx80(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig0, aSig1; =20 @@ -6966,7 +6964,7 @@ floatx80 float128_to_floatx80(float128 a, float_statu= s *status) =20 float128 float128_round_to_int(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t lastBitMask, roundBitsMask; float128 z; @@ -7121,7 +7119,7 @@ float128 float128_round_to_int(float128 a, float_stat= us *status) | Floating-Point Arithmetic. *-------------------------------------------------------------------------= ---*/ =20 -static float128 addFloat128Sigs(float128 a, float128 b, flag zSign, +static float128 addFloat128Sigs(float128 a, float128 b, bool zSign, float_status *status) { int32_t aExp, bExp, zExp; @@ -7212,7 +7210,7 @@ static float128 addFloat128Sigs(float128 a, float128 = b, flag zSign, | Standard for Binary Floating-Point Arithmetic. *-------------------------------------------------------------------------= ---*/ =20 -static float128 subFloat128Sigs(float128 a, float128 b, flag zSign, +static float128 subFloat128Sigs(float128 a, float128 b, bool zSign, float_status *status) { int32_t aExp, bExp, zExp; @@ -7300,7 +7298,7 @@ static float128 subFloat128Sigs(float128 a, float128 = b, flag zSign, =20 float128 float128_add(float128 a, float128 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 aSign =3D extractFloat128Sign( a ); bSign =3D extractFloat128Sign( b ); @@ -7321,7 +7319,7 @@ float128 float128_add(float128 a, float128 b, float_s= tatus *status) =20 float128 float128_sub(float128 a, float128 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 aSign =3D extractFloat128Sign( a ); bSign =3D extractFloat128Sign( b ); @@ -7342,7 +7340,7 @@ float128 float128_sub(float128 a, float128 b, float_s= tatus *status) =20 float128 float128_mul(float128 a, float128 b, float_status *status) { - flag aSign, bSign, zSign; + bool aSign, bSign, zSign; int32_t aExp, bExp, zExp; uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3; =20 @@ -7405,7 +7403,7 @@ float128 float128_mul(float128 a, float128 b, float_s= tatus *status) =20 float128 float128_div(float128 a, float128 b, float_status *status) { - flag aSign, bSign, zSign; + bool aSign, bSign, zSign; int32_t aExp, bExp, zExp; uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; @@ -7492,7 +7490,7 @@ float128 float128_div(float128 a, float128 b, float_s= tatus *status) =20 float128 float128_rem(float128 a, float128 b, float_status *status) { - flag aSign, zSign; + bool aSign, zSign; int32_t aExp, bExp, expDiff; uint64_t aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2; uint64_t allZero, alternateASig0, alternateASig1, sigMean1; @@ -7599,7 +7597,7 @@ float128 float128_rem(float128 a, float128 b, float_s= tatus *status) =20 float128 float128_sqrt(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, zExp; uint64_t aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0; uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; @@ -7695,7 +7693,7 @@ int float128_eq(float128 a, float128 b, float_status = *status) =20 int float128_le(float128 a, float128 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 if ( ( ( extractFloat128Exp( a ) =3D=3D 0x7FFF ) && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )= ) @@ -7728,7 +7726,7 @@ int float128_le(float128 a, float128 b, float_status = *status) =20 int float128_lt(float128 a, float128 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 if ( ( ( extractFloat128Exp( a ) =3D=3D 0x7FFF ) && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )= ) @@ -7811,7 +7809,7 @@ int float128_eq_quiet(float128 a, float128 b, float_s= tatus *status) =20 int float128_le_quiet(float128 a, float128 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 if ( ( ( extractFloat128Exp( a ) =3D=3D 0x7FFF ) && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )= ) @@ -7847,7 +7845,7 @@ int float128_le_quiet(float128 a, float128 b, float_s= tatus *status) =20 int float128_lt_quiet(float128 a, float128 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 if ( ( ( extractFloat128Exp( a ) =3D=3D 0x7FFF ) && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )= ) @@ -7900,7 +7898,7 @@ int float128_unordered_quiet(float128 a, float128 b, = float_status *status) static inline int floatx80_compare_internal(floatx80 a, floatx80 b, int is_quiet, float_status *st= atus) { - flag aSign, bSign; + bool aSign, bSign; =20 if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) { float_raise(float_flag_invalid, status); @@ -7957,7 +7955,7 @@ int floatx80_compare_quiet(floatx80 a, floatx80 b, fl= oat_status *status) static inline int float128_compare_internal(float128 a, float128 b, int is_quiet, float_status *st= atus) { - flag aSign, bSign; + bool aSign, bSign; =20 if (( ( extractFloat128Exp( a ) =3D=3D 0x7fff ) && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) ) || @@ -8000,7 +7998,7 @@ int float128_compare_quiet(float128 a, float128 b, fl= oat_status *status) =20 floatx80 floatx80_scalbn(floatx80 a, int n, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -8039,7 +8037,7 @@ floatx80 floatx80_scalbn(floatx80 a, int n, float_sta= tus *status) =20 float128 float128_scalbn(float128 a, int n, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig0, aSig1; =20 diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c index 0da254d402..e590db6637 100644 --- a/target/arm/sve_helper.c +++ b/target/arm/sve_helper.c @@ -3201,7 +3201,7 @@ void HELPER(NAME)(void *vd, void *vn, void *vg, void = *status, uint32_t desc) \ */ static inline float32 sve_f16_to_f32(float16 f, float_status *fpst) { - flag save =3D get_flush_inputs_to_zero(fpst); + bool save =3D get_flush_inputs_to_zero(fpst); float32 ret; =20 set_flush_inputs_to_zero(false, fpst); @@ -3212,7 +3212,7 @@ static inline float32 sve_f16_to_f32(float16 f, float= _status *fpst) =20 static inline float64 sve_f16_to_f64(float16 f, float_status *fpst) { - flag save =3D get_flush_inputs_to_zero(fpst); + bool save =3D get_flush_inputs_to_zero(fpst); float64 ret; =20 set_flush_inputs_to_zero(false, fpst); @@ -3223,7 +3223,7 @@ static inline float64 sve_f16_to_f64(float16 f, float= _status *fpst) =20 static inline float16 sve_f32_to_f16(float32 f, float_status *fpst) { - flag save =3D get_flush_to_zero(fpst); + bool save =3D get_flush_to_zero(fpst); float16 ret; =20 set_flush_to_zero(false, fpst); @@ -3234,7 +3234,7 @@ static inline float16 sve_f32_to_f16(float32 f, float= _status *fpst) =20 static inline float16 sve_f64_to_f16(float64 f, float_status *fpst) { - flag save =3D get_flush_to_zero(fpst); + bool save =3D get_flush_to_zero(fpst); float16 ret; =20 set_flush_to_zero(false, fpst); diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c index 88483d4066..42625747d1 100644 --- a/target/arm/vfp_helper.c +++ b/target/arm/vfp_helper.c @@ -531,7 +531,7 @@ float32 HELPER(vfp_fcvt_f16_to_f32)(uint32_t a, void *f= pstp, uint32_t ahp_mode) * it would affect flushing input denormals. */ float_status *fpst =3D fpstp; - flag save =3D get_flush_inputs_to_zero(fpst); + bool save =3D get_flush_inputs_to_zero(fpst); set_flush_inputs_to_zero(false, fpst); float32 r =3D float16_to_float32(a, !ahp_mode, fpst); set_flush_inputs_to_zero(save, fpst); @@ -544,7 +544,7 @@ uint32_t HELPER(vfp_fcvt_f32_to_f16)(float32 a, void *f= pstp, uint32_t ahp_mode) * it would affect flushing output denormals. */ float_status *fpst =3D fpstp; - flag save =3D get_flush_to_zero(fpst); + bool save =3D get_flush_to_zero(fpst); set_flush_to_zero(false, fpst); float16 r =3D float32_to_float16(a, !ahp_mode, fpst); set_flush_to_zero(save, fpst); @@ -557,7 +557,7 @@ float64 HELPER(vfp_fcvt_f16_to_f64)(uint32_t a, void *f= pstp, uint32_t ahp_mode) * it would affect flushing input denormals. */ float_status *fpst =3D fpstp; - flag save =3D get_flush_inputs_to_zero(fpst); + bool save =3D get_flush_inputs_to_zero(fpst); set_flush_inputs_to_zero(false, fpst); float64 r =3D float16_to_float64(a, !ahp_mode, fpst); set_flush_inputs_to_zero(save, fpst); @@ -570,7 +570,7 @@ uint32_t HELPER(vfp_fcvt_f64_to_f16)(float64 a, void *f= pstp, uint32_t ahp_mode) * it would affect flushing output denormals. */ float_status *fpst =3D fpstp; - flag save =3D get_flush_to_zero(fpst); + bool save =3D get_flush_to_zero(fpst); set_flush_to_zero(false, fpst); float16 r =3D float64_to_float16(a, !ahp_mode, fpst); set_flush_to_zero(save, fpst); diff --git a/target/m68k/softfloat.c b/target/m68k/softfloat.c index 24c313ed69..9f120cf15e 100644 --- a/target/m68k/softfloat.c +++ b/target/m68k/softfloat.c @@ -49,7 +49,7 @@ static floatx80 propagateFloatx80NaNOneArg(floatx80 a, fl= oat_status *status) =20 floatx80 floatx80_mod(floatx80 a, floatx80 b, float_status *status) { - flag aSign, zSign; + bool aSign, zSign; int32_t aExp, bExp, expDiff; uint64_t aSig0, aSig1, bSig; uint64_t qTemp, term0, term1; @@ -132,7 +132,7 @@ floatx80 floatx80_mod(floatx80 a, floatx80 b, float_sta= tus *status) =20 floatx80 floatx80_getman(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -166,7 +166,7 @@ floatx80 floatx80_getman(floatx80 a, float_status *stat= us) =20 floatx80 floatx80_getexp(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -202,7 +202,7 @@ floatx80 floatx80_getexp(floatx80 a, float_status *stat= us) =20 floatx80 floatx80_scale(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; int32_t aExp, bExp, shiftCount; uint64_t aSig, bSig; =20 @@ -258,7 +258,7 @@ floatx80 floatx80_scale(floatx80 a, floatx80 b, float_s= tatus *status) =20 floatx80 floatx80_move(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -306,7 +306,7 @@ static int32_t floatx80_make_compact(int32_t aExp, uint= 64_t aSig) =20 floatx80 floatx80_lognp1(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig, fSig; =20 @@ -505,7 +505,7 @@ floatx80 floatx80_lognp1(floatx80 a, float_status *stat= us) =20 floatx80 floatx80_logn(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig, fSig; =20 @@ -673,7 +673,7 @@ floatx80 floatx80_logn(floatx80 a, float_status *status) =20 floatx80 floatx80_log10(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -730,7 +730,7 @@ floatx80 floatx80_log10(floatx80 a, float_status *statu= s) =20 floatx80 floatx80_log2(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -797,7 +797,7 @@ floatx80 floatx80_log2(floatx80 a, float_status *status) =20 floatx80 floatx80_etox(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -805,7 +805,7 @@ floatx80 floatx80_etox(floatx80 a, float_status *status) =20 int32_t compact, n, j, k, m, m1; floatx80 fp0, fp1, fp2, fp3, l2, scale, adjscale; - flag adjflag; + bool adjflag; =20 aSig =3D extractFloatx80Frac(a); aExp =3D extractFloatx80Exp(a); @@ -981,7 +981,7 @@ floatx80 floatx80_etox(floatx80 a, float_status *status) =20 floatx80 floatx80_twotox(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -1131,7 +1131,7 @@ floatx80 floatx80_twotox(floatx80 a, float_status *st= atus) =20 floatx80 floatx80_tentox(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -1286,7 +1286,7 @@ floatx80 floatx80_tentox(floatx80 a, float_status *st= atus) =20 floatx80 floatx80_tan(floatx80 a, float_status *status) { - flag aSign, xSign; + bool aSign, xSign; int32_t aExp, xExp; uint64_t aSig, xSig; =20 @@ -1295,7 +1295,7 @@ floatx80 floatx80_tan(floatx80 a, float_status *statu= s) int32_t compact, l, n, j; floatx80 fp0, fp1, fp2, fp3, fp4, fp5, invtwopi, twopi1, twopi2; float32 twoto63; - flag endflag; + bool endflag; =20 aSig =3D extractFloatx80Frac(a); aExp =3D extractFloatx80Exp(a); @@ -1344,10 +1344,10 @@ floatx80 floatx80_tan(floatx80 a, float_status *sta= tus) xExp -=3D 0x3FFF; if (xExp <=3D 28) { l =3D 0; - endflag =3D 1; + endflag =3D true; } else { l =3D xExp - 27; - endflag =3D 0; + endflag =3D false; } invtwopi =3D packFloatx80(0, 0x3FFE - l, UINT64_C(0xA2F9836E4E44152A)); /* INVT= WOPI */ @@ -1372,7 +1372,7 @@ floatx80 floatx80_tan(floatx80 a, float_status *statu= s) fp1 =3D floatx80_sub(fp1, fp4, status); /* FP1 is a :=3D r - p= */ fp0 =3D floatx80_add(fp0, fp1, status); /* FP0 is R :=3D A+a */ =20 - if (endflag > 0) { + if (endflag) { n =3D floatx80_to_int32(fp2, status); goto tancont; } @@ -1496,7 +1496,7 @@ floatx80 floatx80_tan(floatx80 a, float_status *statu= s) =20 floatx80 floatx80_sin(floatx80 a, float_status *status) { - flag aSign, xSign; + bool aSign, xSign; int32_t aExp, xExp; uint64_t aSig, xSig; =20 @@ -1505,7 +1505,7 @@ floatx80 floatx80_sin(floatx80 a, float_status *statu= s) int32_t compact, l, n, j; floatx80 fp0, fp1, fp2, fp3, fp4, fp5, x, invtwopi, twopi1, twopi2; float32 posneg1, twoto63; - flag endflag; + bool endflag; =20 aSig =3D extractFloatx80Frac(a); aExp =3D extractFloatx80Exp(a); @@ -1554,10 +1554,10 @@ floatx80 floatx80_sin(floatx80 a, float_status *sta= tus) xExp -=3D 0x3FFF; if (xExp <=3D 28) { l =3D 0; - endflag =3D 1; + endflag =3D true; } else { l =3D xExp - 27; - endflag =3D 0; + endflag =3D false; } invtwopi =3D packFloatx80(0, 0x3FFE - l, UINT64_C(0xA2F9836E4E44152A)); /* INVT= WOPI */ @@ -1582,7 +1582,7 @@ floatx80 floatx80_sin(floatx80 a, float_status *statu= s) fp1 =3D floatx80_sub(fp1, fp4, status); /* FP1 is a :=3D r - p= */ fp0 =3D floatx80_add(fp0, fp1, status); /* FP0 is R :=3D A+a */ =20 - if (endflag > 0) { + if (endflag) { n =3D floatx80_to_int32(fp2, status); goto sincont; } @@ -1735,7 +1735,7 @@ floatx80 floatx80_sin(floatx80 a, float_status *statu= s) =20 floatx80 floatx80_cos(floatx80 a, float_status *status) { - flag aSign, xSign; + bool aSign, xSign; int32_t aExp, xExp; uint64_t aSig, xSig; =20 @@ -1744,7 +1744,7 @@ floatx80 floatx80_cos(floatx80 a, float_status *statu= s) int32_t compact, l, n, j; floatx80 fp0, fp1, fp2, fp3, fp4, fp5, x, invtwopi, twopi1, twopi2; float32 posneg1, twoto63; - flag endflag; + bool endflag; =20 aSig =3D extractFloatx80Frac(a); aExp =3D extractFloatx80Exp(a); @@ -1793,10 +1793,10 @@ floatx80 floatx80_cos(floatx80 a, float_status *sta= tus) xExp -=3D 0x3FFF; if (xExp <=3D 28) { l =3D 0; - endflag =3D 1; + endflag =3D true; } else { l =3D xExp - 27; - endflag =3D 0; + endflag =3D false; } invtwopi =3D packFloatx80(0, 0x3FFE - l, UINT64_C(0xA2F9836E4E44152A)); /* INVT= WOPI */ @@ -1821,7 +1821,7 @@ floatx80 floatx80_cos(floatx80 a, float_status *statu= s) fp1 =3D floatx80_sub(fp1, fp4, status); /* FP1 is a :=3D r - p= */ fp0 =3D floatx80_add(fp0, fp1, status); /* FP0 is R :=3D A+a */ =20 - if (endflag > 0) { + if (endflag) { n =3D floatx80_to_int32(fp2, status); goto sincont; } @@ -1972,7 +1972,7 @@ floatx80 floatx80_cos(floatx80 a, float_status *statu= s) =20 floatx80 floatx80_atan(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -2169,7 +2169,7 @@ floatx80 floatx80_atan(floatx80 a, float_status *stat= us) =20 floatx80 floatx80_asin(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -2234,7 +2234,7 @@ floatx80 floatx80_asin(floatx80 a, float_status *stat= us) =20 floatx80 floatx80_acos(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -2303,7 +2303,7 @@ floatx80 floatx80_acos(floatx80 a, float_status *stat= us) =20 floatx80 floatx80_atanh(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -2368,7 +2368,7 @@ floatx80 floatx80_atanh(floatx80 a, float_status *sta= tus) =20 floatx80 floatx80_etoxm1(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -2620,7 +2620,7 @@ floatx80 floatx80_etoxm1(floatx80 a, float_status *st= atus) =20 floatx80 floatx80_tanh(floatx80 a, float_status *status) { - flag aSign, vSign; + bool aSign, vSign; int32_t aExp, vExp; uint64_t aSig, vSig; =20 @@ -2735,7 +2735,7 @@ floatx80 floatx80_tanh(floatx80 a, float_status *stat= us) =20 floatx80 floatx80_sinh(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c index 4065cfe4f7..3c7012c0b8 100644 --- a/target/mips/msa_helper.c +++ b/target/mips/msa_helper.c @@ -5508,7 +5508,7 @@ static inline int get_enabled_exceptions(const CPUMIP= SState *env, int c) return c & enable; } =20 -static inline float16 float16_from_float32(int32_t a, flag ieee, +static inline float16 float16_from_float32(int32_t a, bool ieee, float_status *status) { float16 f_val; @@ -5527,7 +5527,7 @@ static inline float32 float32_from_float64(int64_t a,= float_status *status) return a < 0 ? (f_val | (1 << 31)) : f_val; } =20 -static inline float32 float32_from_float16(int16_t a, flag ieee, +static inline float32 float32_from_float16(int16_t a, bool ieee, float_status *status) { float32 f_val; @@ -6564,7 +6564,7 @@ void helper_msa_fexdo_df(CPUMIPSState *env, uint32_t = df, uint32_t wd, * IEEE and "ARM" format. The latter gains extra exponent * range by omitting the NaN/Inf encodings. */ - flag ieee =3D 1; + bool ieee =3D true; =20 MSA_FLOAT_BINOP(Lh(pwx, i), from_float32, pws->w[i], ieee, 16); MSA_FLOAT_BINOP(Rh(pwx, i), from_float32, pwt->w[i], ieee, 16); @@ -7178,7 +7178,7 @@ void helper_msa_fexupl_df(CPUMIPSState *env, uint32_t= df, uint32_t wd, * IEEE and "ARM" format. The latter gains extra exponent * range by omitting the NaN/Inf encodings. */ - flag ieee =3D 1; + bool ieee =3D true; =20 MSA_FLOAT_BINOP(pwx->w[i], from_float16, Lh(pws, i), ieee, 32); } @@ -7214,7 +7214,7 @@ void helper_msa_fexupr_df(CPUMIPSState *env, uint32_t= df, uint32_t wd, * IEEE and "ARM" format. The latter gains extra exponent * range by omitting the NaN/Inf encodings. */ - flag ieee =3D 1; + bool ieee =3D true; =20 MSA_FLOAT_BINOP(pwx->w[i], from_float16, Rh(pws, i), ieee, 32); } --=20 2.20.1