From nobody Fri Nov 14 18:03:35 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1589710690; cv=none; d=zohomail.com; s=zohoarc; b=laB12XkyZOpuPsJNGvL9G9ZXjrqOrafFUwAQsgu9FJrdNwoq1uQM9PcmK6TEhvgTXq+/pmnldVbYyCjbpykF8mPeUTRii76XtCBy10dCy7qH/UAcLSURBgUVRPxSUMa6IdLk0NuVkbLFnv1BIskU2UhHdYrAofBqusJ2nFSzUr4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589710690; h=Cc:Date:From:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:Sender:Subject:To; bh=Oe1L9PV42DK3uH7xHqAhoVnIdyTqW10vMK4wnjp0Qxc=; b=TA2t5m10hNmYmEdthrDlu5NlMRmie1GPKWLwpopSEw3uPiR590T0FJWqmGtipneoma03VIQAnscdjsgLkcYgZoGEstK/pxCvf+o6o4WVlxEYFJTk6P1eZBHS+/6H20PzxXK2V6DuMzzTY3ydB+Hv729M9MeLxr5pkMmdYEUe5ko= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589710690318699.4574625923968; Sun, 17 May 2020 03:18:10 -0700 (PDT) Received: from localhost ([::1]:49852 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jaGMz-0000kt-2J for importer@patchew.org; Sun, 17 May 2020 06:18:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41254) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jaGKY-0007xV-03 for qemu-devel@nongnu.org; Sun, 17 May 2020 06:15:38 -0400 Received: from mail.netbsd.org ([2001:470:a085:999::25]:57685) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jaGKX-0006xF-7H for qemu-devel@nongnu.org; Sun, 17 May 2020 06:15:37 -0400 Received: by mail.netbsd.org (Postfix, from userid 1220) id D044284C8B; Sun, 17 May 2020 10:15:35 +0000 (UTC) From: Nick Hudson To: qemu-devel@nongnu.org Subject: [PATCH] Provide a NetBSD specific aarch64 cpu_signal_handler Date: Sun, 17 May 2020 11:15:29 +0100 Message-Id: <20200517101529.5367-1-skrll@netbsd.org> X-Mailer: git-send-email 2.17.1 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:470:a085:999::25; envelope-from=skrll@netbsd.org; helo=mail.netbsd.org X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nick Hudson , Paolo Bonzini , Kamil Rytarowski , Riku Voipio , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Fix qemu build on NetBSD/evbarm-aarch64 by providing a NetBSD specific cpu_signal_handler. Signed-off-by: Nick Hudson Reviewed-by: Richard Henderson --- accel/tcg/user-exec.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 4be78eb9b3..dd128adc00 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -523,6 +523,31 @@ int cpu_signal_handler(int host_signum, void *pinfo, =20 #elif defined(__aarch64__) =20 +#if defined(__NetBSD__) + +#include +#include + +int cpu_signal_handler(int host_signum, void *pinfo, void *puc) +{ + ucontext_t *uc =3D puc; + siginfo_t *si =3D pinfo; + unsigned long pc; + int is_write; + uint32_t esr; + + pc =3D uc->uc_mcontext.__gregs[_REG_PC]; + esr =3D si->si_trap; + + /* siginfo_t::si_trap is the ESR value, for data aborts ESR.EC + * is 0b10010x: then bit 6 is the WnR bit + */ + is_write =3D extract32(esr, 27, 5) =3D=3D 0x12 && extract32(esr, 6, 1)= =3D=3D 1; + return handle_cpu_signal(pc, si, is_write, &uc->uc_sigmask); +} + +#else + #ifndef ESR_MAGIC /* Pre-3.16 kernel headers don't have these, so provide fallback definitio= ns */ #define ESR_MAGIC 0x45535201 @@ -585,6 +610,7 @@ int cpu_signal_handler(int host_signum, void *pinfo, vo= id *puc) } return handle_cpu_signal(pc, info, is_write, &uc->uc_sigmask); } +#endif =20 #elif defined(__s390__) =20 --=20 2.17.1