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Date: Sun, 17 May 2020 11:23:47 +0200 Message-Id: <20200517092357.1469-10-aleksandar.qemu.devel@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200517092357.1469-1-aleksandar.qemu.devel@gmail.com> References: <20200517092357.1469-1-aleksandar.qemu.devel@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::141; envelope-from=aleksandar.qemu.devel@gmail.com; helo=mail-lf1-x141.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aleksandar.rikalo@syrmia.com, Aleksandar Markovic Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @gmail.com) Content-Type: text/plain; charset="utf-8" This is just a cosmetic change to enable tools like gcov, gdb, callgrind, etc. to better display involved source code. Signed-off-by: Aleksandar Markovic --- target/mips/fpu_helper.c | 44 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 43 insertions(+), 1 deletion(-) diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c index d4c065f281..927bac24ac 100644 --- a/target/mips/fpu_helper.c +++ b/target/mips/fpu_helper.c @@ -1495,7 +1495,6 @@ uint64_t helper_float_ ## name ## _ps(CPUMIPSState *e= nv, \ update_fcr31(env, GETPC()); \ return ((uint64_t)fsth0 << 32) | fst0; \ } -FLOAT_FMA(nmsub, float_muladd_negate_result | float_muladd_negate_c) #undef FLOAT_FMA =20 uint64_t helper_float_madd_d(CPUMIPSState *env, uint64_t fst0, @@ -1619,6 +1618,49 @@ uint64_t helper_float_nmadd_ps(CPUMIPSState *env, ui= nt64_t fdt0, return ((uint64_t)fsth0 << 32) | fstl0; } =20 +uint64_t helper_float_nmsub_d(CPUMIPSState *env, uint64_t fst0, + uint64_t fst1, uint64_t fst2) +{ + fst0 =3D float64_mul(fst0, fst1, &env->active_fpu.fp_status); + fst0 =3D float64_sub(fst0, fst2, &env->active_fpu.fp_status); + fst0 =3D float64_chs(fst0); + + update_fcr31(env, GETPC()); + return fst0; +} + +uint32_t helper_float_nmsub_s(CPUMIPSState *env, uint32_t fst0, + uint32_t fst1, uint32_t fst2) +{ + fst0 =3D float32_mul(fst0, fst1, &env->active_fpu.fp_status); + fst0 =3D float32_sub(fst0, fst2, &env->active_fpu.fp_status); + fst0 =3D float32_chs(fst0); + + update_fcr31(env, GETPC()); + return fst0; +} + +uint64_t helper_float_nmsub_ps(CPUMIPSState *env, uint64_t fdt0, + uint64_t fdt1, uint64_t fdt2) +{ + uint32_t fstl0 =3D fdt0 & 0XFFFFFFFF; + uint32_t fsth0 =3D fdt0 >> 32; + uint32_t fstl1 =3D fdt1 & 0XFFFFFFFF; + uint32_t fsth1 =3D fdt1 >> 32; + uint32_t fstl2 =3D fdt2 & 0XFFFFFFFF; + uint32_t fsth2 =3D fdt2 >> 32; + + fstl0 =3D float32_mul(fstl0, fstl1, &env->active_fpu.fp_status); + fstl0 =3D float32_sub(fstl0, fstl2, &env->active_fpu.fp_status); + fstl0 =3D float32_chs(fstl0); + fsth0 =3D float32_mul(fsth0, fsth1, &env->active_fpu.fp_status); + fsth0 =3D float32_sub(fsth0, fsth2, &env->active_fpu.fp_status); + fsth0 =3D float32_chs(fsth0); + + update_fcr31(env, GETPC()); + return ((uint64_t)fsth0 << 32) | fstl0; +} + =20 #define FLOAT_FMADDSUB(name, bits, muladd_arg) \ uint ## bits ## _t helper_float_ ## name(CPUMIPSState *env, \ --=20 2.20.1