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[174.21.143.238]) by smtp.gmail.com with ESMTPSA id q21sm2485719pfg.131.2020.05.15.12.01.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 May 2020 12:01:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FdTEJwk8OCj2gJ6qdZ/T9ggcqt2MBWuYzVMhJvyQfZQ=; b=yS+tR7szv1YtRbv33TWYSDAG9Gj3FC/9Xd7OCxVB1WNu3YExPBy1bi1GGqo0SncHZw /MvQVwmTF0F9bbAKsIuN/VwaG91nmssbQkCAy+Hn2kb7CkmOUIF/3McyMIyto64PaHiL 0cK+WjOfRjslXCx2rpR1pdoQ7pOKVmjt/qlY6DJW0FjACI+dMIp1oWrw99YlrnnU0vsx VCsiqoyd30xy750kgPuxBNI276zRmB0TgNklBnJb00Lg3BcaHvzhV4Gtj+IQ8Ghz2swr 54SMIb7VzIOb0r21uma96Itw9p7/WVRHH/YIrDWSdPeAainjivHkN4YjZMome8ffhn5T DatA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FdTEJwk8OCj2gJ6qdZ/T9ggcqt2MBWuYzVMhJvyQfZQ=; b=lLabvCmUHxx0N5RobIfUx5jfQHUwBobVSc5WBXlKcn0Fgt+oHa5btvvUzI2HrsBNWq hiXUuwUSe5GyaxbaVsM8ZbgFm1CT/hBAtCqd3udM1xbdhp3uc1trKyCPB/2og20OninL D1Puht0pXUDpTK6m/gSOPwnf2h1gB7n2b19HuSarNKjZzDuwTI4dwaRpqVGIc3qqLCAL LLwTIgVEuSnuU0P/NDlmzNAZo9SkEA5V+CmmNd+I9tLKaDl6oMYFGUM4G175D3ESK1Oq X+Rrw+yEPiSF0aWoCUDapKLk2N73z2Vo6kU2SCuzq2nnkCh3y9xKdZASPCSQgKlHaqGN 6Mng== X-Gm-Message-State: AOAM531YKtG/fwV3DlheqKxEMBSdE2WaaB5X7iQs05kfmcl1FImN+18w IwkD05dEg07fealUu1quQyZ7OpN2qUY= X-Google-Smtp-Source: ABdhPJxKCq+j3LEbs47QzAdQBQsRfnxa5RI8Z52n3e6qcsbhcH9nE2WN60+UHkhVWtzVIgeDCfvQ6A== X-Received: by 2002:a63:d556:: with SMTP id v22mr4604310pgi.263.1589569316901; Fri, 15 May 2020 12:01:56 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 01/10] softfloat: Use post test for floatN_mul Date: Fri, 15 May 2020 12:01:44 -0700 Message-Id: <20200515190153.6017-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200515190153.6017-1-richard.henderson@linaro.org> References: <20200515190153.6017-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::443; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x443.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" The existing f{32,64}_addsub_post test, which checks for zero inputs, is identical to f{32,64}_mul_fast_test. Which means we can eliminate the fast_test/fast_op hooks in favor of reusing the same post hook. This means we have one fewer test along the fast path for multiply. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Tested-by: Alex Benn=C3=A9e --- fpu/softfloat.c | 65 +++++++++++-------------------------------------- 1 file changed, 14 insertions(+), 51 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index a362bf89ca..5fb4ef75bb 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -339,12 +339,10 @@ static inline bool f64_is_inf(union_float64 a) return float64_is_infinity(a.s); } =20 -/* Note: @fast_test and @post can be NULL */ static inline float32 float32_gen2(float32 xa, float32 xb, float_status *s, hard_f32_op2_fn hard, soft_f32_op2_fn soft, - f32_check_fn pre, f32_check_fn post, - f32_check_fn fast_test, soft_f32_op2_fn fast_op) + f32_check_fn pre, f32_check_fn post) { union_float32 ua, ub, ur; =20 @@ -359,17 +357,12 @@ float32_gen2(float32 xa, float32 xb, float_status *s, if (unlikely(!pre(ua, ub))) { goto soft; } - if (fast_test && fast_test(ua, ub)) { - return fast_op(ua.s, ub.s, s); - } =20 ur.h =3D hard(ua.h, ub.h); if (unlikely(f32_is_inf(ur))) { s->float_exception_flags |=3D float_flag_overflow; - } else if (unlikely(fabsf(ur.h) <=3D FLT_MIN)) { - if (post =3D=3D NULL || post(ua, ub)) { - goto soft; - } + } else if (unlikely(fabsf(ur.h) <=3D FLT_MIN) && post(ua, ub)) { + goto soft; } return ur.s; =20 @@ -380,8 +373,7 @@ float32_gen2(float32 xa, float32 xb, float_status *s, static inline float64 float64_gen2(float64 xa, float64 xb, float_status *s, hard_f64_op2_fn hard, soft_f64_op2_fn soft, - f64_check_fn pre, f64_check_fn post, - f64_check_fn fast_test, soft_f64_op2_fn fast_op) + f64_check_fn pre, f64_check_fn post) { union_float64 ua, ub, ur; =20 @@ -396,17 +388,12 @@ float64_gen2(float64 xa, float64 xb, float_status *s, if (unlikely(!pre(ua, ub))) { goto soft; } - if (fast_test && fast_test(ua, ub)) { - return fast_op(ua.s, ub.s, s); - } =20 ur.h =3D hard(ua.h, ub.h); if (unlikely(f64_is_inf(ur))) { s->float_exception_flags |=3D float_flag_overflow; - } else if (unlikely(fabs(ur.h) <=3D DBL_MIN)) { - if (post =3D=3D NULL || post(ua, ub)) { - goto soft; - } + } else if (unlikely(fabs(ur.h) <=3D DBL_MIN) && post(ua, ub)) { + goto soft; } return ur.s; =20 @@ -1115,7 +1102,7 @@ static double hard_f64_sub(double a, double b) return a - b; } =20 -static bool f32_addsub_post(union_float32 a, union_float32 b) +static bool f32_addsubmul_post(union_float32 a, union_float32 b) { if (QEMU_HARDFLOAT_2F32_USE_FP) { return !(fpclassify(a.h) =3D=3D FP_ZERO && fpclassify(b.h) =3D=3D = FP_ZERO); @@ -1123,7 +1110,7 @@ static bool f32_addsub_post(union_float32 a, union_fl= oat32 b) return !(float32_is_zero(a.s) && float32_is_zero(b.s)); } =20 -static bool f64_addsub_post(union_float64 a, union_float64 b) +static bool f64_addsubmul_post(union_float64 a, union_float64 b) { if (QEMU_HARDFLOAT_2F64_USE_FP) { return !(fpclassify(a.h) =3D=3D FP_ZERO && fpclassify(b.h) =3D=3D = FP_ZERO); @@ -1136,14 +1123,14 @@ static float32 float32_addsub(float32 a, float32 b,= float_status *s, hard_f32_op2_fn hard, soft_f32_op2_fn soft) { return float32_gen2(a, b, s, hard, soft, - f32_is_zon2, f32_addsub_post, NULL, NULL); + f32_is_zon2, f32_addsubmul_post); } =20 static float64 float64_addsub(float64 a, float64 b, float_status *s, hard_f64_op2_fn hard, soft_f64_op2_fn soft) { return float64_gen2(a, b, s, hard, soft, - f64_is_zon2, f64_addsub_post, NULL, NULL); + f64_is_zon2, f64_addsubmul_post); } =20 float32 QEMU_FLATTEN @@ -1258,42 +1245,18 @@ static double hard_f64_mul(double a, double b) return a * b; } =20 -static bool f32_mul_fast_test(union_float32 a, union_float32 b) -{ - return float32_is_zero(a.s) || float32_is_zero(b.s); -} - -static bool f64_mul_fast_test(union_float64 a, union_float64 b) -{ - return float64_is_zero(a.s) || float64_is_zero(b.s); -} - -static float32 f32_mul_fast_op(float32 a, float32 b, float_status *s) -{ - bool signbit =3D float32_is_neg(a) ^ float32_is_neg(b); - - return float32_set_sign(float32_zero, signbit); -} - -static float64 f64_mul_fast_op(float64 a, float64 b, float_status *s) -{ - bool signbit =3D float64_is_neg(a) ^ float64_is_neg(b); - - return float64_set_sign(float64_zero, signbit); -} - float32 QEMU_FLATTEN float32_mul(float32 a, float32 b, float_status *s) { return float32_gen2(a, b, s, hard_f32_mul, soft_f32_mul, - f32_is_zon2, NULL, f32_mul_fast_test, f32_mul_fast= _op); + f32_is_zon2, f32_addsubmul_post); } =20 float64 QEMU_FLATTEN float64_mul(float64 a, float64 b, float_status *s) { return float64_gen2(a, b, s, hard_f64_mul, soft_f64_mul, - f64_is_zon2, NULL, f64_mul_fast_test, f64_mul_fast= _op); + f64_is_zon2, f64_addsubmul_post); } =20 /* @@ -1834,14 +1797,14 @@ float32 QEMU_FLATTEN float32_div(float32 a, float32 b, float_status *s) { return float32_gen2(a, b, s, hard_f32_div, soft_f32_div, - f32_div_pre, f32_div_post, NULL, NULL); + f32_div_pre, f32_div_post); } =20 float64 QEMU_FLATTEN float64_div(float64 a, float64 b, float_status *s) { return float64_gen2(a, b, s, hard_f64_div, soft_f64_div, - f64_div_pre, f64_div_post, NULL, NULL); + f64_div_pre, f64_div_post); } =20 /* --=20 2.20.1 From nobody Sun May 19 18:35:16 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[174.21.143.238]) by smtp.gmail.com with ESMTPSA id q21sm2485719pfg.131.2020.05.15.12.01.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 May 2020 12:01:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YHyPL++O+/9UgujXQhMp7lR3lO3UfELutowK/5MU6JE=; b=gEahNZA+BvLFVDLzKZkFTXDC4VB8IFAxp45q6wj/yWg4T0S+Pu5u9511uQ08Ka7vAK umKYqyogVQVwVNTLJYEdETyOkDEVp7hCy4IvG5/LSgVY3JtI463IgU9/VSmsaxIV+e9/ c/kXrQAEN1RXyTaV6swpWCvMXiQv/Qtdre/H5QYj2uL+TFVeK950CVbwuJoOtDEvQBoM BmFL7ubydq+WXakm0cnw3RmABbkneqPxo1MuYe3eHyCmIU3uloAg3jXxH3GcnHAPdz47 1vHpGCfTdzpNwcWsaAQKIdUEIYkzsS2Ii211NK8lK+NxHWtBvnpiQHaaN1/GulKiawh2 XiOQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YHyPL++O+/9UgujXQhMp7lR3lO3UfELutowK/5MU6JE=; b=HZLuPdp63D18iGXzlhV8nTY7CyjQ/5IqbbhyIqhKTTgt/Ttog+fjeZ6adPNBa9xPiI 6N9mz9uNl4Uv/n/F/mgKYLclXlsqbHkGjHbKYUOM6tuUp/0ktK2xrJB5wg1rIOcZ+Kv4 kRlXf3UHsGqV0aPqvlwaVJ0QRQ0+UjFHRhdsB+IngcVrdJAtlxBYCPQL49bUwf2mx5YN 4W02sBGnLnGANAj71uPcNzYAhf3t5UyxfJStD50xjLE325vuO50ze85dpiJHoRI8PDt8 Ui3EIzsgK3aNBAfUPJ45ojY2yDdepATQLyoU6MswR17LkamXYujclcy6NhAyZZZpbamH 77+A== X-Gm-Message-State: AOAM530yTzKK5UlpcaV7c3Dusg6B2+7c4pMm5vd8593G1aLOKH7q5mI6 tqvT7KMcXnxF1bQPYEWmT2iy+gcIplQ= X-Google-Smtp-Source: ABdhPJwIyHNbITV94XFY7eaY9tUOp1t0Mat2fEbdhwxxnK1BatvqzbhyiVp/SAsStfQ6fI4hrNYioQ== X-Received: by 2002:a17:90a:7e4:: with SMTP id m91mr4962546pjm.155.1589569318407; Fri, 15 May 2020 12:01:58 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 02/10] softfloat: Replace flag with bool Date: Fri, 15 May 2020 12:01:45 -0700 Message-Id: <20200515190153.6017-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200515190153.6017-1-richard.henderson@linaro.org> References: <20200515190153.6017-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x635.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" We have had this on the to-do list for quite some time. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- include/fpu/softfloat-helpers.h | 14 +-- include/fpu/softfloat-macros.h | 24 ++-- include/fpu/softfloat-types.h | 14 +-- include/fpu/softfloat.h | 10 +- fpu/softfloat-specialize.inc.c | 16 +-- fpu/softfloat.c | 190 ++++++++++++++++---------------- target/arm/sve_helper.c | 8 +- target/arm/vfp_helper.c | 8 +- target/m68k/softfloat.c | 70 ++++++------ target/mips/msa_helper.c | 10 +- 10 files changed, 174 insertions(+), 190 deletions(-) diff --git a/include/fpu/softfloat-helpers.h b/include/fpu/softfloat-helper= s.h index e0baf24c8f..528d7ebd9f 100644 --- a/include/fpu/softfloat-helpers.h +++ b/include/fpu/softfloat-helpers.h @@ -74,22 +74,22 @@ static inline void set_floatx80_rounding_precision(int = val, status->floatx80_rounding_precision =3D val; } =20 -static inline void set_flush_to_zero(flag val, float_status *status) +static inline void set_flush_to_zero(bool val, float_status *status) { status->flush_to_zero =3D val; } =20 -static inline void set_flush_inputs_to_zero(flag val, float_status *status) +static inline void set_flush_inputs_to_zero(bool val, float_status *status) { status->flush_inputs_to_zero =3D val; } =20 -static inline void set_default_nan_mode(flag val, float_status *status) +static inline void set_default_nan_mode(bool val, float_status *status) { status->default_nan_mode =3D val; } =20 -static inline void set_snan_bit_is_one(flag val, float_status *status) +static inline void set_snan_bit_is_one(bool val, float_status *status) { status->snan_bit_is_one =3D val; } @@ -114,17 +114,17 @@ static inline int get_floatx80_rounding_precision(flo= at_status *status) return status->floatx80_rounding_precision; } =20 -static inline flag get_flush_to_zero(float_status *status) +static inline bool get_flush_to_zero(float_status *status) { return status->flush_to_zero; } =20 -static inline flag get_flush_inputs_to_zero(float_status *status) +static inline bool get_flush_inputs_to_zero(float_status *status) { return status->flush_inputs_to_zero; } =20 -static inline flag get_default_nan_mode(float_status *status) +static inline bool get_default_nan_mode(float_status *status) { return status->default_nan_mode; } diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h index 605c4f4bc6..a35ec2893a 100644 --- a/include/fpu/softfloat-macros.h +++ b/include/fpu/softfloat-macros.h @@ -756,11 +756,9 @@ static inline uint32_t estimateSqrt32(int aExp, uint32= _t a) | Otherwise, returns 0. *-------------------------------------------------------------------------= ---*/ =20 -static inline flag eq128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t = b1 ) +static inline bool eq128(uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b= 1) { - - return ( a0 =3D=3D b0 ) && ( a1 =3D=3D b1 ); - + return a0 =3D=3D b0 && a1 =3D=3D b1; } =20 /*------------------------------------------------------------------------= ---- @@ -769,11 +767,9 @@ static inline flag eq128( uint64_t a0, uint64_t a1, ui= nt64_t b0, uint64_t b1 ) | Otherwise, returns 0. *-------------------------------------------------------------------------= ---*/ =20 -static inline flag le128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t = b1 ) +static inline bool le128(uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b= 1) { - - return ( a0 < b0 ) || ( ( a0 =3D=3D b0 ) && ( a1 <=3D b1 ) ); - + return a0 < b0 || (a0 =3D=3D b0 && a1 <=3D b1); } =20 /*------------------------------------------------------------------------= ---- @@ -782,11 +778,9 @@ static inline flag le128( uint64_t a0, uint64_t a1, ui= nt64_t b0, uint64_t b1 ) | returns 0. *-------------------------------------------------------------------------= ---*/ =20 -static inline flag lt128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t = b1 ) +static inline bool lt128(uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b= 1) { - - return ( a0 < b0 ) || ( ( a0 =3D=3D b0 ) && ( a1 < b1 ) ); - + return a0 < b0 || (a0 =3D=3D b0 && a1 < b1); } =20 /*------------------------------------------------------------------------= ---- @@ -795,11 +789,9 @@ static inline flag lt128( uint64_t a0, uint64_t a1, ui= nt64_t b0, uint64_t b1 ) | Otherwise, returns 0. *-------------------------------------------------------------------------= ---*/ =20 -static inline flag ne128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t = b1 ) +static inline bool ne128(uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b= 1) { - - return ( a0 !=3D b0 ) || ( a1 !=3D b1 ); - + return a0 !=3D b0 || a1 !=3D b1; } =20 #endif diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h index 2aae6a89b1..619b875df6 100644 --- a/include/fpu/softfloat-types.h +++ b/include/fpu/softfloat-types.h @@ -80,12 +80,6 @@ this code that are retained. #ifndef SOFTFLOAT_TYPES_H #define SOFTFLOAT_TYPES_H =20 -/* This 'flag' type must be able to hold at least 0 and 1. It should - * probably be replaced with 'bool' but the uses would need to be audited - * to check that they weren't accidentally relying on it being a larger ty= pe. - */ -typedef uint8_t flag; - /* * Software IEC/IEEE floating-point types. */ @@ -169,12 +163,12 @@ typedef struct float_status { uint8_t float_exception_flags; signed char floatx80_rounding_precision; /* should denormalised results go to zero and set the inexact flag? */ - flag flush_to_zero; + bool flush_to_zero; /* should denormalised inputs go to zero and set the input_denormal fl= ag? */ - flag flush_inputs_to_zero; - flag default_nan_mode; + bool flush_inputs_to_zero; + bool default_nan_mode; /* not always used -- see snan_bit_is_one() in softfloat-specialize.h = */ - flag snan_bit_is_one; + bool snan_bit_is_one; } float_status; =20 #endif /* SOFTFLOAT_TYPES_H */ diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index ecb8ba0114..3f588da7c7 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -440,7 +440,7 @@ static inline float32 float32_set_sign(float32 a, int s= ign) | significand. *-------------------------------------------------------------------------= ---*/ =20 -static inline float32 packFloat32(flag zSign, int zExp, uint32_t zSig) +static inline float32 packFloat32(bool zSign, int zExp, uint32_t zSig) { return make_float32( (((uint32_t)zSign) << 31) + (((uint32_t)zExp) << 23) + zSig); @@ -722,7 +722,7 @@ static inline int32_t extractFloatx80Exp(floatx80 a) | `a'. *-------------------------------------------------------------------------= ---*/ =20 -static inline flag extractFloatx80Sign(floatx80 a) +static inline bool extractFloatx80Sign(floatx80 a) { return a.high >> 15; } @@ -732,7 +732,7 @@ static inline flag extractFloatx80Sign(floatx80 a) | extended double-precision floating-point value, returning the result. *-------------------------------------------------------------------------= ---*/ =20 -static inline floatx80 packFloatx80(flag zSign, int32_t zExp, uint64_t zSi= g) +static inline floatx80 packFloatx80(bool zSign, int32_t zExp, uint64_t zSi= g) { floatx80 z; =20 @@ -783,7 +783,7 @@ floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b, f= loat_status *status); | Floating-Point Arithmetic. *-------------------------------------------------------------------------= ---*/ =20 -floatx80 roundAndPackFloatx80(int8_t roundingPrecision, flag zSign, +floatx80 roundAndPackFloatx80(int8_t roundingPrecision, bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1, float_status *status); =20 @@ -797,7 +797,7 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecision,= flag zSign, *-------------------------------------------------------------------------= ---*/ =20 floatx80 normalizeRoundAndPackFloatx80(int8_t roundingPrecision, - flag zSign, int32_t zExp, + bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1, float_status *status); =20 diff --git a/fpu/softfloat-specialize.inc.c b/fpu/softfloat-specialize.inc.c index 5ab2fa1941..025ee4f991 100644 --- a/fpu/softfloat-specialize.inc.c +++ b/fpu/softfloat-specialize.inc.c @@ -93,7 +93,7 @@ this code that are retained. * 2008 revision and backward compatibility with their original choice. * Thus for MIPS we must make the choice at runtime. */ -static inline flag snan_bit_is_one(float_status *status) +static inline bool snan_bit_is_one(float_status *status) { #if defined(TARGET_MIPS) return status->snan_bit_is_one; @@ -114,7 +114,7 @@ static bool parts_is_snan_frac(uint64_t frac, float_sta= tus *status) #ifdef NO_SIGNALING_NANS return false; #else - flag msb =3D extract64(frac, DECOMPOSED_BINARY_POINT - 1, 1); + bool msb =3D extract64(frac, DECOMPOSED_BINARY_POINT - 1, 1); return msb =3D=3D snan_bit_is_one(status); #endif } @@ -236,7 +236,7 @@ void float_raise(uint8_t flags, float_status *status) | Internal canonical NaN format. *-------------------------------------------------------------------------= ---*/ typedef struct { - flag sign; + bool sign; uint64_t high, low; } commonNaNT; =20 @@ -374,7 +374,7 @@ static float32 commonNaNToFloat32(commonNaNT a, float_s= tatus *status) *-------------------------------------------------------------------------= ---*/ =20 static int pickNaN(FloatClass a_cls, FloatClass b_cls, - flag aIsLargerSignificand) + bool aIsLargerSignificand) { #if defined(TARGET_ARM) || defined(TARGET_MIPS) || defined(TARGET_HPPA) /* ARM mandated NaN propagation rules (see FPProcessNaNs()), take @@ -584,7 +584,7 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass b= _cls, FloatClass c_cls, =20 static float32 propagateFloat32NaN(float32 a, float32 b, float_status *sta= tus) { - flag aIsLargerSignificand; + bool aIsLargerSignificand; uint32_t av, bv; FloatClass a_cls, b_cls; =20 @@ -722,7 +722,7 @@ static float64 commonNaNToFloat64(commonNaNT a, float_s= tatus *status) =20 static float64 propagateFloat64NaN(float64 a, float64 b, float_status *sta= tus) { - flag aIsLargerSignificand; + bool aIsLargerSignificand; uint64_t av, bv; FloatClass a_cls, b_cls; =20 @@ -890,7 +890,7 @@ static floatx80 commonNaNToFloatx80(commonNaNT a, float= _status *status) =20 floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b, float_status *status) { - flag aIsLargerSignificand; + bool aIsLargerSignificand; FloatClass a_cls, b_cls; =20 /* This is not complete, but is good enough for pickNaN. */ @@ -1038,7 +1038,7 @@ static float128 commonNaNToFloat128(commonNaNT a, flo= at_status *status) static float128 propagateFloat128NaN(float128 a, float128 b, float_status *status) { - flag aIsLargerSignificand; + bool aIsLargerSignificand; FloatClass a_cls, b_cls; =20 /* This is not complete, but is good enough for pickNaN. */ diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 5fb4ef75bb..b741cf5bc3 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -423,7 +423,7 @@ static inline int extractFloat32Exp(float32 a) | Returns the sign bit of the single-precision floating-point value `a'. *-------------------------------------------------------------------------= ---*/ =20 -static inline flag extractFloat32Sign(float32 a) +static inline bool extractFloat32Sign(float32 a) { return float32_val(a) >> 31; } @@ -450,7 +450,7 @@ static inline int extractFloat64Exp(float64 a) | Returns the sign bit of the double-precision floating-point value `a'. *-------------------------------------------------------------------------= ---*/ =20 -static inline flag extractFloat64Sign(float64 a) +static inline bool extractFloat64Sign(float64 a) { return float64_val(a) >> 63; } @@ -3328,10 +3328,11 @@ float64 float64_squash_input_denormal(float64 a, fl= oat_status *status) | positive or negative integer is returned. *-------------------------------------------------------------------------= ---*/ =20 -static int32_t roundAndPackInt32(flag zSign, uint64_t absZ, float_status *= status) +static int32_t roundAndPackInt32(bool zSign, uint64_t absZ, + float_status *status) { int8_t roundingMode; - flag roundNearestEven; + bool roundNearestEven; int8_t roundIncrement, roundBits; int32_t z; =20 @@ -3385,11 +3386,11 @@ static int32_t roundAndPackInt32(flag zSign, uint64= _t absZ, float_status *status | returned. *-------------------------------------------------------------------------= ---*/ =20 -static int64_t roundAndPackInt64(flag zSign, uint64_t absZ0, uint64_t absZ= 1, +static int64_t roundAndPackInt64(bool zSign, uint64_t absZ0, uint64_t absZ= 1, float_status *status) { int8_t roundingMode; - flag roundNearestEven, increment; + bool roundNearestEven, increment; int64_t z; =20 roundingMode =3D status->float_rounding_mode; @@ -3443,11 +3444,11 @@ static int64_t roundAndPackInt64(flag zSign, uint64= _t absZ0, uint64_t absZ1, | exception is raised and the largest unsigned integer is returned. *-------------------------------------------------------------------------= ---*/ =20 -static int64_t roundAndPackUint64(flag zSign, uint64_t absZ0, +static int64_t roundAndPackUint64(bool zSign, uint64_t absZ0, uint64_t absZ1, float_status *status) { int8_t roundingMode; - flag roundNearestEven, increment; + bool roundNearestEven, increment; =20 roundingMode =3D status->float_rounding_mode; roundNearestEven =3D (roundingMode =3D=3D float_round_nearest_even); @@ -3531,13 +3532,13 @@ static void | Binary Floating-Point Arithmetic. *-------------------------------------------------------------------------= ---*/ =20 -static float32 roundAndPackFloat32(flag zSign, int zExp, uint32_t zSig, +static float32 roundAndPackFloat32(bool zSign, int zExp, uint32_t zSig, float_status *status) { int8_t roundingMode; - flag roundNearestEven; + bool roundNearestEven; int8_t roundIncrement, roundBits; - flag isTiny; + bool isTiny; =20 roundingMode =3D status->float_rounding_mode; roundNearestEven =3D ( roundingMode =3D=3D float_round_nearest_even ); @@ -3618,7 +3619,7 @@ static float32 roundAndPackFloat32(flag zSign, int zE= xp, uint32_t zSig, *-------------------------------------------------------------------------= ---*/ =20 static float32 - normalizeRoundAndPackFloat32(flag zSign, int zExp, uint32_t zSig, + normalizeRoundAndPackFloat32(bool zSign, int zExp, uint32_t zSig, float_status *status) { int8_t shiftCount; @@ -3658,7 +3659,7 @@ static void | significand. *-------------------------------------------------------------------------= ---*/ =20 -static inline float64 packFloat64(flag zSign, int zExp, uint64_t zSig) +static inline float64 packFloat64(bool zSign, int zExp, uint64_t zSig) { =20 return make_float64( @@ -3688,13 +3689,13 @@ static inline float64 packFloat64(flag zSign, int z= Exp, uint64_t zSig) | Binary Floating-Point Arithmetic. *-------------------------------------------------------------------------= ---*/ =20 -static float64 roundAndPackFloat64(flag zSign, int zExp, uint64_t zSig, +static float64 roundAndPackFloat64(bool zSign, int zExp, uint64_t zSig, float_status *status) { int8_t roundingMode; - flag roundNearestEven; + bool roundNearestEven; int roundIncrement, roundBits; - flag isTiny; + bool isTiny; =20 roundingMode =3D status->float_rounding_mode; roundNearestEven =3D ( roundingMode =3D=3D float_round_nearest_even ); @@ -3774,7 +3775,7 @@ static float64 roundAndPackFloat64(flag zSign, int zE= xp, uint64_t zSig, *-------------------------------------------------------------------------= ---*/ =20 static float64 - normalizeRoundAndPackFloat64(flag zSign, int zExp, uint64_t zSig, + normalizeRoundAndPackFloat64(bool zSign, int zExp, uint64_t zSig, float_status *status) { int8_t shiftCount; @@ -3826,12 +3827,12 @@ void normalizeFloatx80Subnormal(uint64_t aSig, int3= 2_t *zExpPtr, | Floating-Point Arithmetic. *-------------------------------------------------------------------------= ---*/ =20 -floatx80 roundAndPackFloatx80(int8_t roundingPrecision, flag zSign, +floatx80 roundAndPackFloatx80(int8_t roundingPrecision, bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1, float_status *status) { int8_t roundingMode; - flag roundNearestEven, increment, isTiny; + bool roundNearestEven, increment, isTiny; int64_t roundIncrement, roundMask, roundBits; =20 roundingMode =3D status->float_rounding_mode; @@ -4025,7 +4026,7 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecisio= n, flag zSign, *-------------------------------------------------------------------------= ---*/ =20 floatx80 normalizeRoundAndPackFloatx80(int8_t roundingPrecision, - flag zSign, int32_t zExp, + bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1, float_status *status) { @@ -4084,11 +4085,9 @@ static inline int32_t extractFloat128Exp( float128 a= ) | Returns the sign bit of the quadruple-precision floating-point value `a'. *-------------------------------------------------------------------------= ---*/ =20 -static inline flag extractFloat128Sign( float128 a ) +static inline bool extractFloat128Sign(float128 a) { - - return a.high>>63; - + return a.high >> 63; } =20 /*------------------------------------------------------------------------= ---- @@ -4146,14 +4145,13 @@ static void *-------------------------------------------------------------------------= ---*/ =20 static inline float128 - packFloat128( flag zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1 ) +packFloat128(bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1) { float128 z; =20 z.low =3D zSig1; - z.high =3D ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<48 ) = + zSig0; + z.high =3D ((uint64_t)zSign << 63) + ((uint64_t)zExp << 48) + zSig0; return z; - } =20 /*------------------------------------------------------------------------= ---- @@ -4177,12 +4175,12 @@ static inline float128 | overflow follows the IEC/IEEE Standard for Binary Floating-Point Arithme= tic. *-------------------------------------------------------------------------= ---*/ =20 -static float128 roundAndPackFloat128(flag zSign, int32_t zExp, +static float128 roundAndPackFloat128(bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1, uint64_t zSig2, float_status *status) { int8_t roundingMode; - flag roundNearestEven, increment, isTiny; + bool roundNearestEven, increment, isTiny; =20 roundingMode =3D status->float_rounding_mode; roundNearestEven =3D ( roundingMode =3D=3D float_round_nearest_even ); @@ -4302,7 +4300,7 @@ static float128 roundAndPackFloat128(flag zSign, int3= 2_t zExp, | point exponent. *-------------------------------------------------------------------------= ---*/ =20 -static float128 normalizeRoundAndPackFloat128(flag zSign, int32_t zExp, +static float128 normalizeRoundAndPackFloat128(bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSi= g1, float_status *status) { @@ -4338,7 +4336,7 @@ static float128 normalizeRoundAndPackFloat128(flag zS= ign, int32_t zExp, =20 floatx80 int32_to_floatx80(int32_t a, float_status *status) { - flag zSign; + bool zSign; uint32_t absA; int8_t shiftCount; uint64_t zSig; @@ -4360,7 +4358,7 @@ floatx80 int32_to_floatx80(int32_t a, float_status *s= tatus) =20 float128 int32_to_float128(int32_t a, float_status *status) { - flag zSign; + bool zSign; uint32_t absA; int8_t shiftCount; uint64_t zSig0; @@ -4383,7 +4381,7 @@ float128 int32_to_float128(int32_t a, float_status *s= tatus) =20 floatx80 int64_to_floatx80(int64_t a, float_status *status) { - flag zSign; + bool zSign; uint64_t absA; int8_t shiftCount; =20 @@ -4403,7 +4401,7 @@ floatx80 int64_to_floatx80(int64_t a, float_status *s= tatus) =20 float128 int64_to_float128(int64_t a, float_status *status) { - flag zSign; + bool zSign; uint64_t absA; int8_t shiftCount; int32_t zExp; @@ -4451,7 +4449,7 @@ float128 uint64_to_float128(uint64_t a, float_status = *status) =20 floatx80 float32_to_floatx80(float32 a, float_status *status) { - flag aSign; + bool aSign; int aExp; uint32_t aSig; =20 @@ -4487,7 +4485,7 @@ floatx80 float32_to_floatx80(float32 a, float_status = *status) =20 float128 float32_to_float128(float32 a, float_status *status) { - flag aSign; + bool aSign; int aExp; uint32_t aSig; =20 @@ -4518,7 +4516,7 @@ float128 float32_to_float128(float32 a, float_status = *status) =20 float32 float32_rem(float32 a, float32 b, float_status *status) { - flag aSign, zSign; + bool aSign, zSign; int aExp, bExp, expDiff; uint32_t aSig, bSig; uint32_t q; @@ -4653,7 +4651,7 @@ static const float64 float32_exp2_coefficients[15] = =3D =20 float32 float32_exp2(float32 a, float_status *status) { - flag aSign; + bool aSign; int aExp; uint32_t aSig; float64 r, x, xn; @@ -4703,7 +4701,7 @@ float32 float32_exp2(float32 a, float_status *status) *-------------------------------------------------------------------------= ---*/ float32 float32_log2(float32 a, float_status *status) { - flag aSign, zSign; + bool aSign, zSign; int aExp; uint32_t aSig, zSig, i; =20 @@ -4779,7 +4777,7 @@ int float32_eq(float32 a, float32 b, float_status *st= atus) =20 int float32_le(float32 a, float32 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint32_t av, bv; a =3D float32_squash_input_denormal(a, status); b =3D float32_squash_input_denormal(b, status); @@ -4808,7 +4806,7 @@ int float32_le(float32 a, float32 b, float_status *st= atus) =20 int float32_lt(float32 a, float32 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint32_t av, bv; a =3D float32_squash_input_denormal(a, status); b =3D float32_squash_input_denormal(b, status); @@ -4883,7 +4881,7 @@ int float32_eq_quiet(float32 a, float32 b, float_stat= us *status) =20 int float32_le_quiet(float32 a, float32 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint32_t av, bv; a =3D float32_squash_input_denormal(a, status); b =3D float32_squash_input_denormal(b, status); @@ -4915,7 +4913,7 @@ int float32_le_quiet(float32 a, float32 b, float_stat= us *status) =20 int float32_lt_quiet(float32 a, float32 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint32_t av, bv; a =3D float32_squash_input_denormal(a, status); b =3D float32_squash_input_denormal(b, status); @@ -4971,7 +4969,7 @@ int float32_unordered_quiet(float32 a, float32 b, flo= at_status *status) =20 floatx80 float64_to_floatx80(float64 a, float_status *status) { - flag aSign; + bool aSign; int aExp; uint64_t aSig; =20 @@ -5008,7 +5006,7 @@ floatx80 float64_to_floatx80(float64 a, float_status = *status) =20 float128 float64_to_float128(float64 a, float_status *status) { - flag aSign; + bool aSign; int aExp; uint64_t aSig, zSig0, zSig1; =20 @@ -5041,7 +5039,7 @@ float128 float64_to_float128(float64 a, float_status = *status) =20 float64 float64_rem(float64 a, float64 b, float_status *status) { - flag aSign, zSign; + bool aSign, zSign; int aExp, bExp, expDiff; uint64_t aSig, bSig; uint64_t q, alternateASig; @@ -5128,7 +5126,7 @@ float64 float64_rem(float64 a, float64 b, float_statu= s *status) *-------------------------------------------------------------------------= ---*/ float64 float64_log2(float64 a, float_status *status) { - flag aSign, zSign; + bool aSign, zSign; int aExp; uint64_t aSig, aSig0, aSig1, zSig, i; a =3D float64_squash_input_denormal(a, status); @@ -5204,7 +5202,7 @@ int float64_eq(float64 a, float64 b, float_status *st= atus) =20 int float64_le(float64 a, float64 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint64_t av, bv; a =3D float64_squash_input_denormal(a, status); b =3D float64_squash_input_denormal(b, status); @@ -5233,7 +5231,7 @@ int float64_le(float64 a, float64 b, float_status *st= atus) =20 int float64_lt(float64 a, float64 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint64_t av, bv; =20 a =3D float64_squash_input_denormal(a, status); @@ -5311,7 +5309,7 @@ int float64_eq_quiet(float64 a, float64 b, float_stat= us *status) =20 int float64_le_quiet(float64 a, float64 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint64_t av, bv; a =3D float64_squash_input_denormal(a, status); b =3D float64_squash_input_denormal(b, status); @@ -5343,7 +5341,7 @@ int float64_le_quiet(float64 a, float64 b, float_stat= us *status) =20 int float64_lt_quiet(float64 a, float64 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint64_t av, bv; a =3D float64_squash_input_denormal(a, status); b =3D float64_squash_input_denormal(b, status); @@ -5402,7 +5400,7 @@ int float64_unordered_quiet(float64 a, float64 b, flo= at_status *status) =20 int32_t floatx80_to_int32(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig; =20 @@ -5433,7 +5431,7 @@ int32_t floatx80_to_int32(floatx80 a, float_status *s= tatus) =20 int32_t floatx80_to_int32_round_to_zero(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig, savedASig; int32_t z; @@ -5484,7 +5482,7 @@ int32_t floatx80_to_int32_round_to_zero(floatx80 a, f= loat_status *status) =20 int64_t floatx80_to_int64(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig, aSigExtra; =20 @@ -5525,7 +5523,7 @@ int64_t floatx80_to_int64(floatx80 a, float_status *s= tatus) =20 int64_t floatx80_to_int64_round_to_zero(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig; int64_t z; @@ -5572,7 +5570,7 @@ int64_t floatx80_to_int64_round_to_zero(floatx80 a, f= loat_status *status) =20 float32 floatx80_to_float32(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -5606,7 +5604,7 @@ float32 floatx80_to_float32(floatx80 a, float_status = *status) =20 float64 floatx80_to_float64(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig, zSig; =20 @@ -5640,7 +5638,7 @@ float64 floatx80_to_float64(floatx80 a, float_status = *status) =20 float128 floatx80_to_float128(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int aExp; uint64_t aSig, zSig0, zSig1; =20 @@ -5686,7 +5684,7 @@ floatx80 floatx80_round(floatx80 a, float_status *sta= tus) =20 floatx80 floatx80_round_to_int(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t lastBitMask, roundBitsMask; floatx80 z; @@ -5783,7 +5781,7 @@ floatx80 floatx80_round_to_int(floatx80 a, float_stat= us *status) | Floating-Point Arithmetic. *-------------------------------------------------------------------------= ---*/ =20 -static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b, flag zSign, +static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b, bool zSign, float_status *status) { int32_t aExp, bExp, zExp; @@ -5863,7 +5861,7 @@ static floatx80 addFloatx80Sigs(floatx80 a, floatx80 = b, flag zSign, | Standard for Binary Floating-Point Arithmetic. *-------------------------------------------------------------------------= ---*/ =20 -static floatx80 subFloatx80Sigs(floatx80 a, floatx80 b, flag zSign, +static floatx80 subFloatx80Sigs(floatx80 a, floatx80 b, bool zSign, float_status *status) { int32_t aExp, bExp, zExp; @@ -5932,7 +5930,7 @@ static floatx80 subFloatx80Sigs(floatx80 a, floatx80 = b, flag zSign, =20 floatx80 floatx80_add(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) { float_raise(float_flag_invalid, status); @@ -5957,7 +5955,7 @@ floatx80 floatx80_add(floatx80 a, floatx80 b, float_s= tatus *status) =20 floatx80 floatx80_sub(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) { float_raise(float_flag_invalid, status); @@ -5982,7 +5980,7 @@ floatx80 floatx80_sub(floatx80 a, floatx80 b, float_s= tatus *status) =20 floatx80 floatx80_mul(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign, zSign; + bool aSign, bSign, zSign; int32_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig0, zSig1; =20 @@ -6044,7 +6042,7 @@ floatx80 floatx80_mul(floatx80 a, floatx80 b, float_s= tatus *status) =20 floatx80 floatx80_div(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign, zSign; + bool aSign, bSign, zSign; int32_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig0, zSig1; uint64_t rem0, rem1, rem2, term0, term1, term2; @@ -6131,7 +6129,7 @@ floatx80 floatx80_div(floatx80 a, floatx80 b, float_s= tatus *status) =20 floatx80 floatx80_rem(floatx80 a, floatx80 b, float_status *status) { - flag aSign, zSign; + bool aSign, zSign; int32_t aExp, bExp, expDiff; uint64_t aSig0, aSig1, bSig; uint64_t q, term0, term1, alternateASig0, alternateASig1; @@ -6230,7 +6228,7 @@ floatx80 floatx80_rem(floatx80 a, floatx80 b, float_s= tatus *status) =20 floatx80 floatx80_sqrt(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, zExp; uint64_t aSig0, aSig1, zSig0, zSig1, doubleZSig0; uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; @@ -6331,7 +6329,7 @@ int floatx80_eq(floatx80 a, floatx80 b, float_status = *status) =20 int floatx80_le(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b) || (extractFloatx80Exp(a) =3D=3D 0x7FFF @@ -6365,7 +6363,7 @@ int floatx80_le(floatx80 a, floatx80 b, float_status = *status) =20 int floatx80_lt(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b) || (extractFloatx80Exp(a) =3D=3D 0x7FFF @@ -6453,7 +6451,7 @@ int floatx80_eq_quiet(floatx80 a, floatx80 b, float_s= tatus *status) =20 int floatx80_le_quiet(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) { float_raise(float_flag_invalid, status); @@ -6493,7 +6491,7 @@ int floatx80_le_quiet(floatx80 a, floatx80 b, float_s= tatus *status) =20 int floatx80_lt_quiet(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) { float_raise(float_flag_invalid, status); @@ -6562,7 +6560,7 @@ int floatx80_unordered_quiet(floatx80 a, floatx80 b, = float_status *status) =20 int32_t float128_to_int32(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig0, aSig1; =20 @@ -6591,7 +6589,7 @@ int32_t float128_to_int32(float128 a, float_status *s= tatus) =20 int32_t float128_to_int32_round_to_zero(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig0, aSig1, savedASig; int32_t z; @@ -6641,7 +6639,7 @@ int32_t float128_to_int32_round_to_zero(float128 a, f= loat_status *status) =20 int64_t float128_to_int64(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig0, aSig1; =20 @@ -6684,7 +6682,7 @@ int64_t float128_to_int64(float128 a, float_status *s= tatus) =20 int64_t float128_to_int64_round_to_zero(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig0, aSig1; int64_t z; @@ -6749,7 +6747,7 @@ int64_t float128_to_int64_round_to_zero(float128 a, f= loat_status *status) =20 uint64_t float128_to_uint64(float128 a, float_status *status) { - flag aSign; + bool aSign; int aExp; int shiftCount; uint64_t aSig0, aSig1; @@ -6860,7 +6858,7 @@ uint32_t float128_to_uint32(float128 a, float_status = *status) =20 float32 float128_to_float32(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig0, aSig1; uint32_t zSig; @@ -6895,7 +6893,7 @@ float32 float128_to_float32(float128 a, float_status = *status) =20 float64 float128_to_float64(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig0, aSig1; =20 @@ -6928,7 +6926,7 @@ float64 float128_to_float64(float128 a, float_status = *status) =20 floatx80 float128_to_floatx80(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig0, aSig1; =20 @@ -6966,7 +6964,7 @@ floatx80 float128_to_floatx80(float128 a, float_statu= s *status) =20 float128 float128_round_to_int(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t lastBitMask, roundBitsMask; float128 z; @@ -7121,7 +7119,7 @@ float128 float128_round_to_int(float128 a, float_stat= us *status) | Floating-Point Arithmetic. *-------------------------------------------------------------------------= ---*/ =20 -static float128 addFloat128Sigs(float128 a, float128 b, flag zSign, +static float128 addFloat128Sigs(float128 a, float128 b, bool zSign, float_status *status) { int32_t aExp, bExp, zExp; @@ -7212,7 +7210,7 @@ static float128 addFloat128Sigs(float128 a, float128 = b, flag zSign, | Standard for Binary Floating-Point Arithmetic. *-------------------------------------------------------------------------= ---*/ =20 -static float128 subFloat128Sigs(float128 a, float128 b, flag zSign, +static float128 subFloat128Sigs(float128 a, float128 b, bool zSign, float_status *status) { int32_t aExp, bExp, zExp; @@ -7300,7 +7298,7 @@ static float128 subFloat128Sigs(float128 a, float128 = b, flag zSign, =20 float128 float128_add(float128 a, float128 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 aSign =3D extractFloat128Sign( a ); bSign =3D extractFloat128Sign( b ); @@ -7321,7 +7319,7 @@ float128 float128_add(float128 a, float128 b, float_s= tatus *status) =20 float128 float128_sub(float128 a, float128 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 aSign =3D extractFloat128Sign( a ); bSign =3D extractFloat128Sign( b ); @@ -7342,7 +7340,7 @@ float128 float128_sub(float128 a, float128 b, float_s= tatus *status) =20 float128 float128_mul(float128 a, float128 b, float_status *status) { - flag aSign, bSign, zSign; + bool aSign, bSign, zSign; int32_t aExp, bExp, zExp; uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3; =20 @@ -7405,7 +7403,7 @@ float128 float128_mul(float128 a, float128 b, float_s= tatus *status) =20 float128 float128_div(float128 a, float128 b, float_status *status) { - flag aSign, bSign, zSign; + bool aSign, bSign, zSign; int32_t aExp, bExp, zExp; uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; @@ -7492,7 +7490,7 @@ float128 float128_div(float128 a, float128 b, float_s= tatus *status) =20 float128 float128_rem(float128 a, float128 b, float_status *status) { - flag aSign, zSign; + bool aSign, zSign; int32_t aExp, bExp, expDiff; uint64_t aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2; uint64_t allZero, alternateASig0, alternateASig1, sigMean1; @@ -7599,7 +7597,7 @@ float128 float128_rem(float128 a, float128 b, float_s= tatus *status) =20 float128 float128_sqrt(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, zExp; uint64_t aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0; uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; @@ -7695,7 +7693,7 @@ int float128_eq(float128 a, float128 b, float_status = *status) =20 int float128_le(float128 a, float128 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 if ( ( ( extractFloat128Exp( a ) =3D=3D 0x7FFF ) && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )= ) @@ -7728,7 +7726,7 @@ int float128_le(float128 a, float128 b, float_status = *status) =20 int float128_lt(float128 a, float128 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 if ( ( ( extractFloat128Exp( a ) =3D=3D 0x7FFF ) && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )= ) @@ -7811,7 +7809,7 @@ int float128_eq_quiet(float128 a, float128 b, float_s= tatus *status) =20 int float128_le_quiet(float128 a, float128 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 if ( ( ( extractFloat128Exp( a ) =3D=3D 0x7FFF ) && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )= ) @@ -7847,7 +7845,7 @@ int float128_le_quiet(float128 a, float128 b, float_s= tatus *status) =20 int float128_lt_quiet(float128 a, float128 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; =20 if ( ( ( extractFloat128Exp( a ) =3D=3D 0x7FFF ) && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )= ) @@ -7900,7 +7898,7 @@ int float128_unordered_quiet(float128 a, float128 b, = float_status *status) static inline int floatx80_compare_internal(floatx80 a, floatx80 b, int is_quiet, float_status *st= atus) { - flag aSign, bSign; + bool aSign, bSign; =20 if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) { float_raise(float_flag_invalid, status); @@ -7957,7 +7955,7 @@ int floatx80_compare_quiet(floatx80 a, floatx80 b, fl= oat_status *status) static inline int float128_compare_internal(float128 a, float128 b, int is_quiet, float_status *st= atus) { - flag aSign, bSign; + bool aSign, bSign; =20 if (( ( extractFloat128Exp( a ) =3D=3D 0x7fff ) && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) ) || @@ -8000,7 +7998,7 @@ int float128_compare_quiet(float128 a, float128 b, fl= oat_status *status) =20 floatx80 floatx80_scalbn(floatx80 a, int n, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -8039,7 +8037,7 @@ floatx80 floatx80_scalbn(floatx80 a, int n, float_sta= tus *status) =20 float128 float128_scalbn(float128 a, int n, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig0, aSig1; =20 diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c index 0da254d402..e590db6637 100644 --- a/target/arm/sve_helper.c +++ b/target/arm/sve_helper.c @@ -3201,7 +3201,7 @@ void HELPER(NAME)(void *vd, void *vn, void *vg, void = *status, uint32_t desc) \ */ static inline float32 sve_f16_to_f32(float16 f, float_status *fpst) { - flag save =3D get_flush_inputs_to_zero(fpst); + bool save =3D get_flush_inputs_to_zero(fpst); float32 ret; =20 set_flush_inputs_to_zero(false, fpst); @@ -3212,7 +3212,7 @@ static inline float32 sve_f16_to_f32(float16 f, float= _status *fpst) =20 static inline float64 sve_f16_to_f64(float16 f, float_status *fpst) { - flag save =3D get_flush_inputs_to_zero(fpst); + bool save =3D get_flush_inputs_to_zero(fpst); float64 ret; =20 set_flush_inputs_to_zero(false, fpst); @@ -3223,7 +3223,7 @@ static inline float64 sve_f16_to_f64(float16 f, float= _status *fpst) =20 static inline float16 sve_f32_to_f16(float32 f, float_status *fpst) { - flag save =3D get_flush_to_zero(fpst); + bool save =3D get_flush_to_zero(fpst); float16 ret; =20 set_flush_to_zero(false, fpst); @@ -3234,7 +3234,7 @@ static inline float16 sve_f32_to_f16(float32 f, float= _status *fpst) =20 static inline float16 sve_f64_to_f16(float64 f, float_status *fpst) { - flag save =3D get_flush_to_zero(fpst); + bool save =3D get_flush_to_zero(fpst); float16 ret; =20 set_flush_to_zero(false, fpst); diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c index 88483d4066..42625747d1 100644 --- a/target/arm/vfp_helper.c +++ b/target/arm/vfp_helper.c @@ -531,7 +531,7 @@ float32 HELPER(vfp_fcvt_f16_to_f32)(uint32_t a, void *f= pstp, uint32_t ahp_mode) * it would affect flushing input denormals. */ float_status *fpst =3D fpstp; - flag save =3D get_flush_inputs_to_zero(fpst); + bool save =3D get_flush_inputs_to_zero(fpst); set_flush_inputs_to_zero(false, fpst); float32 r =3D float16_to_float32(a, !ahp_mode, fpst); set_flush_inputs_to_zero(save, fpst); @@ -544,7 +544,7 @@ uint32_t HELPER(vfp_fcvt_f32_to_f16)(float32 a, void *f= pstp, uint32_t ahp_mode) * it would affect flushing output denormals. */ float_status *fpst =3D fpstp; - flag save =3D get_flush_to_zero(fpst); + bool save =3D get_flush_to_zero(fpst); set_flush_to_zero(false, fpst); float16 r =3D float32_to_float16(a, !ahp_mode, fpst); set_flush_to_zero(save, fpst); @@ -557,7 +557,7 @@ float64 HELPER(vfp_fcvt_f16_to_f64)(uint32_t a, void *f= pstp, uint32_t ahp_mode) * it would affect flushing input denormals. */ float_status *fpst =3D fpstp; - flag save =3D get_flush_inputs_to_zero(fpst); + bool save =3D get_flush_inputs_to_zero(fpst); set_flush_inputs_to_zero(false, fpst); float64 r =3D float16_to_float64(a, !ahp_mode, fpst); set_flush_inputs_to_zero(save, fpst); @@ -570,7 +570,7 @@ uint32_t HELPER(vfp_fcvt_f64_to_f16)(float64 a, void *f= pstp, uint32_t ahp_mode) * it would affect flushing output denormals. */ float_status *fpst =3D fpstp; - flag save =3D get_flush_to_zero(fpst); + bool save =3D get_flush_to_zero(fpst); set_flush_to_zero(false, fpst); float16 r =3D float64_to_float16(a, !ahp_mode, fpst); set_flush_to_zero(save, fpst); diff --git a/target/m68k/softfloat.c b/target/m68k/softfloat.c index 24c313ed69..9f120cf15e 100644 --- a/target/m68k/softfloat.c +++ b/target/m68k/softfloat.c @@ -49,7 +49,7 @@ static floatx80 propagateFloatx80NaNOneArg(floatx80 a, fl= oat_status *status) =20 floatx80 floatx80_mod(floatx80 a, floatx80 b, float_status *status) { - flag aSign, zSign; + bool aSign, zSign; int32_t aExp, bExp, expDiff; uint64_t aSig0, aSig1, bSig; uint64_t qTemp, term0, term1; @@ -132,7 +132,7 @@ floatx80 floatx80_mod(floatx80 a, floatx80 b, float_sta= tus *status) =20 floatx80 floatx80_getman(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -166,7 +166,7 @@ floatx80 floatx80_getman(floatx80 a, float_status *stat= us) =20 floatx80 floatx80_getexp(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -202,7 +202,7 @@ floatx80 floatx80_getexp(floatx80 a, float_status *stat= us) =20 floatx80 floatx80_scale(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; int32_t aExp, bExp, shiftCount; uint64_t aSig, bSig; =20 @@ -258,7 +258,7 @@ floatx80 floatx80_scale(floatx80 a, floatx80 b, float_s= tatus *status) =20 floatx80 floatx80_move(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -306,7 +306,7 @@ static int32_t floatx80_make_compact(int32_t aExp, uint= 64_t aSig) =20 floatx80 floatx80_lognp1(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig, fSig; =20 @@ -505,7 +505,7 @@ floatx80 floatx80_lognp1(floatx80 a, float_status *stat= us) =20 floatx80 floatx80_logn(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig, fSig; =20 @@ -673,7 +673,7 @@ floatx80 floatx80_logn(floatx80 a, float_status *status) =20 floatx80 floatx80_log10(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -730,7 +730,7 @@ floatx80 floatx80_log10(floatx80 a, float_status *statu= s) =20 floatx80 floatx80_log2(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -797,7 +797,7 @@ floatx80 floatx80_log2(floatx80 a, float_status *status) =20 floatx80 floatx80_etox(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -805,7 +805,7 @@ floatx80 floatx80_etox(floatx80 a, float_status *status) =20 int32_t compact, n, j, k, m, m1; floatx80 fp0, fp1, fp2, fp3, l2, scale, adjscale; - flag adjflag; + bool adjflag; =20 aSig =3D extractFloatx80Frac(a); aExp =3D extractFloatx80Exp(a); @@ -981,7 +981,7 @@ floatx80 floatx80_etox(floatx80 a, float_status *status) =20 floatx80 floatx80_twotox(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -1131,7 +1131,7 @@ floatx80 floatx80_twotox(floatx80 a, float_status *st= atus) =20 floatx80 floatx80_tentox(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -1286,7 +1286,7 @@ floatx80 floatx80_tentox(floatx80 a, float_status *st= atus) =20 floatx80 floatx80_tan(floatx80 a, float_status *status) { - flag aSign, xSign; + bool aSign, xSign; int32_t aExp, xExp; uint64_t aSig, xSig; =20 @@ -1295,7 +1295,7 @@ floatx80 floatx80_tan(floatx80 a, float_status *statu= s) int32_t compact, l, n, j; floatx80 fp0, fp1, fp2, fp3, fp4, fp5, invtwopi, twopi1, twopi2; float32 twoto63; - flag endflag; + bool endflag; =20 aSig =3D extractFloatx80Frac(a); aExp =3D extractFloatx80Exp(a); @@ -1344,10 +1344,10 @@ floatx80 floatx80_tan(floatx80 a, float_status *sta= tus) xExp -=3D 0x3FFF; if (xExp <=3D 28) { l =3D 0; - endflag =3D 1; + endflag =3D true; } else { l =3D xExp - 27; - endflag =3D 0; + endflag =3D false; } invtwopi =3D packFloatx80(0, 0x3FFE - l, UINT64_C(0xA2F9836E4E44152A)); /* INVT= WOPI */ @@ -1372,7 +1372,7 @@ floatx80 floatx80_tan(floatx80 a, float_status *statu= s) fp1 =3D floatx80_sub(fp1, fp4, status); /* FP1 is a :=3D r - p= */ fp0 =3D floatx80_add(fp0, fp1, status); /* FP0 is R :=3D A+a */ =20 - if (endflag > 0) { + if (endflag) { n =3D floatx80_to_int32(fp2, status); goto tancont; } @@ -1496,7 +1496,7 @@ floatx80 floatx80_tan(floatx80 a, float_status *statu= s) =20 floatx80 floatx80_sin(floatx80 a, float_status *status) { - flag aSign, xSign; + bool aSign, xSign; int32_t aExp, xExp; uint64_t aSig, xSig; =20 @@ -1505,7 +1505,7 @@ floatx80 floatx80_sin(floatx80 a, float_status *statu= s) int32_t compact, l, n, j; floatx80 fp0, fp1, fp2, fp3, fp4, fp5, x, invtwopi, twopi1, twopi2; float32 posneg1, twoto63; - flag endflag; + bool endflag; =20 aSig =3D extractFloatx80Frac(a); aExp =3D extractFloatx80Exp(a); @@ -1554,10 +1554,10 @@ floatx80 floatx80_sin(floatx80 a, float_status *sta= tus) xExp -=3D 0x3FFF; if (xExp <=3D 28) { l =3D 0; - endflag =3D 1; + endflag =3D true; } else { l =3D xExp - 27; - endflag =3D 0; + endflag =3D false; } invtwopi =3D packFloatx80(0, 0x3FFE - l, UINT64_C(0xA2F9836E4E44152A)); /* INVT= WOPI */ @@ -1582,7 +1582,7 @@ floatx80 floatx80_sin(floatx80 a, float_status *statu= s) fp1 =3D floatx80_sub(fp1, fp4, status); /* FP1 is a :=3D r - p= */ fp0 =3D floatx80_add(fp0, fp1, status); /* FP0 is R :=3D A+a */ =20 - if (endflag > 0) { + if (endflag) { n =3D floatx80_to_int32(fp2, status); goto sincont; } @@ -1735,7 +1735,7 @@ floatx80 floatx80_sin(floatx80 a, float_status *statu= s) =20 floatx80 floatx80_cos(floatx80 a, float_status *status) { - flag aSign, xSign; + bool aSign, xSign; int32_t aExp, xExp; uint64_t aSig, xSig; =20 @@ -1744,7 +1744,7 @@ floatx80 floatx80_cos(floatx80 a, float_status *statu= s) int32_t compact, l, n, j; floatx80 fp0, fp1, fp2, fp3, fp4, fp5, x, invtwopi, twopi1, twopi2; float32 posneg1, twoto63; - flag endflag; + bool endflag; =20 aSig =3D extractFloatx80Frac(a); aExp =3D extractFloatx80Exp(a); @@ -1793,10 +1793,10 @@ floatx80 floatx80_cos(floatx80 a, float_status *sta= tus) xExp -=3D 0x3FFF; if (xExp <=3D 28) { l =3D 0; - endflag =3D 1; + endflag =3D true; } else { l =3D xExp - 27; - endflag =3D 0; + endflag =3D false; } invtwopi =3D packFloatx80(0, 0x3FFE - l, UINT64_C(0xA2F9836E4E44152A)); /* INVT= WOPI */ @@ -1821,7 +1821,7 @@ floatx80 floatx80_cos(floatx80 a, float_status *statu= s) fp1 =3D floatx80_sub(fp1, fp4, status); /* FP1 is a :=3D r - p= */ fp0 =3D floatx80_add(fp0, fp1, status); /* FP0 is R :=3D A+a */ =20 - if (endflag > 0) { + if (endflag) { n =3D floatx80_to_int32(fp2, status); goto sincont; } @@ -1972,7 +1972,7 @@ floatx80 floatx80_cos(floatx80 a, float_status *statu= s) =20 floatx80 floatx80_atan(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -2169,7 +2169,7 @@ floatx80 floatx80_atan(floatx80 a, float_status *stat= us) =20 floatx80 floatx80_asin(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -2234,7 +2234,7 @@ floatx80 floatx80_asin(floatx80 a, float_status *stat= us) =20 floatx80 floatx80_acos(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -2303,7 +2303,7 @@ floatx80 floatx80_acos(floatx80 a, float_status *stat= us) =20 floatx80 floatx80_atanh(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -2368,7 +2368,7 @@ floatx80 floatx80_atanh(floatx80 a, float_status *sta= tus) =20 floatx80 floatx80_etoxm1(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 @@ -2620,7 +2620,7 @@ floatx80 floatx80_etoxm1(floatx80 a, float_status *st= atus) =20 floatx80 floatx80_tanh(floatx80 a, float_status *status) { - flag aSign, vSign; + bool aSign, vSign; int32_t aExp, vExp; uint64_t aSig, vSig; =20 @@ -2735,7 +2735,7 @@ floatx80 floatx80_tanh(floatx80 a, float_status *stat= us) =20 floatx80 floatx80_sinh(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; =20 diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c index 4065cfe4f7..3c7012c0b8 100644 --- a/target/mips/msa_helper.c +++ b/target/mips/msa_helper.c @@ -5508,7 +5508,7 @@ static inline int get_enabled_exceptions(const CPUMIP= SState *env, int c) return c & enable; } =20 -static inline float16 float16_from_float32(int32_t a, flag ieee, +static inline float16 float16_from_float32(int32_t a, bool ieee, float_status *status) { float16 f_val; @@ -5527,7 +5527,7 @@ static inline float32 float32_from_float64(int64_t a,= float_status *status) return a < 0 ? (f_val | (1 << 31)) : f_val; } =20 -static inline float32 float32_from_float16(int16_t a, flag ieee, +static inline float32 float32_from_float16(int16_t a, bool ieee, float_status *status) { float32 f_val; @@ -6564,7 +6564,7 @@ void helper_msa_fexdo_df(CPUMIPSState *env, uint32_t = df, uint32_t wd, * IEEE and "ARM" format. The latter gains extra exponent * range by omitting the NaN/Inf encodings. */ - flag ieee =3D 1; + bool ieee =3D true; =20 MSA_FLOAT_BINOP(Lh(pwx, i), from_float32, pws->w[i], ieee, 16); MSA_FLOAT_BINOP(Rh(pwx, i), from_float32, pwt->w[i], ieee, 16); @@ -7178,7 +7178,7 @@ void helper_msa_fexupl_df(CPUMIPSState *env, uint32_t= df, uint32_t wd, * IEEE and "ARM" format. The latter gains extra exponent * range by omitting the NaN/Inf encodings. */ - flag ieee =3D 1; + bool ieee =3D true; =20 MSA_FLOAT_BINOP(pwx->w[i], from_float16, Lh(pws, i), ieee, 32); } @@ -7214,7 +7214,7 @@ void helper_msa_fexupr_df(CPUMIPSState *env, uint32_t= df, uint32_t wd, * IEEE and "ARM" format. The latter gains extra exponent * range by omitting the NaN/Inf encodings. */ - flag ieee =3D 1; + bool ieee =3D true; =20 MSA_FLOAT_BINOP(pwx->w[i], from_float16, Rh(pws, i), ieee, 32); } --=20 2.20.1 From nobody Sun May 19 18:35:16 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589569437; cv=none; d=zohomail.com; s=zohoarc; b=VUhl8QwzOpv5ehvtTVa191NBx5K+0+3XZ9jCX1ZwfCrFkcUMDUNM97Enlju1cEe4uO2pxuGiLCpy8EiEafNSRFjyLggBIAZIQnUQFDyyNiLm3Y1vwBQ58kpawfczaZqm6OIyQg3h3/2kh2fkJymELqiAG3BwyVwZ5Glzmsd5K4Q= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589569437; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=24kHxcfGrQlNd1H83dAyevlj6srFCPQIje3jn2Z8nKE=; b=bWyQkG3QxivHCefpCrhg9uLNdTK1mJf6wy4383NQQSc+b8LDnlMRvWpi2jA+F8gvp4o8+xxC/w5FBrIOCfEhxlB5r5siN+rFQPMI+pAxhcY3AxRNPvo7F09+KzeOROOgbUzd9CCcpc2ho8otqCs50JlHxZJpJX3VJMdjpa1AbE0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589569437009353.4995160944243; Fri, 15 May 2020 12:03:57 -0700 (PDT) Received: from localhost ([::1]:36370 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jZfch-0003jJ-JK for importer@patchew.org; Fri, 15 May 2020 15:03:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55850) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jZfau-0001dn-AO for qemu-devel@nongnu.org; Fri, 15 May 2020 15:02:04 -0400 Received: from mail-pg1-x541.google.com ([2607:f8b0:4864:20::541]:36730) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jZfar-0001pB-PK for qemu-devel@nongnu.org; Fri, 15 May 2020 15:02:03 -0400 Received: by mail-pg1-x541.google.com with SMTP id c75so409012pga.3 for ; Fri, 15 May 2020 12:02:01 -0700 (PDT) Received: from localhost.localdomain (174-21-143-238.tukw.qwest.net. [174.21.143.238]) by smtp.gmail.com with ESMTPSA id q21sm2485719pfg.131.2020.05.15.12.01.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 May 2020 12:01:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=24kHxcfGrQlNd1H83dAyevlj6srFCPQIje3jn2Z8nKE=; b=Y96EAWm8ms/pCeAzNJLYTZfUilM9NY4ozOs30vnoWMR58mVabmlNXF5tWuc9PYueZm aBkpvRgLIm/cfz3S4nL7M1lq3FjppPJR7WBm3eBz62pVGnNoPUqXhJSnXpQboPaf2znx WmrtEYH4Rutgyb3FFG5uVLLwNeewmyfvnvkdbFzS7jP5qj6KuhKeKfUYekdkYD4J9EFj IkaUj0HCZXXJhXVh4UvjAu5NGBIun0MAKlO2LiXXZRDw263uaYT1Q8UHcnpOeSGsRJSA uJpkqdVxSzp7kP+BLndFY3RY0GemXmVN5PMGyVjZP0+dZ+EC75Ee0H5oopiTJPuVGxYE PRDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=24kHxcfGrQlNd1H83dAyevlj6srFCPQIje3jn2Z8nKE=; b=C2XdE0nTVUslMmAuxHvBuJeZ1DzkpSwJHnehajQ8ekTaen1cmmzvFK4eC3IMQ7SIoL LaJXUdPnOhCLAGNilOX/KI8HkbavhfGKgL+PjL9Umts7snU4zkgOPoWLv3yOY0zUz3gR FrHJgRtraths/0OAzrHefFi+a3l3OBgqGDw9qRuJurgeinmHhuCz/uXZSWOHYolbh7+2 ypLYSCe6mqkxWMdinl+ryUjMunI6QNCk/n+iOl8WeK5N4BEAoAh6SlbWvrMv/jPHej03 U9WZlHHDT3JkYiR+olbRpMH7OzB185rcVh314d4bQbXcOLzlCDqrs1dtiNRAdFsAARf2 sl5Q== X-Gm-Message-State: AOAM530QiLiXdTyqZAO1qU0RKTkd+uNkLe6lHHdcoLvrhsrnS28jdgeM XleqYfiIUZNAMT2CHAf9q0f6knSKEaY= X-Google-Smtp-Source: ABdhPJwHWrMsRxZv6f1BduS9o8nrKStP2QXEy/FJh03VUqgb98Qu1xNTp+//p7jwIBiTgrn/LEXERw== X-Received: by 2002:aa7:8603:: with SMTP id p3mr4733449pfn.116.1589569319676; Fri, 15 May 2020 12:01:59 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 03/10] softfloat: Change tininess_before_rounding to bool Date: Fri, 15 May 2020 12:01:46 -0700 Message-Id: <20200515190153.6017-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200515190153.6017-1-richard.henderson@linaro.org> References: <20200515190153.6017-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::541; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x541.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Slightly tidies the usage within softfloat.c and the representation in float_status. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- include/fpu/softfloat-helpers.h | 8 ++--- include/fpu/softfloat-types.h | 8 ++--- fpu/softfloat.c | 54 ++++++++++++--------------------- tests/fp/fp-test.c | 2 +- 4 files changed, 28 insertions(+), 44 deletions(-) diff --git a/include/fpu/softfloat-helpers.h b/include/fpu/softfloat-helper= s.h index 528d7ebd9f..40d32a6d5d 100644 --- a/include/fpu/softfloat-helpers.h +++ b/include/fpu/softfloat-helpers.h @@ -53,9 +53,9 @@ this code that are retained. =20 #include "fpu/softfloat-types.h" =20 -static inline void set_float_detect_tininess(int val, float_status *status) +static inline void set_float_detect_tininess(bool val, float_status *statu= s) { - status->float_detect_tininess =3D val; + status->tininess_before_rounding =3D val; } =20 static inline void set_float_rounding_mode(int val, float_status *status) @@ -94,9 +94,9 @@ static inline void set_snan_bit_is_one(bool val, float_st= atus *status) status->snan_bit_is_one =3D val; } =20 -static inline int get_float_detect_tininess(float_status *status) +static inline bool get_float_detect_tininess(float_status *status) { - return status->float_detect_tininess; + return status->tininess_before_rounding; } =20 static inline int get_float_rounding_mode(float_status *status) diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h index 619b875df6..874ddd9f93 100644 --- a/include/fpu/softfloat-types.h +++ b/include/fpu/softfloat-types.h @@ -116,10 +116,8 @@ typedef struct { * Software IEC/IEEE floating-point underflow tininess-detection mode. */ =20 -enum { - float_tininess_after_rounding =3D 0, - float_tininess_before_rounding =3D 1 -}; +#define float_tininess_after_rounding false +#define float_tininess_before_rounding true =20 /* *Software IEC/IEEE floating-point rounding mode. @@ -158,10 +156,10 @@ enum { */ =20 typedef struct float_status { - signed char float_detect_tininess; signed char float_rounding_mode; uint8_t float_exception_flags; signed char floatx80_rounding_precision; + bool tininess_before_rounding; /* should denormalised results go to zero and set the inexact flag? */ bool flush_to_zero; /* should denormalised inputs go to zero and set the input_denormal fl= ag? */ diff --git a/fpu/softfloat.c b/fpu/softfloat.c index b741cf5bc3..65d457a548 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -744,8 +744,7 @@ static FloatParts round_canonical(FloatParts p, float_s= tatus *s, p.cls =3D float_class_zero; goto do_zero; } else { - bool is_tiny =3D (s->float_detect_tininess - =3D=3D float_tininess_before_rounding) + bool is_tiny =3D s->tininess_before_rounding || (exp < 0) || !((frac + inc) & DECOMPOSED_OVERFLOW_BIT); =20 @@ -3579,11 +3578,9 @@ static float32 roundAndPackFloat32(bool zSign, int z= Exp, uint32_t zSig, float_raise(float_flag_output_denormal, status); return packFloat32(zSign, 0, 0); } - isTiny =3D - (status->float_detect_tininess - =3D=3D float_tininess_before_rounding) - || ( zExp < -1 ) - || ( zSig + roundIncrement < 0x80000000 ); + isTiny =3D status->tininess_before_rounding + || (zExp < -1) + || (zSig + roundIncrement < 0x80000000); shift32RightJamming( zSig, - zExp, &zSig ); zExp =3D 0; roundBits =3D zSig & 0x7F; @@ -3735,11 +3732,9 @@ static float64 roundAndPackFloat64(bool zSign, int z= Exp, uint64_t zSig, float_raise(float_flag_output_denormal, status); return packFloat64(zSign, 0, 0); } - isTiny =3D - (status->float_detect_tininess - =3D=3D float_tininess_before_rounding) - || ( zExp < -1 ) - || ( zSig + roundIncrement < UINT64_C(0x8000000000000000) = ); + isTiny =3D status->tininess_before_rounding + || (zExp < -1) + || (zSig + roundIncrement < UINT64_C(0x8000000000000000)= ); shift64RightJamming( zSig, - zExp, &zSig ); zExp =3D 0; roundBits =3D zSig & 0x3FF; @@ -3878,11 +3873,9 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecisi= on, bool zSign, float_raise(float_flag_output_denormal, status); return packFloatx80(zSign, 0, 0); } - isTiny =3D - (status->float_detect_tininess - =3D=3D float_tininess_before_rounding) - || ( zExp < 0 ) - || ( zSig0 <=3D zSig0 + roundIncrement ); + isTiny =3D status->tininess_before_rounding + || (zExp < 0 ) + || (zSig0 <=3D zSig0 + roundIncrement); shift64RightJamming( zSig0, 1 - zExp, &zSig0 ); zExp =3D 0; roundBits =3D zSig0 & roundMask; @@ -3956,12 +3949,10 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecis= ion, bool zSign, floatx80_infinity_low); } if ( zExp <=3D 0 ) { - isTiny =3D - (status->float_detect_tininess - =3D=3D float_tininess_before_rounding) - || ( zExp < 0 ) - || ! increment - || ( zSig0 < UINT64_C(0xFFFFFFFFFFFFFFFF) ); + isTiny =3D status->tininess_before_rounding + || (zExp < 0) + || !increment + || (zSig0 < UINT64_C(0xFFFFFFFFFFFFFFFF)); shift64ExtraRightJamming( zSig0, zSig1, 1 - zExp, &zSig0, &zSi= g1 ); zExp =3D 0; if (isTiny && zSig1) { @@ -4237,17 +4228,12 @@ static float128 roundAndPackFloat128(bool zSign, in= t32_t zExp, float_raise(float_flag_output_denormal, status); return packFloat128(zSign, 0, 0, 0); } - isTiny =3D - (status->float_detect_tininess - =3D=3D float_tininess_before_rounding) - || ( zExp < -1 ) - || ! increment - || lt128( - zSig0, - zSig1, - UINT64_C(0x0001FFFFFFFFFFFF), - UINT64_C(0xFFFFFFFFFFFFFFFF) - ); + isTiny =3D status->tininess_before_rounding + || (zExp < -1) + || !increment + || lt128(zSig0, zSig1, + UINT64_C(0x0001FFFFFFFFFFFF), + UINT64_C(0xFFFFFFFFFFFFFFFF)); shift128ExtraRightJamming( zSig0, zSig1, zSig2, - zExp, &zSig0, &zSig1, &zSig2 ); zExp =3D 0; diff --git a/tests/fp/fp-test.c b/tests/fp/fp-test.c index 7d0faf2b47..43ef9628c4 100644 --- a/tests/fp/fp-test.c +++ b/tests/fp/fp-test.c @@ -989,7 +989,7 @@ static void QEMU_NORETURN run_test(void) =20 verCases_tininessCode =3D 0; slowfloat_detectTininess =3D tmode; - qsf.float_detect_tininess =3D sf_tininess_to_qemu(tmod= e); + qsf.tininess_before_rounding =3D sf_tininess_to_qemu(t= mode); =20 if (attrs & FUNC_EFF_TININESSMODE || ((attrs & FUNC_EFF_TININESSMODE_REDUCEDPREC) && --=20 2.20.1 From nobody Sun May 19 18:35:16 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589569592; cv=none; d=zohomail.com; s=zohoarc; b=Z2PuIP102zZ4QuEEstVTj/vwHBt4S3vCLJ2GmhY7kgazn0DVHuhMHuZyaNFSp/0OPAfiW9y2SBl0kaobUvXDUG4Zkd0UGFhYWTq/nb5A2eNdnYF5GhcMVYcC/B1Mr4oCwWZHOV6zt6figbNCSh/qO0QhIxYHN+dJWOvdn55m4nI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589569592; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=+FkGoJCkmQLYehmIzADxqEmN8LjvB6arlHoI67AxW/Y=; b=Xk9bbW9TSzFTm+PsnRKKkISd+HaC46cCra7Z7eUYURg5ye1m6+XgafEy37wQBupd3N6Zre4pFt6/pdvWK8hVw7hTFV8WNu4lICQoKzJHLuLFqPNvmYAkePWDI4vs3SGrUh65CVs7OGch0CLvTfmoBpYr/LjKIwFeDjpxYZ+BmOA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589569592033277.0233763898211; Fri, 15 May 2020 12:06:32 -0700 (PDT) Received: from localhost ([::1]:44712 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jZffC-00088J-Ii for importer@patchew.org; Fri, 15 May 2020 15:06:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55858) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jZfav-0001fR-K2 for qemu-devel@nongnu.org; Fri, 15 May 2020 15:02:05 -0400 Received: from mail-pg1-x541.google.com ([2607:f8b0:4864:20::541]:36731) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jZfat-0001pM-C6 for qemu-devel@nongnu.org; Fri, 15 May 2020 15:02:05 -0400 Received: by mail-pg1-x541.google.com with SMTP id c75so409049pga.3 for ; Fri, 15 May 2020 12:02:03 -0700 (PDT) Received: from localhost.localdomain (174-21-143-238.tukw.qwest.net. [174.21.143.238]) by smtp.gmail.com with ESMTPSA id q21sm2485719pfg.131.2020.05.15.12.01.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 May 2020 12:02:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+FkGoJCkmQLYehmIzADxqEmN8LjvB6arlHoI67AxW/Y=; b=GGj6i0VEobPX0ZPKSwYkGB2JireUlz1KBTMARX/eKaMDebSWXp5KptWUkqqI4hrXDB 0w5fjB/LiCaG6MJjvSU3AGmA63/FMkT3sOlAUxxZrXs5VNVkfK2r4OFcdXCiHXXQJvDn kguNOxibpWgR+3YC+MOPwReBLAlTzG/aU0o5XXjf8YQBoDh33Ex0SqQyCXXpXbTQ3XSP HPuZ5FINBVVnyw+6Qow/MMRLGI+o63oTCUJwUdh20xu4TZxVoCwGLc6lCTDAOwxMKSot GufbiRgM57ebxnP9QjgJ59tE4wrk1h4LS9Fn+HuK6cc0XojdDzo1hMnUoFUMyxfP2LKi IcsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+FkGoJCkmQLYehmIzADxqEmN8LjvB6arlHoI67AxW/Y=; b=qtM0hyvMmzemAEELHvqUQ/Hld551N1dbng9QwxLc//sawLi7kIp3ca+HYWPl5fH8cw 4Z5tf2Y70xBVXGPDKd779szjKvWt/WNkCIo6wOZ6rzxa/H+PNfR3xmqeHzJPf+N4K+ah pQxfah+lq9l6MQCTKF2nGj97LW3PEd6Tg+0AYa2yYe87Do4rstmd2agLJChX+MwwKkzD yYIKs8V9aD/QPfs3CCMdlL/HerlT93mUSNogNrQ4ACqGHDRGryxaXzCwJur7SGTiaxky RactneeJvgih2I7VE8qw3PoIg4+XSXU3H548O4/7CsQlZXcl7Y2mFqAIZiXgtvutcuWe jzTg== X-Gm-Message-State: AOAM532g35LWZOU5XZB6zo++Hde3U8Yix3GHqwy0JP75BfD0gPc3kty+ Te6rr96fL1ZTac+OEEB6SJjsFlxOpjk= X-Google-Smtp-Source: ABdhPJzcr/9qJGpWo6Xnlao4ZkP5mPQyk9qf6TsPtFuXgxFAs8QdNOkcNxPGRR3bSOuGZKS0QSgsJg== X-Received: by 2002:a63:fd52:: with SMTP id m18mr4432505pgj.436.1589569321332; Fri, 15 May 2020 12:02:01 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 04/10] softfloat: Name rounding mode enum Date: Fri, 15 May 2020 12:01:47 -0700 Message-Id: <20200515190153.6017-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200515190153.6017-1-richard.henderson@linaro.org> References: <20200515190153.6017-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::541; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x541.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Give the previously unnamed enum a typedef name. Use the packed attribute so that we do not affect the layout of the float_status struct. Use it in the prototypes of relevant functions. Adjust switch statements as necessary to avoid compiler warnings. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- include/fpu/softfloat-helpers.h | 5 +-- include/fpu/softfloat-types.h | 6 ++-- include/fpu/softfloat.h | 39 +++++++++++----------- fpu/softfloat.c | 57 ++++++++++++++++++++------------- target/arm/vfp_helper.c | 4 +-- target/m68k/fpu_helper.c | 6 ++-- 6 files changed, 66 insertions(+), 51 deletions(-) diff --git a/include/fpu/softfloat-helpers.h b/include/fpu/softfloat-helper= s.h index 40d32a6d5d..735ed6b653 100644 --- a/include/fpu/softfloat-helpers.h +++ b/include/fpu/softfloat-helpers.h @@ -58,7 +58,8 @@ static inline void set_float_detect_tininess(bool val, fl= oat_status *status) status->tininess_before_rounding =3D val; } =20 -static inline void set_float_rounding_mode(int val, float_status *status) +static inline void set_float_rounding_mode(FloatRoundMode val, + float_status *status) { status->float_rounding_mode =3D val; } @@ -99,7 +100,7 @@ static inline bool get_float_detect_tininess(float_statu= s *status) return status->tininess_before_rounding; } =20 -static inline int get_float_rounding_mode(float_status *status) +static inline FloatRoundMode get_float_rounding_mode(float_status *status) { return status->float_rounding_mode; } diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h index 874ddd9f93..7680193ebc 100644 --- a/include/fpu/softfloat-types.h +++ b/include/fpu/softfloat-types.h @@ -123,7 +123,7 @@ typedef struct { *Software IEC/IEEE floating-point rounding mode. */ =20 -enum { +typedef enum __attribute__((__packed__)) { float_round_nearest_even =3D 0, float_round_down =3D 1, float_round_up =3D 2, @@ -131,7 +131,7 @@ enum { float_round_ties_away =3D 4, /* Not an IEEE rounding mode: round to the closest odd mantissa value = */ float_round_to_odd =3D 5, -}; +} FloatRoundMode; =20 /* * Software IEC/IEEE floating-point exception flags. @@ -156,7 +156,7 @@ enum { */ =20 typedef struct float_status { - signed char float_rounding_mode; + FloatRoundMode float_rounding_mode; uint8_t float_exception_flags; signed char floatx80_rounding_precision; bool tininess_before_rounding; diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 3f588da7c7..ca75f764aa 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -186,9 +186,9 @@ float32 float16_to_float32(float16, bool ieee, float_st= atus *status); float16 float64_to_float16(float64 a, bool ieee, float_status *status); float64 float16_to_float64(float16 a, bool ieee, float_status *status); =20 -int16_t float16_to_int16_scalbn(float16, int, int, float_status *status); -int32_t float16_to_int32_scalbn(float16, int, int, float_status *status); -int64_t float16_to_int64_scalbn(float16, int, int, float_status *status); +int16_t float16_to_int16_scalbn(float16, FloatRoundMode, int, float_status= *); +int32_t float16_to_int32_scalbn(float16, FloatRoundMode, int, float_status= *); +int64_t float16_to_int64_scalbn(float16, FloatRoundMode, int, float_status= *); =20 int16_t float16_to_int16(float16, float_status *status); int32_t float16_to_int32(float16, float_status *status); @@ -198,9 +198,12 @@ int16_t float16_to_int16_round_to_zero(float16, float_= status *status); int32_t float16_to_int32_round_to_zero(float16, float_status *status); int64_t float16_to_int64_round_to_zero(float16, float_status *status); =20 -uint16_t float16_to_uint16_scalbn(float16 a, int, int, float_status *statu= s); -uint32_t float16_to_uint32_scalbn(float16 a, int, int, float_status *statu= s); -uint64_t float16_to_uint64_scalbn(float16 a, int, int, float_status *statu= s); +uint16_t float16_to_uint16_scalbn(float16 a, FloatRoundMode, + int, float_status *status); +uint32_t float16_to_uint32_scalbn(float16 a, FloatRoundMode, + int, float_status *status); +uint64_t float16_to_uint64_scalbn(float16 a, FloatRoundMode, + int, float_status *status); =20 uint16_t float16_to_uint16(float16 a, float_status *status); uint32_t float16_to_uint32(float16 a, float_status *status); @@ -298,9 +301,9 @@ float16 float16_default_nan(float_status *status); | Software IEC/IEEE single-precision conversion routines. *-------------------------------------------------------------------------= ---*/ =20 -int16_t float32_to_int16_scalbn(float32, int, int, float_status *status); -int32_t float32_to_int32_scalbn(float32, int, int, float_status *status); -int64_t float32_to_int64_scalbn(float32, int, int, float_status *status); +int16_t float32_to_int16_scalbn(float32, FloatRoundMode, int, float_status= *); +int32_t float32_to_int32_scalbn(float32, FloatRoundMode, int, float_status= *); +int64_t float32_to_int64_scalbn(float32, FloatRoundMode, int, float_status= *); =20 int16_t float32_to_int16(float32, float_status *status); int32_t float32_to_int32(float32, float_status *status); @@ -310,9 +313,9 @@ int16_t float32_to_int16_round_to_zero(float32, float_s= tatus *status); int32_t float32_to_int32_round_to_zero(float32, float_status *status); int64_t float32_to_int64_round_to_zero(float32, float_status *status); =20 -uint16_t float32_to_uint16_scalbn(float32, int, int, float_status *status); -uint32_t float32_to_uint32_scalbn(float32, int, int, float_status *status); -uint64_t float32_to_uint64_scalbn(float32, int, int, float_status *status); +uint16_t float32_to_uint16_scalbn(float32, FloatRoundMode, int, float_stat= us *); +uint32_t float32_to_uint32_scalbn(float32, FloatRoundMode, int, float_stat= us *); +uint64_t float32_to_uint64_scalbn(float32, FloatRoundMode, int, float_stat= us *); =20 uint16_t float32_to_uint16(float32, float_status *status); uint32_t float32_to_uint32(float32, float_status *status); @@ -455,9 +458,9 @@ float32 float32_default_nan(float_status *status); | Software IEC/IEEE double-precision conversion routines. *-------------------------------------------------------------------------= ---*/ =20 -int16_t float64_to_int16_scalbn(float64, int, int, float_status *status); -int32_t float64_to_int32_scalbn(float64, int, int, float_status *status); -int64_t float64_to_int64_scalbn(float64, int, int, float_status *status); +int16_t float64_to_int16_scalbn(float64, FloatRoundMode, int, float_status= *); +int32_t float64_to_int32_scalbn(float64, FloatRoundMode, int, float_status= *); +int64_t float64_to_int64_scalbn(float64, FloatRoundMode, int, float_status= *); =20 int16_t float64_to_int16(float64, float_status *status); int32_t float64_to_int32(float64, float_status *status); @@ -467,9 +470,9 @@ int16_t float64_to_int16_round_to_zero(float64, float_s= tatus *status); int32_t float64_to_int32_round_to_zero(float64, float_status *status); int64_t float64_to_int64_round_to_zero(float64, float_status *status); =20 -uint16_t float64_to_uint16_scalbn(float64, int, int, float_status *status); -uint32_t float64_to_uint32_scalbn(float64, int, int, float_status *status); -uint64_t float64_to_uint64_scalbn(float64, int, int, float_status *status); +uint16_t float64_to_uint16_scalbn(float64, FloatRoundMode, int, float_stat= us *); +uint32_t float64_to_uint32_scalbn(float64, FloatRoundMode, int, float_stat= us *); +uint64_t float64_to_uint64_scalbn(float64, FloatRoundMode, int, float_stat= us *); =20 uint16_t float64_to_uint16(float64, float_status *status); uint32_t float64_to_uint32(float64, float_status *status); diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 65d457a548..93d8a03de6 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -759,6 +759,8 @@ static FloatParts round_canonical(FloatParts p, float_s= tatus *s, case float_round_to_odd: inc =3D frac & frac_lsb ? 0 : round_mask; break; + default: + break; } flags |=3D float_flag_inexact; frac +=3D inc; @@ -1928,7 +1930,7 @@ float32 float64_to_float32(float64 a, float_status *s) * Arithmetic. */ =20 -static FloatParts round_to_int(FloatParts a, int rmode, +static FloatParts round_to_int(FloatParts a, FloatRoundMode rmode, int scale, float_status *s) { switch (a.cls) { @@ -2061,8 +2063,8 @@ float64 float64_round_to_int(float64 a, float_status = *s) * is returned. */ =20 -static int64_t round_to_int_and_pack(FloatParts in, int rmode, int scale, - int64_t min, int64_t max, +static int64_t round_to_int_and_pack(FloatParts in, FloatRoundMode rmode, + int scale, int64_t min, int64_t max, float_status *s) { uint64_t r; @@ -2107,63 +2109,63 @@ static int64_t round_to_int_and_pack(FloatParts in,= int rmode, int scale, } } =20 -int16_t float16_to_int16_scalbn(float16 a, int rmode, int scale, +int16_t float16_to_int16_scalbn(float16 a, FloatRoundMode rmode, int scale, float_status *s) { return round_to_int_and_pack(float16_unpack_canonical(a, s), rmode, scale, INT16_MIN, INT16_MAX, s); } =20 -int32_t float16_to_int32_scalbn(float16 a, int rmode, int scale, +int32_t float16_to_int32_scalbn(float16 a, FloatRoundMode rmode, int scale, float_status *s) { return round_to_int_and_pack(float16_unpack_canonical(a, s), rmode, scale, INT32_MIN, INT32_MAX, s); } =20 -int64_t float16_to_int64_scalbn(float16 a, int rmode, int scale, +int64_t float16_to_int64_scalbn(float16 a, FloatRoundMode rmode, int scale, float_status *s) { return round_to_int_and_pack(float16_unpack_canonical(a, s), rmode, scale, INT64_MIN, INT64_MAX, s); } =20 -int16_t float32_to_int16_scalbn(float32 a, int rmode, int scale, +int16_t float32_to_int16_scalbn(float32 a, FloatRoundMode rmode, int scale, float_status *s) { return round_to_int_and_pack(float32_unpack_canonical(a, s), rmode, scale, INT16_MIN, INT16_MAX, s); } =20 -int32_t float32_to_int32_scalbn(float32 a, int rmode, int scale, +int32_t float32_to_int32_scalbn(float32 a, FloatRoundMode rmode, int scale, float_status *s) { return round_to_int_and_pack(float32_unpack_canonical(a, s), rmode, scale, INT32_MIN, INT32_MAX, s); } =20 -int64_t float32_to_int64_scalbn(float32 a, int rmode, int scale, +int64_t float32_to_int64_scalbn(float32 a, FloatRoundMode rmode, int scale, float_status *s) { return round_to_int_and_pack(float32_unpack_canonical(a, s), rmode, scale, INT64_MIN, INT64_MAX, s); } =20 -int16_t float64_to_int16_scalbn(float64 a, int rmode, int scale, +int16_t float64_to_int16_scalbn(float64 a, FloatRoundMode rmode, int scale, float_status *s) { return round_to_int_and_pack(float64_unpack_canonical(a, s), rmode, scale, INT16_MIN, INT16_MAX, s); } =20 -int32_t float64_to_int32_scalbn(float64 a, int rmode, int scale, +int32_t float64_to_int32_scalbn(float64 a, FloatRoundMode rmode, int scale, float_status *s) { return round_to_int_and_pack(float64_unpack_canonical(a, s), rmode, scale, INT32_MIN, INT32_MAX, s); } =20 -int64_t float64_to_int64_scalbn(float64 a, int rmode, int scale, +int64_t float64_to_int64_scalbn(float64 a, FloatRoundMode rmode, int scale, float_status *s) { return round_to_int_and_pack(float64_unpack_canonical(a, s), @@ -2273,8 +2275,9 @@ int64_t float64_to_int64_round_to_zero(float64 a, flo= at_status *s) * flag. */ =20 -static uint64_t round_to_uint_and_pack(FloatParts in, int rmode, int scale, - uint64_t max, float_status *s) +static uint64_t round_to_uint_and_pack(FloatParts in, FloatRoundMode rmode, + int scale, uint64_t max, + float_status *s) { int orig_flags =3D get_float_exception_flags(s); FloatParts p =3D round_to_int(in, rmode, scale, s); @@ -2319,63 +2322,63 @@ static uint64_t round_to_uint_and_pack(FloatParts i= n, int rmode, int scale, } } =20 -uint16_t float16_to_uint16_scalbn(float16 a, int rmode, int scale, +uint16_t float16_to_uint16_scalbn(float16 a, FloatRoundMode rmode, int sca= le, float_status *s) { return round_to_uint_and_pack(float16_unpack_canonical(a, s), rmode, scale, UINT16_MAX, s); } =20 -uint32_t float16_to_uint32_scalbn(float16 a, int rmode, int scale, +uint32_t float16_to_uint32_scalbn(float16 a, FloatRoundMode rmode, int sca= le, float_status *s) { return round_to_uint_and_pack(float16_unpack_canonical(a, s), rmode, scale, UINT32_MAX, s); } =20 -uint64_t float16_to_uint64_scalbn(float16 a, int rmode, int scale, +uint64_t float16_to_uint64_scalbn(float16 a, FloatRoundMode rmode, int sca= le, float_status *s) { return round_to_uint_and_pack(float16_unpack_canonical(a, s), rmode, scale, UINT64_MAX, s); } =20 -uint16_t float32_to_uint16_scalbn(float32 a, int rmode, int scale, +uint16_t float32_to_uint16_scalbn(float32 a, FloatRoundMode rmode, int sca= le, float_status *s) { return round_to_uint_and_pack(float32_unpack_canonical(a, s), rmode, scale, UINT16_MAX, s); } =20 -uint32_t float32_to_uint32_scalbn(float32 a, int rmode, int scale, +uint32_t float32_to_uint32_scalbn(float32 a, FloatRoundMode rmode, int sca= le, float_status *s) { return round_to_uint_and_pack(float32_unpack_canonical(a, s), rmode, scale, UINT32_MAX, s); } =20 -uint64_t float32_to_uint64_scalbn(float32 a, int rmode, int scale, +uint64_t float32_to_uint64_scalbn(float32 a, FloatRoundMode rmode, int sca= le, float_status *s) { return round_to_uint_and_pack(float32_unpack_canonical(a, s), rmode, scale, UINT64_MAX, s); } =20 -uint16_t float64_to_uint16_scalbn(float64 a, int rmode, int scale, +uint16_t float64_to_uint16_scalbn(float64 a, FloatRoundMode rmode, int sca= le, float_status *s) { return round_to_uint_and_pack(float64_unpack_canonical(a, s), rmode, scale, UINT16_MAX, s); } =20 -uint32_t float64_to_uint32_scalbn(float64 a, int rmode, int scale, +uint32_t float64_to_uint32_scalbn(float64 a, FloatRoundMode rmode, int sca= le, float_status *s) { return round_to_uint_and_pack(float64_unpack_canonical(a, s), rmode, scale, UINT32_MAX, s); } =20 -uint64_t float64_to_uint64_scalbn(float64 a, int rmode, int scale, +uint64_t float64_to_uint64_scalbn(float64 a, FloatRoundMode rmode, int sca= le, float_status *s) { return round_to_uint_and_pack(float64_unpack_canonical(a, s), @@ -5715,6 +5718,11 @@ floatx80 floatx80_round_to_int(floatx80 a, float_sta= tus *status) return aSign ? packFloatx80( 1, 0, 0 ) : packFloatx80( 0, 0x3FFF, UINT64_C(0x8000000000000000)); + + case float_round_to_zero: + break; + default: + g_assert_not_reached(); } return packFloatx80( aSign, 0, 0 ); } @@ -7047,6 +7055,9 @@ float128 float128_round_to_int(float128 a, float_stat= us *status) =20 case float_round_to_odd: return packFloat128(aSign, 0x3FFF, 0, 0); + + case float_round_to_zero: + break; } return packFloat128( aSign, 0, 0, 0 ); } diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c index 42625747d1..0920694764 100644 --- a/target/arm/vfp_helper.c +++ b/target/arm/vfp_helper.c @@ -697,9 +697,9 @@ static bool round_to_inf(float_status *fpst, bool sign_= bit) return sign_bit; case float_round_to_zero: /* Round to Zero */ return false; + default: + g_assert_not_reached(); } - - g_assert_not_reached(); } =20 uint32_t HELPER(recpe_f16)(uint32_t input, void *fpstp) diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index 4137542ec0..36e6c704d1 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -149,7 +149,7 @@ void cpu_m68k_set_fpcr(CPUM68KState *env, uint32_t val) =20 void HELPER(fitrunc)(CPUM68KState *env, FPReg *res, FPReg *val) { - int rounding_mode =3D get_float_rounding_mode(&env->fp_status); + FloatRoundMode rounding_mode =3D get_float_rounding_mode(&env->fp_stat= us); set_float_rounding_mode(float_round_to_zero, &env->fp_status); res->d =3D floatx80_round_to_int(val->d, &env->fp_status); set_float_rounding_mode(rounding_mode, &env->fp_status); @@ -300,7 +300,7 @@ void HELPER(fdmul)(CPUM68KState *env, FPReg *res, FPReg= *val0, FPReg *val1) =20 void HELPER(fsglmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *va= l1) { - int rounding_mode =3D get_float_rounding_mode(&env->fp_status); + FloatRoundMode rounding_mode =3D get_float_rounding_mode(&env->fp_stat= us); floatx80 a, b; =20 PREC_BEGIN(32); @@ -333,7 +333,7 @@ void HELPER(fddiv)(CPUM68KState *env, FPReg *res, FPReg= *val0, FPReg *val1) =20 void HELPER(fsgldiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *va= l1) { - int rounding_mode =3D get_float_rounding_mode(&env->fp_status); + FloatRoundMode rounding_mode =3D get_float_rounding_mode(&env->fp_stat= us); floatx80 a, b; =20 PREC_BEGIN(32); --=20 2.20.1 From nobody Sun May 19 18:35:16 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Give the previously unnamed enum a typedef name. Use it in the prototypes of compare functions. Use it to hold the results of the compare functions. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- include/fpu/softfloat.h | 25 +++++++++++---------- target/i386/ops_sse.h | 8 +++---- fpu/softfloat.c | 40 ++++++++++++++++++--------------- target/arm/vfp_helper.c | 2 +- target/hppa/op_helper.c | 7 +++--- target/i386/fpu_helper.c | 8 +++---- target/openrisc/fpu_helper.c | 4 ++-- target/ppc/int_helper.c | 13 ++++++----- target/s390x/fpu_helper.c | 22 +++++++++--------- target/sparc/fop_helper.c | 4 ++-- target/unicore32/ucf64_helper.c | 6 ++--- target/xtensa/fpu_helper.c | 6 ++--- 12 files changed, 75 insertions(+), 70 deletions(-) diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index ca75f764aa..7f84235122 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -85,12 +85,13 @@ this code that are retained. /*------------------------------------------------------------------------= ---- | Software IEC/IEEE floating-point ordering relations *-------------------------------------------------------------------------= ---*/ -enum { + +typedef enum { float_relation_less =3D -1, float_relation_equal =3D 0, float_relation_greater =3D 1, float_relation_unordered =3D 2 -}; +} FloatRelation; =20 #include "fpu/softfloat-types.h" #include "fpu/softfloat-helpers.h" @@ -231,8 +232,8 @@ float16 float16_maxnum(float16, float16, float_status *= status); float16 float16_minnummag(float16, float16, float_status *status); float16 float16_maxnummag(float16, float16, float_status *status); float16 float16_sqrt(float16, float_status *status); -int float16_compare(float16, float16, float_status *status); -int float16_compare_quiet(float16, float16, float_status *status); +FloatRelation float16_compare(float16, float16, float_status *status); +FloatRelation float16_compare_quiet(float16, float16, float_status *status= ); =20 int float16_is_quiet_nan(float16, float_status *status); int float16_is_signaling_nan(float16, float_status *status); @@ -350,8 +351,8 @@ int float32_eq_quiet(float32, float32, float_status *st= atus); int float32_le_quiet(float32, float32, float_status *status); int float32_lt_quiet(float32, float32, float_status *status); int float32_unordered_quiet(float32, float32, float_status *status); -int float32_compare(float32, float32, float_status *status); -int float32_compare_quiet(float32, float32, float_status *status); +FloatRelation float32_compare(float32, float32, float_status *status); +FloatRelation float32_compare_quiet(float32, float32, float_status *status= ); float32 float32_min(float32, float32, float_status *status); float32 float32_max(float32, float32, float_status *status); float32 float32_minnum(float32, float32, float_status *status); @@ -506,8 +507,8 @@ int float64_eq_quiet(float64, float64, float_status *st= atus); int float64_le_quiet(float64, float64, float_status *status); int float64_lt_quiet(float64, float64, float_status *status); int float64_unordered_quiet(float64, float64, float_status *status); -int float64_compare(float64, float64, float_status *status); -int float64_compare_quiet(float64, float64, float_status *status); +FloatRelation float64_compare(float64, float64, float_status *status); +FloatRelation float64_compare_quiet(float64, float64, float_status *status= ); float64 float64_min(float64, float64, float_status *status); float64 float64_max(float64, float64, float_status *status); float64 float64_minnum(float64, float64, float_status *status); @@ -630,8 +631,8 @@ int floatx80_eq_quiet(floatx80, floatx80, float_status = *status); int floatx80_le_quiet(floatx80, floatx80, float_status *status); int floatx80_lt_quiet(floatx80, floatx80, float_status *status); int floatx80_unordered_quiet(floatx80, floatx80, float_status *status); -int floatx80_compare(floatx80, floatx80, float_status *status); -int floatx80_compare_quiet(floatx80, floatx80, float_status *status); +FloatRelation floatx80_compare(floatx80, floatx80, float_status *status); +FloatRelation floatx80_compare_quiet(floatx80, floatx80, float_status *sta= tus); int floatx80_is_quiet_nan(floatx80, float_status *status); int floatx80_is_signaling_nan(floatx80, float_status *status); floatx80 floatx80_silence_nan(floatx80, float_status *status); @@ -842,8 +843,8 @@ int float128_eq_quiet(float128, float128, float_status = *status); int float128_le_quiet(float128, float128, float_status *status); int float128_lt_quiet(float128, float128, float_status *status); int float128_unordered_quiet(float128, float128, float_status *status); -int float128_compare(float128, float128, float_status *status); -int float128_compare_quiet(float128, float128, float_status *status); +FloatRelation float128_compare(float128, float128, float_status *status); +FloatRelation float128_compare_quiet(float128, float128, float_status *sta= tus); int float128_is_quiet_nan(float128, float_status *status); int float128_is_signaling_nan(float128, float_status *status); float128 float128_silence_nan(float128, float_status *status); diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h index ec1ec745d0..4658768de2 100644 --- a/target/i386/ops_sse.h +++ b/target/i386/ops_sse.h @@ -1031,7 +1031,7 @@ static const int comis_eflags[4] =3D {CC_C, CC_Z, 0, = CC_Z | CC_P | CC_C}; =20 void helper_ucomiss(CPUX86State *env, Reg *d, Reg *s) { - int ret; + FloatRelation ret; float32 s0, s1; =20 s0 =3D d->ZMM_S(0); @@ -1042,7 +1042,7 @@ void helper_ucomiss(CPUX86State *env, Reg *d, Reg *s) =20 void helper_comiss(CPUX86State *env, Reg *d, Reg *s) { - int ret; + FloatRelation ret; float32 s0, s1; =20 s0 =3D d->ZMM_S(0); @@ -1053,7 +1053,7 @@ void helper_comiss(CPUX86State *env, Reg *d, Reg *s) =20 void helper_ucomisd(CPUX86State *env, Reg *d, Reg *s) { - int ret; + FloatRelation ret; float64 d0, d1; =20 d0 =3D d->ZMM_D(0); @@ -1064,7 +1064,7 @@ void helper_ucomisd(CPUX86State *env, Reg *d, Reg *s) =20 void helper_comisd(CPUX86State *env, Reg *d, Reg *s) { - int ret; + FloatRelation ret; float64 d0, d1; =20 d0 =3D d->ZMM_D(0); diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 93d8a03de6..60b9ae5f05 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -2848,8 +2848,8 @@ MINMAX(64, maxnummag, false, true, true) #undef MINMAX =20 /* Floating point compare */ -static int compare_floats(FloatParts a, FloatParts b, bool is_quiet, - float_status *s) +static FloatRelation compare_floats(FloatParts a, FloatParts b, bool is_qu= iet, + float_status *s) { if (is_nan(a.cls) || is_nan(b.cls)) { if (!is_quiet || @@ -2920,17 +2920,17 @@ COMPARE(soft_f64_compare, QEMU_SOFTFLOAT_ATTR, 64) =20 #undef COMPARE =20 -int float16_compare(float16 a, float16 b, float_status *s) +FloatRelation float16_compare(float16 a, float16 b, float_status *s) { return soft_f16_compare(a, b, false, s); } =20 -int float16_compare_quiet(float16 a, float16 b, float_status *s) +FloatRelation float16_compare_quiet(float16 a, float16 b, float_status *s) { return soft_f16_compare(a, b, true, s); } =20 -static int QEMU_FLATTEN +static FloatRelation QEMU_FLATTEN f32_compare(float32 xa, float32 xb, bool is_quiet, float_status *s) { union_float32 ua, ub; @@ -2959,17 +2959,17 @@ f32_compare(float32 xa, float32 xb, bool is_quiet, = float_status *s) return soft_f32_compare(ua.s, ub.s, is_quiet, s); } =20 -int float32_compare(float32 a, float32 b, float_status *s) +FloatRelation float32_compare(float32 a, float32 b, float_status *s) { return f32_compare(a, b, false, s); } =20 -int float32_compare_quiet(float32 a, float32 b, float_status *s) +FloatRelation float32_compare_quiet(float32 a, float32 b, float_status *s) { return f32_compare(a, b, true, s); } =20 -static int QEMU_FLATTEN +static FloatRelation QEMU_FLATTEN f64_compare(float64 xa, float64 xb, bool is_quiet, float_status *s) { union_float64 ua, ub; @@ -2998,12 +2998,12 @@ f64_compare(float64 xa, float64 xb, bool is_quiet, = float_status *s) return soft_f64_compare(ua.s, ub.s, is_quiet, s); } =20 -int float64_compare(float64 a, float64 b, float_status *s) +FloatRelation float64_compare(float64 a, float64 b, float_status *s) { return f64_compare(a, b, false, s); } =20 -int float64_compare_quiet(float64 a, float64 b, float_status *s) +FloatRelation float64_compare_quiet(float64 a, float64 b, float_status *s) { return f64_compare(a, b, true, s); } @@ -7892,8 +7892,9 @@ int float128_unordered_quiet(float128 a, float128 b, = float_status *status) return 0; } =20 -static inline int floatx80_compare_internal(floatx80 a, floatx80 b, - int is_quiet, float_status *st= atus) +static inline FloatRelation +floatx80_compare_internal(floatx80 a, floatx80 b, bool is_quiet, + float_status *status) { bool aSign, bSign; =20 @@ -7939,18 +7940,20 @@ static inline int floatx80_compare_internal(floatx8= 0 a, floatx80 b, } } =20 -int floatx80_compare(floatx80 a, floatx80 b, float_status *status) +FloatRelation floatx80_compare(floatx80 a, floatx80 b, float_status *statu= s) { return floatx80_compare_internal(a, b, 0, status); } =20 -int floatx80_compare_quiet(floatx80 a, floatx80 b, float_status *status) +FloatRelation floatx80_compare_quiet(floatx80 a, floatx80 b, + float_status *status) { return floatx80_compare_internal(a, b, 1, status); } =20 -static inline int float128_compare_internal(float128 a, float128 b, - int is_quiet, float_status *st= atus) +static inline FloatRelation +float128_compare_internal(float128 a, float128 b, bool is_quiet, + float_status *status) { bool aSign, bSign; =20 @@ -7983,12 +7986,13 @@ static inline int float128_compare_internal(float12= 8 a, float128 b, } } =20 -int float128_compare(float128 a, float128 b, float_status *status) +FloatRelation float128_compare(float128 a, float128 b, float_status *statu= s) { return float128_compare_internal(a, b, 0, status); } =20 -int float128_compare_quiet(float128 a, float128 b, float_status *status) +FloatRelation float128_compare_quiet(float128 a, float128 b, + float_status *status) { return float128_compare_internal(a, b, 1, status); } diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c index 0920694764..60dcd4bf14 100644 --- a/target/arm/vfp_helper.c +++ b/target/arm/vfp_helper.c @@ -281,7 +281,7 @@ float64 VFP_HELPER(sqrt, d)(float64 a, CPUARMState *env) return float64_sqrt(a, &env->vfp.fp_status); } =20 -static void softfloat_to_vfp_compare(CPUARMState *env, int cmp) +static void softfloat_to_vfp_compare(CPUARMState *env, FloatRelation cmp) { uint32_t flags; switch (cmp) { diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index 7823706e9c..5685e303ab 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -523,7 +523,8 @@ uint64_t HELPER(fcnv_t_d_udw)(CPUHPPAState *env, float6= 4 arg) return ret; } =20 -static void update_fr0_cmp(CPUHPPAState *env, uint32_t y, uint32_t c, int = r) +static void update_fr0_cmp(CPUHPPAState *env, uint32_t y, + uint32_t c, FloatRelation r) { uint32_t shadow =3D env->fr0_shadow; =20 @@ -565,7 +566,7 @@ static void update_fr0_cmp(CPUHPPAState *env, uint32_t = y, uint32_t c, int r) void HELPER(fcmp_s)(CPUHPPAState *env, float32 a, float32 b, uint32_t y, uint32_t c) { - int r; + FloatRelation r; if (c & 1) { r =3D float32_compare(a, b, &env->fp_status); } else { @@ -578,7 +579,7 @@ void HELPER(fcmp_s)(CPUHPPAState *env, float32 a, float= 32 b, void HELPER(fcmp_d)(CPUHPPAState *env, float64 a, float64 b, uint32_t y, uint32_t c) { - int r; + FloatRelation r; if (c & 1) { r =3D float64_compare(a, b, &env->fp_status); } else { diff --git a/target/i386/fpu_helper.c b/target/i386/fpu_helper.c index 792a128a6d..b34fa784eb 100644 --- a/target/i386/fpu_helper.c +++ b/target/i386/fpu_helper.c @@ -420,7 +420,7 @@ static const int fcom_ccval[4] =3D {0x0100, 0x4000, 0x0= 000, 0x4500}; =20 void helper_fcom_ST0_FT0(CPUX86State *env) { - int ret; + FloatRelation ret; =20 ret =3D floatx80_compare(ST0, FT0, &env->fp_status); env->fpus =3D (env->fpus & ~0x4500) | fcom_ccval[ret + 1]; @@ -428,7 +428,7 @@ void helper_fcom_ST0_FT0(CPUX86State *env) =20 void helper_fucom_ST0_FT0(CPUX86State *env) { - int ret; + FloatRelation ret; =20 ret =3D floatx80_compare_quiet(ST0, FT0, &env->fp_status); env->fpus =3D (env->fpus & ~0x4500) | fcom_ccval[ret + 1]; @@ -439,7 +439,7 @@ static const int fcomi_ccval[4] =3D {CC_C, CC_Z, 0, CC_= Z | CC_P | CC_C}; void helper_fcomi_ST0_FT0(CPUX86State *env) { int eflags; - int ret; + FloatRelation ret; =20 ret =3D floatx80_compare(ST0, FT0, &env->fp_status); eflags =3D cpu_cc_compute_all(env, CC_OP); @@ -450,7 +450,7 @@ void helper_fcomi_ST0_FT0(CPUX86State *env) void helper_fucomi_ST0_FT0(CPUX86State *env) { int eflags; - int ret; + FloatRelation ret; =20 ret =3D floatx80_compare_quiet(ST0, FT0, &env->fp_status); eflags =3D cpu_cc_compute_all(env, CC_OP); diff --git a/target/openrisc/fpu_helper.c b/target/openrisc/fpu_helper.c index 6f75ea0505..f9e34fa2cc 100644 --- a/target/openrisc/fpu_helper.c +++ b/target/openrisc/fpu_helper.c @@ -155,13 +155,13 @@ FLOAT_CMP(un, unordered_quiet) target_ulong helper_float_ ## name ## _d(CPUOpenRISCState *env, \ uint64_t fdt0, uint64_t fdt1) \ { \ - int r =3D float64_compare_quiet(fdt0, fdt1, &env->fp_status); = \ + FloatRelation r =3D float64_compare_quiet(fdt0, fdt1, &env->fp_status)= ; \ return expr; \ } \ target_ulong helper_float_ ## name ## _s(CPUOpenRISCState *env, \ uint32_t fdt0, uint32_t fdt1) \ { \ - int r =3D float32_compare_quiet(fdt0, fdt1, &env->fp_status); = \ + FloatRelation r =3D float32_compare_quiet(fdt0, fdt1, &env->fp_status)= ; \ return expr; \ } =20 diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index 6d238b989d..be53cd6f68 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -770,8 +770,9 @@ VCMPNE(w, u32, uint32_t, 0) \ for (i =3D 0; i < ARRAY_SIZE(r->f32); i++) { \ uint32_t result; \ - int rel =3D float32_compare_quiet(a->f32[i], b->f32[i], \ - &env->vec_status); \ + FloatRelation rel =3D \ + float32_compare_quiet(a->f32[i], b->f32[i], \ + &env->vec_status); \ if (rel =3D=3D float_relation_unordered) { = \ result =3D 0; \ } else if (rel compare order) { \ @@ -803,15 +804,15 @@ static inline void vcmpbfp_internal(CPUPPCState *env,= ppc_avr_t *r, int all_in =3D 0; =20 for (i =3D 0; i < ARRAY_SIZE(r->f32); i++) { - int le_rel =3D float32_compare_quiet(a->f32[i], b->f32[i], - &env->vec_status); + FloatRelation le_rel =3D float32_compare_quiet(a->f32[i], b->f32[i= ], + &env->vec_status); if (le_rel =3D=3D float_relation_unordered) { r->u32[i] =3D 0xc0000000; all_in =3D 1; } else { float32 bneg =3D float32_chs(b->f32[i]); - int ge_rel =3D float32_compare_quiet(a->f32[i], bneg, - &env->vec_status); + FloatRelation ge_rel =3D float32_compare_quiet(a->f32[i], bneg, + &env->vec_status); int le =3D le_rel !=3D float_relation_greater; int ge =3D ge_rel !=3D float_relation_less; =20 diff --git a/target/s390x/fpu_helper.c b/target/s390x/fpu_helper.c index 8bb9f54fd0..f155bc048c 100644 --- a/target/s390x/fpu_helper.c +++ b/target/s390x/fpu_helper.c @@ -112,7 +112,7 @@ static void handle_exceptions(CPUS390XState *env, bool = XxC, uintptr_t retaddr) } } =20 -int float_comp_to_cc(CPUS390XState *env, int float_compare) +int float_comp_to_cc(CPUS390XState *env, FloatRelation float_compare) { switch (float_compare) { case float_relation_equal: @@ -368,7 +368,7 @@ uint64_t HELPER(lexb)(CPUS390XState *env, uint64_t ah, = uint64_t al, /* 32-bit FP compare */ uint32_t HELPER(ceb)(CPUS390XState *env, uint64_t f1, uint64_t f2) { - int cmp =3D float32_compare_quiet(f1, f2, &env->fpu_status); + FloatRelation cmp =3D float32_compare_quiet(f1, f2, &env->fpu_status); handle_exceptions(env, false, GETPC()); return float_comp_to_cc(env, cmp); } @@ -376,7 +376,7 @@ uint32_t HELPER(ceb)(CPUS390XState *env, uint64_t f1, u= int64_t f2) /* 64-bit FP compare */ uint32_t HELPER(cdb)(CPUS390XState *env, uint64_t f1, uint64_t f2) { - int cmp =3D float64_compare_quiet(f1, f2, &env->fpu_status); + FloatRelation cmp =3D float64_compare_quiet(f1, f2, &env->fpu_status); handle_exceptions(env, false, GETPC()); return float_comp_to_cc(env, cmp); } @@ -385,9 +385,9 @@ uint32_t HELPER(cdb)(CPUS390XState *env, uint64_t f1, u= int64_t f2) uint32_t HELPER(cxb)(CPUS390XState *env, uint64_t ah, uint64_t al, uint64_t bh, uint64_t bl) { - int cmp =3D float128_compare_quiet(make_float128(ah, al), - make_float128(bh, bl), - &env->fpu_status); + FloatRelation cmp =3D float128_compare_quiet(make_float128(ah, al), + make_float128(bh, bl), + &env->fpu_status); handle_exceptions(env, false, GETPC()); return float_comp_to_cc(env, cmp); } @@ -675,7 +675,7 @@ uint64_t HELPER(fixb)(CPUS390XState *env, uint64_t ah, = uint64_t al, /* 32-bit FP compare and signal */ uint32_t HELPER(keb)(CPUS390XState *env, uint64_t f1, uint64_t f2) { - int cmp =3D float32_compare(f1, f2, &env->fpu_status); + FloatRelation cmp =3D float32_compare(f1, f2, &env->fpu_status); handle_exceptions(env, false, GETPC()); return float_comp_to_cc(env, cmp); } @@ -683,7 +683,7 @@ uint32_t HELPER(keb)(CPUS390XState *env, uint64_t f1, u= int64_t f2) /* 64-bit FP compare and signal */ uint32_t HELPER(kdb)(CPUS390XState *env, uint64_t f1, uint64_t f2) { - int cmp =3D float64_compare(f1, f2, &env->fpu_status); + FloatRelation cmp =3D float64_compare(f1, f2, &env->fpu_status); handle_exceptions(env, false, GETPC()); return float_comp_to_cc(env, cmp); } @@ -692,9 +692,9 @@ uint32_t HELPER(kdb)(CPUS390XState *env, uint64_t f1, u= int64_t f2) uint32_t HELPER(kxb)(CPUS390XState *env, uint64_t ah, uint64_t al, uint64_t bh, uint64_t bl) { - int cmp =3D float128_compare(make_float128(ah, al), - make_float128(bh, bl), - &env->fpu_status); + FloatRelation cmp =3D float128_compare(make_float128(ah, al), + make_float128(bh, bl), + &env->fpu_status); handle_exceptions(env, false, GETPC()); return float_comp_to_cc(env, cmp); } diff --git a/target/sparc/fop_helper.c b/target/sparc/fop_helper.c index 9eb9b75718..e6dd3fc313 100644 --- a/target/sparc/fop_helper.c +++ b/target/sparc/fop_helper.c @@ -264,7 +264,7 @@ void helper_fsqrtq(CPUSPARCState *env) #define GEN_FCMP(name, size, reg1, reg2, FS, E) \ target_ulong glue(helper_, name) (CPUSPARCState *env) \ { \ - int ret; \ + FloatRelation ret; \ target_ulong fsr; \ if (E) { \ ret =3D glue(size, _compare)(reg1, reg2, &env->fp_status); \ @@ -295,7 +295,7 @@ void helper_fsqrtq(CPUSPARCState *env) #define GEN_FCMP_T(name, size, FS, E) \ target_ulong glue(helper_, name)(CPUSPARCState *env, size src1, size s= rc2)\ { \ - int ret; \ + FloatRelation ret; \ target_ulong fsr; \ if (E) { \ ret =3D glue(size, _compare)(src1, src2, &env->fp_status); \ diff --git a/target/unicore32/ucf64_helper.c b/target/unicore32/ucf64_helpe= r.c index e078e84437..12a91900f6 100644 --- a/target/unicore32/ucf64_helper.c +++ b/target/unicore32/ucf64_helper.c @@ -174,8 +174,7 @@ float64 HELPER(ucf64_absd)(float64 a) void HELPER(ucf64_cmps)(float32 a, float32 b, uint32_t c, CPUUniCore32State *env) { - int flag; - flag =3D float32_compare_quiet(a, b, &env->ucf64.fp_status); + FloatRelation flag =3D float32_compare_quiet(a, b, &env->ucf64.fp_stat= us); env->CF =3D 0; switch (c & 0x7) { case 0: /* F */ @@ -223,8 +222,7 @@ void HELPER(ucf64_cmps)(float32 a, float32 b, uint32_t = c, void HELPER(ucf64_cmpd)(float64 a, float64 b, uint32_t c, CPUUniCore32State *env) { - int flag; - flag =3D float64_compare_quiet(a, b, &env->ucf64.fp_status); + FloatRelation flag =3D float64_compare_quiet(a, b, &env->ucf64.fp_stat= us); env->CF =3D 0; switch (c & 0x7) { case 0: /* F */ diff --git a/target/xtensa/fpu_helper.c b/target/xtensa/fpu_helper.c index f8bbb6cdd8..87487293f9 100644 --- a/target/xtensa/fpu_helper.c +++ b/target/xtensa/fpu_helper.c @@ -139,7 +139,7 @@ void HELPER(oeq_s)(CPUXtensaState *env, uint32_t br, fl= oat32 a, float32 b) =20 void HELPER(ueq_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b) { - int v =3D float32_compare_quiet(a, b, &env->fp_status); + FloatRelation v =3D float32_compare_quiet(a, b, &env->fp_status); set_br(env, v =3D=3D float_relation_equal || v =3D=3D float_relation_u= nordered, br); } =20 @@ -150,7 +150,7 @@ void HELPER(olt_s)(CPUXtensaState *env, uint32_t br, fl= oat32 a, float32 b) =20 void HELPER(ult_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b) { - int v =3D float32_compare_quiet(a, b, &env->fp_status); + FloatRelation v =3D float32_compare_quiet(a, b, &env->fp_status); set_br(env, v =3D=3D float_relation_less || v =3D=3D float_relation_un= ordered, br); } =20 @@ -161,6 +161,6 @@ void HELPER(ole_s)(CPUXtensaState *env, uint32_t br, fl= oat32 a, float32 b) =20 void HELPER(ule_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b) { - int v =3D float32_compare_quiet(a, b, &env->fp_status); + FloatRelation v =3D float32_compare_quiet(a, b, &env->fp_status); set_br(env, v !=3D float_relation_greater, br); } --=20 2.20.1 From nobody Sun May 19 18:35:16 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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[174.21.143.238]) by smtp.gmail.com with ESMTPSA id q21sm2485719pfg.131.2020.05.15.12.02.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 May 2020 12:02:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xwz/crxYugQcXT51GmixlbDw5UMQQM60RRtK6DQvNo4=; b=XVUvL03JUcHum8mka0olkzlVykqEGJMR1/dlr+MEUjzETfAQNLZjiCk0+2Kgaa8/od ZghpJBQ1qcMMUDiVIXEH/OYC+LPXVqF4DIgAxPEcUdYGQri5lWTiARkNmLkTWQoTfA+W iUfuS9/piOMMl6iRiMwPe4wwau7xDirENi92RJTbIG9mv3aaJl17sNdN0yW+J0bqZnTl APLV6zuevN6+Hjt6C1UL1+1I4PoGgQXSbewyUA3kVPvY55Kdg9x6aRO0xJCjqGYOtFXs w/TW8Z41Owm5ZnyEkOAxC4OiZJyKQl3cLCmZA3+HViW3mjrADgF+PsY0VtjeostppE9K jwQQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xwz/crxYugQcXT51GmixlbDw5UMQQM60RRtK6DQvNo4=; b=KCSKK96ryY2syaTngPz5B7db033VS/sk2/hYH2W1Qv7Fxe9H/3Q7I8t73/msWpvUBE 8LsU/wLwEHinpV+NiZ60L9iC77w2JysRD4NdPPEd0al8ZMADEnXunhw3haWYqyVH8UfO hSrVwLvCUgT3KnBnUerZWo2YMlMsvdoRgun4P6XxXGCjj7YNlcyBBHwsa8u9gu+epBQ6 Hz7cVVuwaZm+lAslZEfi/T08o/GD9arPtbMULhw5PG1RK2vDPswzwq60GzAXP8Wz1L/O 745/p/JrFCj/5Tecy9N0TUTkj6bvC+P1vxMYdpHZ8CoFdXJPcolqGLAQaZ3NQVGTjnJX Pu6g== X-Gm-Message-State: AOAM530cUaahWzt0SpXKUgAgRmQs87z7BoCxe1JToU05EzdzfwrCvN/M VDMNPyq0qoZxoSGB/p83fZRJcNOEeu8= X-Google-Smtp-Source: ABdhPJx7SD5InZjkX0rVlYYF30Mh4/lV7S/B7uAZl5QCmV36o9Q3IKqglZKinEgl0Bj6+YlT2m0mSA== X-Received: by 2002:a65:6094:: with SMTP id t20mr4636711pgu.220.1589569323935; Fri, 15 May 2020 12:02:03 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 06/10] softfloat: Inline float32 compare specializations Date: Fri, 15 May 2020 12:01:49 -0700 Message-Id: <20200515190153.6017-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200515190153.6017-1-richard.henderson@linaro.org> References: <20200515190153.6017-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::544; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x544.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Replace the float32 compare specializations with inline functions that call the standard float32_compare{,_quiet} functions. Use bool as the return type. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- include/fpu/softfloat.h | 49 +++++++-- fpu/softfloat.c | 216 ---------------------------------------- 2 files changed, 41 insertions(+), 224 deletions(-) diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 7f84235122..4d1af6ab45 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -343,14 +343,6 @@ float32 float32_muladd(float32, float32, float32, int,= float_status *status); float32 float32_sqrt(float32, float_status *status); float32 float32_exp2(float32, float_status *status); float32 float32_log2(float32, float_status *status); -int float32_eq(float32, float32, float_status *status); -int float32_le(float32, float32, float_status *status); -int float32_lt(float32, float32, float_status *status); -int float32_unordered(float32, float32, float_status *status); -int float32_eq_quiet(float32, float32, float_status *status); -int float32_le_quiet(float32, float32, float_status *status); -int float32_lt_quiet(float32, float32, float_status *status); -int float32_unordered_quiet(float32, float32, float_status *status); FloatRelation float32_compare(float32, float32, float_status *status); FloatRelation float32_compare_quiet(float32, float32, float_status *status= ); float32 float32_min(float32, float32, float_status *status); @@ -425,6 +417,47 @@ static inline float32 float32_set_sign(float32 a, int = sign) return make_float32((float32_val(a) & 0x7fffffff) | (sign << 31)); } =20 +static inline bool float32_eq(float32 a, float32 b, float_status *s) +{ + return float32_compare(a, b, s) =3D=3D float_relation_equal; +} + +static inline bool float32_le(float32 a, float32 b, float_status *s) +{ + return float32_compare(a, b, s) <=3D float_relation_equal; +} + +static inline bool float32_lt(float32 a, float32 b, float_status *s) +{ + return float32_compare(a, b, s) < float_relation_equal; +} + +static inline bool float32_unordered(float32 a, float32 b, float_status *s) +{ + return float32_compare(a, b, s) =3D=3D float_relation_unordered; +} + +static inline bool float32_eq_quiet(float32 a, float32 b, float_status *s) +{ + return float32_compare_quiet(a, b, s) =3D=3D float_relation_equal; +} + +static inline bool float32_le_quiet(float32 a, float32 b, float_status *s) +{ + return float32_compare_quiet(a, b, s) <=3D float_relation_equal; +} + +static inline bool float32_lt_quiet(float32 a, float32 b, float_status *s) +{ + return float32_compare_quiet(a, b, s) < float_relation_equal; +} + +static inline bool float32_unordered_quiet(float32 a, float32 b, + float_status *s) +{ + return float32_compare_quiet(a, b, s) =3D=3D float_relation_unordered; +} + #define float32_zero make_float32(0) #define float32_half make_float32(0x3f000000) #define float32_one make_float32(0x3f800000) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 60b9ae5f05..f6bfc40c97 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -4733,222 +4733,6 @@ float32 float32_log2(float32 a, float_status *statu= s) return normalizeRoundAndPackFloat32(zSign, 0x85, zSig, status); } =20 -/*------------------------------------------------------------------------= ---- -| Returns 1 if the single-precision floating-point value `a' is equal to -| the corresponding value `b', and 0 otherwise. The invalid exception is -| raised if either operand is a NaN. Otherwise, the comparison is perform= ed -| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float32_eq(float32 a, float32 b, float_status *status) -{ - uint32_t av, bv; - a =3D float32_squash_input_denormal(a, status); - b =3D float32_squash_input_denormal(b, status); - - if ( ( ( extractFloat32Exp( a ) =3D=3D 0xFF ) && extractFloat32Frac= ( a ) ) - || ( ( extractFloat32Exp( b ) =3D=3D 0xFF ) && extractFloat32Frac= ( b ) ) - ) { - float_raise(float_flag_invalid, status); - return 0; - } - av =3D float32_val(a); - bv =3D float32_val(b); - return ( av =3D=3D bv ) || ( (uint32_t) ( ( av | bv )<<1 ) =3D=3D 0 ); -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the single-precision floating-point value `a' is less than -| or equal to the corresponding value `b', and 0 otherwise. The invalid -| exception is raised if either operand is a NaN. The comparison is perfo= rmed -| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float32_le(float32 a, float32 b, float_status *status) -{ - bool aSign, bSign; - uint32_t av, bv; - a =3D float32_squash_input_denormal(a, status); - b =3D float32_squash_input_denormal(b, status); - - if ( ( ( extractFloat32Exp( a ) =3D=3D 0xFF ) && extractFloat32Frac= ( a ) ) - || ( ( extractFloat32Exp( b ) =3D=3D 0xFF ) && extractFloat32Frac= ( b ) ) - ) { - float_raise(float_flag_invalid, status); - return 0; - } - aSign =3D extractFloat32Sign( a ); - bSign =3D extractFloat32Sign( b ); - av =3D float32_val(a); - bv =3D float32_val(b); - if ( aSign !=3D bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 = ) =3D=3D 0 ); - return ( av =3D=3D bv ) || ( aSign ^ ( av < bv ) ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the single-precision floating-point value `a' is less than -| the corresponding value `b', and 0 otherwise. The invalid exception is -| raised if either operand is a NaN. The comparison is performed according -| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float32_lt(float32 a, float32 b, float_status *status) -{ - bool aSign, bSign; - uint32_t av, bv; - a =3D float32_squash_input_denormal(a, status); - b =3D float32_squash_input_denormal(b, status); - - if ( ( ( extractFloat32Exp( a ) =3D=3D 0xFF ) && extractFloat32Frac= ( a ) ) - || ( ( extractFloat32Exp( b ) =3D=3D 0xFF ) && extractFloat32Frac= ( b ) ) - ) { - float_raise(float_flag_invalid, status); - return 0; - } - aSign =3D extractFloat32Sign( a ); - bSign =3D extractFloat32Sign( b ); - av =3D float32_val(a); - bv =3D float32_val(b); - if ( aSign !=3D bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 = ) !=3D 0 ); - return ( av !=3D bv ) && ( aSign ^ ( av < bv ) ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the single-precision floating-point values `a' and `b' cann= ot -| be compared, and 0 otherwise. The invalid exception is raised if either -| operand is a NaN. The comparison is performed according to the IEC/IEEE -| Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float32_unordered(float32 a, float32 b, float_status *status) -{ - a =3D float32_squash_input_denormal(a, status); - b =3D float32_squash_input_denormal(b, status); - - if ( ( ( extractFloat32Exp( a ) =3D=3D 0xFF ) && extractFloat32Frac= ( a ) ) - || ( ( extractFloat32Exp( b ) =3D=3D 0xFF ) && extractFloat32Frac= ( b ) ) - ) { - float_raise(float_flag_invalid, status); - return 1; - } - return 0; -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the single-precision floating-point value `a' is equal to -| the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an -| exception. The comparison is performed according to the IEC/IEEE Standa= rd -| for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float32_eq_quiet(float32 a, float32 b, float_status *status) -{ - a =3D float32_squash_input_denormal(a, status); - b =3D float32_squash_input_denormal(b, status); - - if ( ( ( extractFloat32Exp( a ) =3D=3D 0xFF ) && extractFloat32Frac= ( a ) ) - || ( ( extractFloat32Exp( b ) =3D=3D 0xFF ) && extractFloat32Frac= ( b ) ) - ) { - if (float32_is_signaling_nan(a, status) - || float32_is_signaling_nan(b, status)) { - float_raise(float_flag_invalid, status); - } - return 0; - } - return ( float32_val(a) =3D=3D float32_val(b) ) || - ( (uint32_t) ( ( float32_val(a) | float32_val(b) )<<1 ) =3D=3D= 0 ); -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the single-precision floating-point value `a' is less than = or -| equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do not -| cause an exception. Otherwise, the comparison is performed according to= the -| IEC/IEEE Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float32_le_quiet(float32 a, float32 b, float_status *status) -{ - bool aSign, bSign; - uint32_t av, bv; - a =3D float32_squash_input_denormal(a, status); - b =3D float32_squash_input_denormal(b, status); - - if ( ( ( extractFloat32Exp( a ) =3D=3D 0xFF ) && extractFloat32Frac= ( a ) ) - || ( ( extractFloat32Exp( b ) =3D=3D 0xFF ) && extractFloat32Frac= ( b ) ) - ) { - if (float32_is_signaling_nan(a, status) - || float32_is_signaling_nan(b, status)) { - float_raise(float_flag_invalid, status); - } - return 0; - } - aSign =3D extractFloat32Sign( a ); - bSign =3D extractFloat32Sign( b ); - av =3D float32_val(a); - bv =3D float32_val(b); - if ( aSign !=3D bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 = ) =3D=3D 0 ); - return ( av =3D=3D bv ) || ( aSign ^ ( av < bv ) ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the single-precision floating-point value `a' is less than -| the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an -| exception. Otherwise, the comparison is performed according to the IEC/= IEEE -| Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float32_lt_quiet(float32 a, float32 b, float_status *status) -{ - bool aSign, bSign; - uint32_t av, bv; - a =3D float32_squash_input_denormal(a, status); - b =3D float32_squash_input_denormal(b, status); - - if ( ( ( extractFloat32Exp( a ) =3D=3D 0xFF ) && extractFloat32Frac= ( a ) ) - || ( ( extractFloat32Exp( b ) =3D=3D 0xFF ) && extractFloat32Frac= ( b ) ) - ) { - if (float32_is_signaling_nan(a, status) - || float32_is_signaling_nan(b, status)) { - float_raise(float_flag_invalid, status); - } - return 0; - } - aSign =3D extractFloat32Sign( a ); - bSign =3D extractFloat32Sign( b ); - av =3D float32_val(a); - bv =3D float32_val(b); - if ( aSign !=3D bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 = ) !=3D 0 ); - return ( av !=3D bv ) && ( aSign ^ ( av < bv ) ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the single-precision floating-point values `a' and `b' cann= ot -| be compared, and 0 otherwise. Quiet NaNs do not cause an exception. The -| comparison is performed according to the IEC/IEEE Standard for Binary -| Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float32_unordered_quiet(float32 a, float32 b, float_status *status) -{ - a =3D float32_squash_input_denormal(a, status); - b =3D float32_squash_input_denormal(b, status); - - if ( ( ( extractFloat32Exp( a ) =3D=3D 0xFF ) && extractFloat32Frac= ( a ) ) - || ( ( extractFloat32Exp( b ) =3D=3D 0xFF ) && extractFloat32Frac= ( b ) ) - ) { - if (float32_is_signaling_nan(a, status) - || float32_is_signaling_nan(b, status)) { - float_raise(float_flag_invalid, status); - } - return 1; - } - return 0; -} - /*------------------------------------------------------------------------= ---- | Returns the result of converting the double-precision floating-point val= ue | `a' to the extended double-precision floating-point format. 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[174.21.143.238]) by smtp.gmail.com with ESMTPSA id q21sm2485719pfg.131.2020.05.15.12.02.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 May 2020 12:02:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=XDeOnUBeQB6vCo/YF/ARDtEa+KRpUTozskIBt7ZGJCA=; b=cRdl2Oyyi6dLWF3aweBcnM0TAbg44ZlE0XKOEki8DCxZzFymPvDUzqqoQ6Ejwh9uQK ORuHN3lpelrEXeqSkMSIqnqOwhsgD3U9YNhv2pRzRMHOegxHUfaIe9/gcSeoM8ow6LBK fp6v8oTUldDdu4XUFC+BPLqwqBbFikeqPKS4eyl/IhJU+BbjD37SZ7D7od7M99vk3fQg CG7jYJsNz66NM8ms0q1I3USXKWSz5rAFgPzsl+kKcbozGtpjuxFmFl6JgxkCjUnx6maa DvvFSFbV+dkqvOxLKEhzDtvPHD+YJUHBiT7ZYqZSMcSObtkaaAFD3BNoqSJINJLoiuKF njgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XDeOnUBeQB6vCo/YF/ARDtEa+KRpUTozskIBt7ZGJCA=; b=gB4fDIYRmLCf1+mxjNZ+r3eEIQHwizH+b7EEL105YvecD1OJvD90jBqYUasxwdyDKR R9nEnwrCvcOv5dOFsOx55rjAoDFat1kn/rK9WLxzqHK9Ra1Za0a1QcfN62LCYM1/67aU hm5ItbrgPEl3ruL6bK8FcolchX+in+Fg0KhMJiCmCPtxaNL/c/o8w0voHN1/cz+lmBGi cGQFNFW/p9Rdp6ylhZCACCs/uW5yndOgMCuoTgqasez1m1ok3GCSf2tMfxWCC4Y6XwX9 l3boFW81fI0sINy3DzjphEIKM0547pcy+NaC9lIY1RQ8VB1d1tRMW5lUyyoHoBn9+OSu vgaw== X-Gm-Message-State: AOAM532b+4e1MIF8K1RVKS9WKVIKPoTbjFDML0NWvu/pYqaH8pHIvz5J 9IrNjxpnEijxT5MJt6MvoLw1+a1ZCKk= X-Google-Smtp-Source: ABdhPJz0pdAb2xNEvj4Dej4Iywz1XwNUAjBTKB3d/WdWMK57Zu7i4LV9y4dqPdfEOYy9q9n7MfNFWA== X-Received: by 2002:a17:902:c214:: with SMTP id 20mr5050125pll.17.1589569324857; Fri, 15 May 2020 12:02:04 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 07/10] softfloat: Inline float64 compare specializations Date: Fri, 15 May 2020 12:01:50 -0700 Message-Id: <20200515190153.6017-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200515190153.6017-1-richard.henderson@linaro.org> References: <20200515190153.6017-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1043; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1043.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Replace the float64 compare specializations with inline functions that call the standard float64_compare{,_quiet} functions. Use bool as the return type. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- include/fpu/softfloat.h | 49 ++++++-- fpu/softfloat.c | 220 ---------------------------------- target/s390x/vec_fpu_helper.c | 2 +- 3 files changed, 42 insertions(+), 229 deletions(-) diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 4d1af6ab45..281f0fd971 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -532,14 +532,6 @@ float64 float64_rem(float64, float64, float_status *st= atus); float64 float64_muladd(float64, float64, float64, int, float_status *statu= s); float64 float64_sqrt(float64, float_status *status); float64 float64_log2(float64, float_status *status); -int float64_eq(float64, float64, float_status *status); -int float64_le(float64, float64, float_status *status); -int float64_lt(float64, float64, float_status *status); -int float64_unordered(float64, float64, float_status *status); -int float64_eq_quiet(float64, float64, float_status *status); -int float64_le_quiet(float64, float64, float_status *status); -int float64_lt_quiet(float64, float64, float_status *status); -int float64_unordered_quiet(float64, float64, float_status *status); FloatRelation float64_compare(float64, float64, float_status *status); FloatRelation float64_compare_quiet(float64, float64, float_status *status= ); float64 float64_min(float64, float64, float_status *status); @@ -615,6 +607,47 @@ static inline float64 float64_set_sign(float64 a, int = sign) | ((int64_t)sign << 63)); } =20 +static inline bool float64_eq(float64 a, float64 b, float_status *s) +{ + return float64_compare(a, b, s) =3D=3D float_relation_equal; +} + +static inline bool float64_le(float64 a, float64 b, float_status *s) +{ + return float64_compare(a, b, s) <=3D float_relation_equal; +} + +static inline bool float64_lt(float64 a, float64 b, float_status *s) +{ + return float64_compare(a, b, s) < float_relation_equal; +} + +static inline bool float64_unordered(float64 a, float64 b, float_status *s) +{ + return float64_compare(a, b, s) =3D=3D float_relation_unordered; +} + +static inline bool float64_eq_quiet(float64 a, float64 b, float_status *s) +{ + return float64_compare_quiet(a, b, s) =3D=3D float_relation_equal; +} + +static inline bool float64_le_quiet(float64 a, float64 b, float_status *s) +{ + return float64_compare_quiet(a, b, s) <=3D float_relation_equal; +} + +static inline bool float64_lt_quiet(float64 a, float64 b, float_status *s) +{ + return float64_compare_quiet(a, b, s) < float_relation_equal; +} + +static inline bool float64_unordered_quiet(float64 a, float64 b, + float_status *s) +{ + return float64_compare_quiet(a, b, s) =3D=3D float_relation_unordered; +} + #define float64_zero make_float64(0) #define float64_half make_float64(0x3fe0000000000000LL) #define float64_one make_float64(0x3ff0000000000000LL) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index f6bfc40c97..5d7fc2c17a 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -4941,226 +4941,6 @@ float64 float64_log2(float64 a, float_status *statu= s) return normalizeRoundAndPackFloat64(zSign, 0x408, zSig, status); } =20 -/*------------------------------------------------------------------------= ---- -| Returns 1 if the double-precision floating-point value `a' is equal to t= he -| corresponding value `b', and 0 otherwise. The invalid exception is rais= ed -| if either operand is a NaN. Otherwise, the comparison is performed -| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float64_eq(float64 a, float64 b, float_status *status) -{ - uint64_t av, bv; - a =3D float64_squash_input_denormal(a, status); - b =3D float64_squash_input_denormal(b, status); - - if ( ( ( extractFloat64Exp( a ) =3D=3D 0x7FF ) && extractFloat64Fra= c( a ) ) - || ( ( extractFloat64Exp( b ) =3D=3D 0x7FF ) && extractFloat64Fra= c( b ) ) - ) { - float_raise(float_flag_invalid, status); - return 0; - } - av =3D float64_val(a); - bv =3D float64_val(b); - return ( av =3D=3D bv ) || ( (uint64_t) ( ( av | bv )<<1 ) =3D=3D 0 ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the double-precision floating-point value `a' is less than = or -| equal to the corresponding value `b', and 0 otherwise. The invalid -| exception is raised if either operand is a NaN. The comparison is perfo= rmed -| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float64_le(float64 a, float64 b, float_status *status) -{ - bool aSign, bSign; - uint64_t av, bv; - a =3D float64_squash_input_denormal(a, status); - b =3D float64_squash_input_denormal(b, status); - - if ( ( ( extractFloat64Exp( a ) =3D=3D 0x7FF ) && extractFloat64Fra= c( a ) ) - || ( ( extractFloat64Exp( b ) =3D=3D 0x7FF ) && extractFloat64Fra= c( b ) ) - ) { - float_raise(float_flag_invalid, status); - return 0; - } - aSign =3D extractFloat64Sign( a ); - bSign =3D extractFloat64Sign( b ); - av =3D float64_val(a); - bv =3D float64_val(b); - if ( aSign !=3D bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 = ) =3D=3D 0 ); - return ( av =3D=3D bv ) || ( aSign ^ ( av < bv ) ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the double-precision floating-point value `a' is less than -| the corresponding value `b', and 0 otherwise. The invalid exception is -| raised if either operand is a NaN. The comparison is performed according -| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float64_lt(float64 a, float64 b, float_status *status) -{ - bool aSign, bSign; - uint64_t av, bv; - - a =3D float64_squash_input_denormal(a, status); - b =3D float64_squash_input_denormal(b, status); - if ( ( ( extractFloat64Exp( a ) =3D=3D 0x7FF ) && extractFloat64Fra= c( a ) ) - || ( ( extractFloat64Exp( b ) =3D=3D 0x7FF ) && extractFloat64Fra= c( b ) ) - ) { - float_raise(float_flag_invalid, status); - return 0; - } - aSign =3D extractFloat64Sign( a ); - bSign =3D extractFloat64Sign( b ); - av =3D float64_val(a); - bv =3D float64_val(b); - if ( aSign !=3D bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 = ) !=3D 0 ); - return ( av !=3D bv ) && ( aSign ^ ( av < bv ) ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the double-precision floating-point values `a' and `b' cann= ot -| be compared, and 0 otherwise. The invalid exception is raised if either -| operand is a NaN. The comparison is performed according to the IEC/IEEE -| Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float64_unordered(float64 a, float64 b, float_status *status) -{ - a =3D float64_squash_input_denormal(a, status); - b =3D float64_squash_input_denormal(b, status); - - if ( ( ( extractFloat64Exp( a ) =3D=3D 0x7FF ) && extractFloat64Fra= c( a ) ) - || ( ( extractFloat64Exp( b ) =3D=3D 0x7FF ) && extractFloat64Fra= c( b ) ) - ) { - float_raise(float_flag_invalid, status); - return 1; - } - return 0; -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the double-precision floating-point value `a' is equal to t= he -| corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an -| exception.The comparison is performed according to the IEC/IEEE Standard -| for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float64_eq_quiet(float64 a, float64 b, float_status *status) -{ - uint64_t av, bv; - a =3D float64_squash_input_denormal(a, status); - b =3D float64_squash_input_denormal(b, status); - - if ( ( ( extractFloat64Exp( a ) =3D=3D 0x7FF ) && extractFloat64Fra= c( a ) ) - || ( ( extractFloat64Exp( b ) =3D=3D 0x7FF ) && extractFloat64Fra= c( b ) ) - ) { - if (float64_is_signaling_nan(a, status) - || float64_is_signaling_nan(b, status)) { - float_raise(float_flag_invalid, status); - } - return 0; - } - av =3D float64_val(a); - bv =3D float64_val(b); - return ( av =3D=3D bv ) || ( (uint64_t) ( ( av | bv )<<1 ) =3D=3D 0 ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the double-precision floating-point value `a' is less than = or -| equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do not -| cause an exception. Otherwise, the comparison is performed according to= the -| IEC/IEEE Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float64_le_quiet(float64 a, float64 b, float_status *status) -{ - bool aSign, bSign; - uint64_t av, bv; - a =3D float64_squash_input_denormal(a, status); - b =3D float64_squash_input_denormal(b, status); - - if ( ( ( extractFloat64Exp( a ) =3D=3D 0x7FF ) && extractFloat64Fra= c( a ) ) - || ( ( extractFloat64Exp( b ) =3D=3D 0x7FF ) && extractFloat64Fra= c( b ) ) - ) { - if (float64_is_signaling_nan(a, status) - || float64_is_signaling_nan(b, status)) { - float_raise(float_flag_invalid, status); - } - return 0; - } - aSign =3D extractFloat64Sign( a ); - bSign =3D extractFloat64Sign( b ); - av =3D float64_val(a); - bv =3D float64_val(b); - if ( aSign !=3D bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 = ) =3D=3D 0 ); - return ( av =3D=3D bv ) || ( aSign ^ ( av < bv ) ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the double-precision floating-point value `a' is less than -| the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an -| exception. Otherwise, the comparison is performed according to the IEC/= IEEE -| Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float64_lt_quiet(float64 a, float64 b, float_status *status) -{ - bool aSign, bSign; - uint64_t av, bv; - a =3D float64_squash_input_denormal(a, status); - b =3D float64_squash_input_denormal(b, status); - - if ( ( ( extractFloat64Exp( a ) =3D=3D 0x7FF ) && extractFloat64Fra= c( a ) ) - || ( ( extractFloat64Exp( b ) =3D=3D 0x7FF ) && extractFloat64Fra= c( b ) ) - ) { - if (float64_is_signaling_nan(a, status) - || float64_is_signaling_nan(b, status)) { - float_raise(float_flag_invalid, status); - } - return 0; - } - aSign =3D extractFloat64Sign( a ); - bSign =3D extractFloat64Sign( b ); - av =3D float64_val(a); - bv =3D float64_val(b); - if ( aSign !=3D bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 = ) !=3D 0 ); - return ( av !=3D bv ) && ( aSign ^ ( av < bv ) ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the double-precision floating-point values `a' and `b' cann= ot -| be compared, and 0 otherwise. Quiet NaNs do not cause an exception. The -| comparison is performed according to the IEC/IEEE Standard for Binary -| Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float64_unordered_quiet(float64 a, float64 b, float_status *status) -{ - a =3D float64_squash_input_denormal(a, status); - b =3D float64_squash_input_denormal(b, status); - - if ( ( ( extractFloat64Exp( a ) =3D=3D 0x7FF ) && extractFloat64Fra= c( a ) ) - || ( ( extractFloat64Exp( b ) =3D=3D 0x7FF ) && extractFloat64Fra= c( b ) ) - ) { - if (float64_is_signaling_nan(a, status) - || float64_is_signaling_nan(b, status)) { - float_raise(float_flag_invalid, status); - } - return 1; - } - return 0; -} - /*------------------------------------------------------------------------= ---- | Returns the result of converting the extended double-precision floating- | point value `a' to the 32-bit two's complement integer format. The diff --git a/target/s390x/vec_fpu_helper.c b/target/s390x/vec_fpu_helper.c index a48bd704bc..c1564e819b 100644 --- a/target/s390x/vec_fpu_helper.c +++ b/target/s390x/vec_fpu_helper.c @@ -174,7 +174,7 @@ void HELPER(gvec_wfk64)(const void *v1, const void *v2,= CPUS390XState *env, env->cc_op =3D wfc64(v1, v2, env, true, GETPC()); } =20 -typedef int (*vfc64_fn)(float64 a, float64 b, float_status *status); +typedef bool (*vfc64_fn)(float64 a, float64 b, float_status *status); static int vfc64(S390Vector *v1, const S390Vector *v2, const S390Vector *v= 3, CPUS390XState *env, bool s, vfc64_fn fn, uintptr_t retadd= r) { --=20 2.20.1 From nobody Sun May 19 18:35:16 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589569829; cv=none; d=zohomail.com; s=zohoarc; b=ORIAEeNnJtdY5P85zKmhEAsnUMJuTzWFqI8G4fluO3hA0ZYYXyGe4F6hRK57sS6clSf4cQRKWEGljPL0koAWW/lb8j0+lqHgFVdNqa5AvdYGL/4dL9qttroQni+GCwof3Qy8TJwEziKCZUu7LnBcqBcH59uvCFYlChCtsnXkCQY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589569829; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=uqPX34Y2xYCeaTCM4tOC/EtcK+8f3Xuhtp9sJmjWnMU=; b=f5TW/sjieuVsBCEiTMpvb7LOWmz4+KVRoUv6CUvjak0rW68eB9NC9LnuHyKhv4QtcrcACAgqaNoR3rivyGxpegpjrWV+HCbtCdYCCMoWt+/y2ec+6ahj1YpS8e8DOjxFC/lCt7+l2A4ACOKW/zi820iwRh4hgx+VuryOQdb3lDM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589569829446763.9854754075483; Fri, 15 May 2020 12:10:29 -0700 (PDT) Received: from localhost ([::1]:57706 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jZfj2-0005rn-4H for importer@patchew.org; Fri, 15 May 2020 15:10:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55882) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jZfaz-0001nK-QE for qemu-devel@nongnu.org; Fri, 15 May 2020 15:02:09 -0400 Received: from mail-pj1-x1041.google.com ([2607:f8b0:4864:20::1041]:50621) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jZfay-0001q2-Cf for qemu-devel@nongnu.org; Fri, 15 May 2020 15:02:09 -0400 Received: by mail-pj1-x1041.google.com with SMTP id t9so1315398pjw.0 for ; Fri, 15 May 2020 12:02:07 -0700 (PDT) Received: from localhost.localdomain (174-21-143-238.tukw.qwest.net. [174.21.143.238]) by smtp.gmail.com with ESMTPSA id q21sm2485719pfg.131.2020.05.15.12.02.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 May 2020 12:02:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=uqPX34Y2xYCeaTCM4tOC/EtcK+8f3Xuhtp9sJmjWnMU=; b=jb5ku57gR8/Yjp+yY8uLApUIyGNzX95m8V58Ohakr3lGKSQRNNNbQp8rJfbVDsQWo/ RQYL1YNu5Skymruqzql+oNooX18kGtp3CEyQsl1/K28n5CRMz/gDk3rVoG7wK/LLp34K C3CZprmJlCCr5z9pXNF4x2SVbe+qq2QH3Qa2KLMHlqU5bOrHsQRtp5CAyLvn/L7uJyMW QSX0W2p19ysb+TaVLWRmCJj8I4YgClq5QcwmOosFTSS2iZRUpzRJUAO9sbEzZtxJd1Wy RXp52+1F638U08CP+kKRdVh1kqSPwyPM3MckZH5YicXT+bzs44HqKQlttm7zsl37I3tc uuRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=uqPX34Y2xYCeaTCM4tOC/EtcK+8f3Xuhtp9sJmjWnMU=; b=iEfCowuP178c/0Yaq7LILrcu1GC217AKMcy81OzxdTjbu4VJy2NKX8Fcei5jZh9bZp +WAI0bB2OWiqNf2tUSbFfuC5YdPhTKGphsWq1uMmEOfMmIgQIx4dDlER5pACWaMsyXfu kpXBaIqZe7eIJP6qz1w4ofkw5Z51CTNQAOVFtvyilubqM/B3iyrRioyMns4tva4NNl64 OC+MsaKBeBRunoEtQWuqvmoC1Jk0Rr/Quo86I+f++K3ctQyLyY9/BduJUvuuksS/65BE mmu/HSvIIE16jFfWUNZ52P7gAwI516Rv7uT8yIpFUC7HhBppolCKcc+knoAbj/A8ctNl q8Ew== X-Gm-Message-State: AOAM532y1TTzjeS1/oYhxbKUiRUqO3GoSd8vPf9O/vB4tq1F2pAzuzKG v0y0R5tKU6hf267EldAR9uX+D8voiO4= X-Google-Smtp-Source: ABdhPJzQaTGEfJYiDSIybFfDwEr4xu88+wATxL1/RbRY77axge3Z09F6O99+FQbltof22RKfts1WTQ== X-Received: by 2002:a17:902:8b88:: with SMTP id ay8mr4933419plb.235.1589569326087; Fri, 15 May 2020 12:02:06 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 08/10] softfloat: Inline float128 compare specializations Date: Fri, 15 May 2020 12:01:51 -0700 Message-Id: <20200515190153.6017-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200515190153.6017-1-richard.henderson@linaro.org> References: <20200515190153.6017-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1041; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1041.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Replace the float128 compare specializations with inline functions that call the standard float128_compare{,_quiet} functions. Use bool as the return type. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- include/fpu/softfloat.h | 49 +++++++-- fpu/softfloat.c | 238 ---------------------------------------- 2 files changed, 41 insertions(+), 246 deletions(-) diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 281f0fd971..cfb3cda46b 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -901,14 +901,6 @@ float128 float128_mul(float128, float128, float_status= *status); float128 float128_div(float128, float128, float_status *status); float128 float128_rem(float128, float128, float_status *status); float128 float128_sqrt(float128, float_status *status); -int float128_eq(float128, float128, float_status *status); -int float128_le(float128, float128, float_status *status); -int float128_lt(float128, float128, float_status *status); -int float128_unordered(float128, float128, float_status *status); -int float128_eq_quiet(float128, float128, float_status *status); -int float128_le_quiet(float128, float128, float_status *status); -int float128_lt_quiet(float128, float128, float_status *status); -int float128_unordered_quiet(float128, float128, float_status *status); FloatRelation float128_compare(float128, float128, float_status *status); FloatRelation float128_compare_quiet(float128, float128, float_status *sta= tus); int float128_is_quiet_nan(float128, float_status *status); @@ -964,6 +956,47 @@ static inline int float128_is_any_nan(float128 a) ((a.low !=3D 0) || ((a.high & 0xffffffffffffLL) !=3D 0)); } =20 +static inline bool float128_eq(float128 a, float128 b, float_status *s) +{ + return float128_compare(a, b, s) =3D=3D float_relation_equal; +} + +static inline bool float128_le(float128 a, float128 b, float_status *s) +{ + return float128_compare(a, b, s) <=3D float_relation_equal; +} + +static inline bool float128_lt(float128 a, float128 b, float_status *s) +{ + return float128_compare(a, b, s) < float_relation_equal; +} + +static inline bool float128_unordered(float128 a, float128 b, float_status= *s) +{ + return float128_compare(a, b, s) =3D=3D float_relation_unordered; +} + +static inline bool float128_eq_quiet(float128 a, float128 b, float_status = *s) +{ + return float128_compare_quiet(a, b, s) =3D=3D float_relation_equal; +} + +static inline bool float128_le_quiet(float128 a, float128 b, float_status = *s) +{ + return float128_compare_quiet(a, b, s) <=3D float_relation_equal; +} + +static inline bool float128_lt_quiet(float128 a, float128 b, float_status = *s) +{ + return float128_compare_quiet(a, b, s) < float_relation_equal; +} + +static inline bool float128_unordered_quiet(float128 a, float128 b, + float_status *s) +{ + return float128_compare_quiet(a, b, s) =3D=3D float_relation_unordered; +} + #define float128_zero make_float128(0, 0) =20 /*------------------------------------------------------------------------= ---- diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 5d7fc2c17a..4567dda112 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -7218,244 +7218,6 @@ float128 float128_sqrt(float128 a, float_status *st= atus) =20 } =20 -/*------------------------------------------------------------------------= ---- -| Returns 1 if the quadruple-precision floating-point value `a' is equal to -| the corresponding value `b', and 0 otherwise. The invalid exception is -| raised if either operand is a NaN. Otherwise, the comparison is perform= ed -| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float128_eq(float128 a, float128 b, float_status *status) -{ - - if ( ( ( extractFloat128Exp( a ) =3D=3D 0x7FFF ) - && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )= ) - || ( ( extractFloat128Exp( b ) =3D=3D 0x7FFF ) - && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) )= ) - ) { - float_raise(float_flag_invalid, status); - return 0; - } - return - ( a.low =3D=3D b.low ) - && ( ( a.high =3D=3D b.high ) - || ( ( a.low =3D=3D 0 ) - && ( (uint64_t) ( ( a.high | b.high )<<1 ) =3D=3D 0 ) ) - ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the quadruple-precision floating-point value `a' is less th= an -| or equal to the corresponding value `b', and 0 otherwise. The invalid -| exception is raised if either operand is a NaN. The comparison is perfo= rmed -| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float128_le(float128 a, float128 b, float_status *status) -{ - bool aSign, bSign; - - if ( ( ( extractFloat128Exp( a ) =3D=3D 0x7FFF ) - && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )= ) - || ( ( extractFloat128Exp( b ) =3D=3D 0x7FFF ) - && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) )= ) - ) { - float_raise(float_flag_invalid, status); - return 0; - } - aSign =3D extractFloat128Sign( a ); - bSign =3D extractFloat128Sign( b ); - if ( aSign !=3D bSign ) { - return - aSign - || ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | = b.low ) - =3D=3D 0 ); - } - return - aSign ? le128( b.high, b.low, a.high, a.low ) - : le128( a.high, a.low, b.high, b.low ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the quadruple-precision floating-point value `a' is less th= an -| the corresponding value `b', and 0 otherwise. The invalid exception is -| raised if either operand is a NaN. The comparison is performed according -| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float128_lt(float128 a, float128 b, float_status *status) -{ - bool aSign, bSign; - - if ( ( ( extractFloat128Exp( a ) =3D=3D 0x7FFF ) - && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )= ) - || ( ( extractFloat128Exp( b ) =3D=3D 0x7FFF ) - && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) )= ) - ) { - float_raise(float_flag_invalid, status); - return 0; - } - aSign =3D extractFloat128Sign( a ); - bSign =3D extractFloat128Sign( b ); - if ( aSign !=3D bSign ) { - return - aSign - && ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | = b.low ) - !=3D 0 ); - } - return - aSign ? lt128( b.high, b.low, a.high, a.low ) - : lt128( a.high, a.low, b.high, b.low ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the quadruple-precision floating-point values `a' and `b' c= annot -| be compared, and 0 otherwise. The invalid exception is raised if either -| operand is a NaN. The comparison is performed according to the IEC/IEEE -| Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float128_unordered(float128 a, float128 b, float_status *status) -{ - if ( ( ( extractFloat128Exp( a ) =3D=3D 0x7FFF ) - && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )= ) - || ( ( extractFloat128Exp( b ) =3D=3D 0x7FFF ) - && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) )= ) - ) { - float_raise(float_flag_invalid, status); - return 1; - } - return 0; -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the quadruple-precision floating-point value `a' is equal to -| the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an -| exception. The comparison is performed according to the IEC/IEEE Standa= rd -| for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float128_eq_quiet(float128 a, float128 b, float_status *status) -{ - - if ( ( ( extractFloat128Exp( a ) =3D=3D 0x7FFF ) - && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )= ) - || ( ( extractFloat128Exp( b ) =3D=3D 0x7FFF ) - && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) )= ) - ) { - if (float128_is_signaling_nan(a, status) - || float128_is_signaling_nan(b, status)) { - float_raise(float_flag_invalid, status); - } - return 0; - } - return - ( a.low =3D=3D b.low ) - && ( ( a.high =3D=3D b.high ) - || ( ( a.low =3D=3D 0 ) - && ( (uint64_t) ( ( a.high | b.high )<<1 ) =3D=3D 0 ) ) - ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the quadruple-precision floating-point value `a' is less th= an -| or equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do= not -| cause an exception. Otherwise, the comparison is performed according to= the -| IEC/IEEE Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float128_le_quiet(float128 a, float128 b, float_status *status) -{ - bool aSign, bSign; - - if ( ( ( extractFloat128Exp( a ) =3D=3D 0x7FFF ) - && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )= ) - || ( ( extractFloat128Exp( b ) =3D=3D 0x7FFF ) - && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) )= ) - ) { - if (float128_is_signaling_nan(a, status) - || float128_is_signaling_nan(b, status)) { - float_raise(float_flag_invalid, status); - } - return 0; - } - aSign =3D extractFloat128Sign( a ); - bSign =3D extractFloat128Sign( b ); - if ( aSign !=3D bSign ) { - return - aSign - || ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | = b.low ) - =3D=3D 0 ); - } - return - aSign ? le128( b.high, b.low, a.high, a.low ) - : le128( a.high, a.low, b.high, b.low ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the quadruple-precision floating-point value `a' is less th= an -| the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an -| exception. Otherwise, the comparison is performed according to the IEC/= IEEE -| Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float128_lt_quiet(float128 a, float128 b, float_status *status) -{ - bool aSign, bSign; - - if ( ( ( extractFloat128Exp( a ) =3D=3D 0x7FFF ) - && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )= ) - || ( ( extractFloat128Exp( b ) =3D=3D 0x7FFF ) - && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) )= ) - ) { - if (float128_is_signaling_nan(a, status) - || float128_is_signaling_nan(b, status)) { - float_raise(float_flag_invalid, status); - } - return 0; - } - aSign =3D extractFloat128Sign( a ); - bSign =3D extractFloat128Sign( b ); - if ( aSign !=3D bSign ) { - return - aSign - && ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | = b.low ) - !=3D 0 ); - } - return - aSign ? lt128( b.high, b.low, a.high, a.low ) - : lt128( a.high, a.low, b.high, b.low ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the quadruple-precision floating-point values `a' and `b' c= annot -| be compared, and 0 otherwise. Quiet NaNs do not cause an exception. The -| comparison is performed according to the IEC/IEEE Standard for Binary -| Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int float128_unordered_quiet(float128 a, float128 b, float_status *status) -{ - if ( ( ( extractFloat128Exp( a ) =3D=3D 0x7FFF ) - && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )= ) - || ( ( extractFloat128Exp( b ) =3D=3D 0x7FFF ) - && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) )= ) - ) { - if (float128_is_signaling_nan(a, status) - || float128_is_signaling_nan(b, status)) { - float_raise(float_flag_invalid, status); - } - return 1; - } - return 0; -} - static inline FloatRelation floatx80_compare_internal(floatx80 a, floatx80 b, bool is_quiet, float_status *status) --=20 2.20.1 From nobody Sun May 19 18:35:16 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589569784; cv=none; d=zohomail.com; s=zohoarc; b=CyBYMIlarbOhuOk3Q/KAiDcAbKMTX0kwWHmgnuq0PIHIzoUhjnPdOIJXY+zM51csCHx3gWulRZZ+gQn3L3BoP1fBy2ofzRYYQc6ZD4C09q6PaZvWkzeCi9SftFIV+wRYPl99G3A8a2sEnoHRWKrQuYOzaOxBQ5MLQ2ZI1Y5+x9U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589569784; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=cKi86OQSep6LgVzqwL+7q/01IrrZQWVDQUnTLFq+Ia0=; b=L47Eb2KTtpftsreHr4NH7TYrA7MTLbLIGctyao9sndCcIBWSvcFIsOzsBXkWX6MJswN6QeGGXpo8G5S56ujVagT9SGSnqsCSnv6MhHbO0gjblvaC76ga6eZJfiXa2m2D13uqBAHUSFM31RPeX2ijeGIO4REJQUIlkdVrgKN7yEs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589569784068372.1906128259035; Fri, 15 May 2020 12:09:44 -0700 (PDT) Received: from localhost ([::1]:55094 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jZfiI-0004VQ-GT for importer@patchew.org; Fri, 15 May 2020 15:09:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55902) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jZfb2-0001sO-7f for qemu-devel@nongnu.org; Fri, 15 May 2020 15:02:12 -0400 Received: from mail-pj1-x1042.google.com ([2607:f8b0:4864:20::1042]:37330) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jZfb0-0001qI-5w for qemu-devel@nongnu.org; Fri, 15 May 2020 15:02:11 -0400 Received: by mail-pj1-x1042.google.com with SMTP id q9so1380576pjm.2 for ; Fri, 15 May 2020 12:02:09 -0700 (PDT) Received: from localhost.localdomain (174-21-143-238.tukw.qwest.net. [174.21.143.238]) by smtp.gmail.com with ESMTPSA id q21sm2485719pfg.131.2020.05.15.12.02.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 May 2020 12:02:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cKi86OQSep6LgVzqwL+7q/01IrrZQWVDQUnTLFq+Ia0=; b=Pxt8KPt4l9Ajs8Pr8jUgrdmlT9cuJgfzYAMRv659lNpndFuX9IHjFrSBsYtanWb+4v Oz93/d92ijkX6NeJZmRckNBP44AM5wRpNFJj2xe/FoI2zfPHyfGwW+RtBajbLTVsFtBo tHCeq6sqfeJifeyHFRQI2Q5Ncwi6XHdqBRghaSsczWY/T7ltR9/Kgzx8u1qV5dp9A8/c NmXpZA5CtJppz20qLDBmgPIY8O/B9UO5XkuuecKHV7EBjBBBDuhIhLED9vHjD6amslf6 tfS3KJmd4HIRB/bvI6inCVKpQBAd2c2zeTQ3HdSUzydu3Crb/9dCcVlpPe8i7YBsf0Am jYdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cKi86OQSep6LgVzqwL+7q/01IrrZQWVDQUnTLFq+Ia0=; b=Sge6YDK2+4c92Mmd5Z62WrfKupMUoA59rf82EV66RljS+uW7DrY0Vssp52x84u3VPD Uxr+ZzgClr2MMyRErILnVZaLGKlzkXvIlwp3hG5N1cnOMzr0BFOu7daNam2mCjN9USkc y5X7dAXlE3/mcWtSEEKHsY1sx8FBXGPARR61FLcoW7gN8hI+0GFBXbfQnC22qjUt8PRP mNXtWk5ZZiTimP659A+/cv/1BRaR2D2hQmE7gUKrXE1xP4EMQP229IQluc02z1s/YtmV D3IDDQzcHEq/eqN69Vw52+Y3z0UwfgikhpFJ5AnheFcj5SrpA5IzjL/CDgpC24ctEgiX wVeg== X-Gm-Message-State: AOAM533Wnw1NrRKvf4W/zMnKberDcUJj56EliHqwyYzVvzDtePVcZJr8 P4HVejAbJtKStl4p5GsLAFGUqDQhoVk= X-Google-Smtp-Source: ABdhPJyMHEkNj6SeptzYmJkPe3jDDTC+UilF+vfRee3Eqjmcs4bb0xcvoL4FZqPr7jPjKRdCc03cJg== X-Received: by 2002:a17:902:d915:: with SMTP id c21mr4907770plz.49.1589569327167; Fri, 15 May 2020 12:02:07 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 09/10] softfloat: Inline floatx80 compare specializations Date: Fri, 15 May 2020 12:01:52 -0700 Message-Id: <20200515190153.6017-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200515190153.6017-1-richard.henderson@linaro.org> References: <20200515190153.6017-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1042; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1042.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Replace the floatx80 compare specializations with inline functions that call the standard floatx80_compare{,_quiet} functions. Use bool as the return type. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- include/fpu/softfloat.h | 49 ++++++-- fpu/softfloat.c | 257 ---------------------------------------- 2 files changed, 41 insertions(+), 265 deletions(-) diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index cfb3cda46b..37217d9b9b 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -689,14 +689,6 @@ floatx80 floatx80_mul(floatx80, floatx80, float_status= *status); floatx80 floatx80_div(floatx80, floatx80, float_status *status); floatx80 floatx80_rem(floatx80, floatx80, float_status *status); floatx80 floatx80_sqrt(floatx80, float_status *status); -int floatx80_eq(floatx80, floatx80, float_status *status); -int floatx80_le(floatx80, floatx80, float_status *status); -int floatx80_lt(floatx80, floatx80, float_status *status); -int floatx80_unordered(floatx80, floatx80, float_status *status); -int floatx80_eq_quiet(floatx80, floatx80, float_status *status); -int floatx80_le_quiet(floatx80, floatx80, float_status *status); -int floatx80_lt_quiet(floatx80, floatx80, float_status *status); -int floatx80_unordered_quiet(floatx80, floatx80, float_status *status); FloatRelation floatx80_compare(floatx80, floatx80, float_status *status); FloatRelation floatx80_compare_quiet(floatx80, floatx80, float_status *sta= tus); int floatx80_is_quiet_nan(floatx80, float_status *status); @@ -746,6 +738,47 @@ static inline int floatx80_is_any_nan(floatx80 a) return ((a.high & 0x7fff) =3D=3D 0x7fff) && (a.low<<1); } =20 +static inline bool floatx80_eq(floatx80 a, floatx80 b, float_status *s) +{ + return floatx80_compare(a, b, s) =3D=3D float_relation_equal; +} + +static inline bool floatx80_le(floatx80 a, floatx80 b, float_status *s) +{ + return floatx80_compare(a, b, s) <=3D float_relation_equal; +} + +static inline bool floatx80_lt(floatx80 a, floatx80 b, float_status *s) +{ + return floatx80_compare(a, b, s) < float_relation_equal; +} + +static inline bool floatx80_unordered(floatx80 a, floatx80 b, float_status= *s) +{ + return floatx80_compare(a, b, s) =3D=3D float_relation_unordered; +} + +static inline bool floatx80_eq_quiet(floatx80 a, floatx80 b, float_status = *s) +{ + return floatx80_compare_quiet(a, b, s) =3D=3D float_relation_equal; +} + +static inline bool floatx80_le_quiet(floatx80 a, floatx80 b, float_status = *s) +{ + return floatx80_compare_quiet(a, b, s) <=3D float_relation_equal; +} + +static inline bool floatx80_lt_quiet(floatx80 a, floatx80 b, float_status = *s) +{ + return floatx80_compare_quiet(a, b, s) < float_relation_equal; +} + +static inline bool floatx80_unordered_quiet(floatx80 a, floatx80 b, + float_status *s) +{ + return floatx80_compare_quiet(a, b, s) =3D=3D float_relation_unordered; +} + /*------------------------------------------------------------------------= ---- | Return whether the given value is an invalid floatx80 encoding. | Invalid floatx80 encodings arise when the integer bit is not set, but diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 4567dda112..6c8f2d597a 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -5849,263 +5849,6 @@ floatx80 floatx80_sqrt(floatx80 a, float_status *st= atus) 0, zExp, zSig0, zSig1, status); } =20 -/*------------------------------------------------------------------------= ---- -| Returns 1 if the extended double-precision floating-point value `a' is e= qual -| to the corresponding value `b', and 0 otherwise. The invalid exception = is -| raised if either operand is a NaN. Otherwise, the comparison is perform= ed -| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int floatx80_eq(floatx80 a, floatx80 b, float_status *status) -{ - - if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b) - || (extractFloatx80Exp(a) =3D=3D 0x7FFF - && (uint64_t) (extractFloatx80Frac(a) << 1)) - || (extractFloatx80Exp(b) =3D=3D 0x7FFF - && (uint64_t) (extractFloatx80Frac(b) << 1)) - ) { - float_raise(float_flag_invalid, status); - return 0; - } - return - ( a.low =3D=3D b.low ) - && ( ( a.high =3D=3D b.high ) - || ( ( a.low =3D=3D 0 ) - && ( (uint16_t) ( ( a.high | b.high )<<1 ) =3D=3D 0 ) ) - ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the extended double-precision floating-point value `a' is -| less than or equal to the corresponding value `b', and 0 otherwise. The -| invalid exception is raised if either operand is a NaN. The comparison = is -| performed according to the IEC/IEEE Standard for Binary Floating-Point -| Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int floatx80_le(floatx80 a, floatx80 b, float_status *status) -{ - bool aSign, bSign; - - if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b) - || (extractFloatx80Exp(a) =3D=3D 0x7FFF - && (uint64_t) (extractFloatx80Frac(a) << 1)) - || (extractFloatx80Exp(b) =3D=3D 0x7FFF - && (uint64_t) (extractFloatx80Frac(b) << 1)) - ) { - float_raise(float_flag_invalid, status); - return 0; - } - aSign =3D extractFloatx80Sign( a ); - bSign =3D extractFloatx80Sign( b ); - if ( aSign !=3D bSign ) { - return - aSign - || ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | = b.low ) - =3D=3D 0 ); - } - return - aSign ? le128( b.high, b.low, a.high, a.low ) - : le128( a.high, a.low, b.high, b.low ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the extended double-precision floating-point value `a' is -| less than the corresponding value `b', and 0 otherwise. The invalid -| exception is raised if either operand is a NaN. The comparison is perfo= rmed -| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int floatx80_lt(floatx80 a, floatx80 b, float_status *status) -{ - bool aSign, bSign; - - if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b) - || (extractFloatx80Exp(a) =3D=3D 0x7FFF - && (uint64_t) (extractFloatx80Frac(a) << 1)) - || (extractFloatx80Exp(b) =3D=3D 0x7FFF - && (uint64_t) (extractFloatx80Frac(b) << 1)) - ) { - float_raise(float_flag_invalid, status); - return 0; - } - aSign =3D extractFloatx80Sign( a ); - bSign =3D extractFloatx80Sign( b ); - if ( aSign !=3D bSign ) { - return - aSign - && ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | = b.low ) - !=3D 0 ); - } - return - aSign ? lt128( b.high, b.low, a.high, a.low ) - : lt128( a.high, a.low, b.high, b.low ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the extended double-precision floating-point values `a' and= `b' -| cannot be compared, and 0 otherwise. The invalid exception is raised if -| either operand is a NaN. The comparison is performed according to the -| IEC/IEEE Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ -int floatx80_unordered(floatx80 a, floatx80 b, float_status *status) -{ - if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b) - || (extractFloatx80Exp(a) =3D=3D 0x7FFF - && (uint64_t) (extractFloatx80Frac(a) << 1)) - || (extractFloatx80Exp(b) =3D=3D 0x7FFF - && (uint64_t) (extractFloatx80Frac(b) << 1)) - ) { - float_raise(float_flag_invalid, status); - return 1; - } - return 0; -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the extended double-precision floating-point value `a' is -| equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do not -| cause an exception. The comparison is performed according to the IEC/IE= EE -| Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int floatx80_eq_quiet(floatx80 a, floatx80 b, float_status *status) -{ - - if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) { - float_raise(float_flag_invalid, status); - return 0; - } - if ( ( ( extractFloatx80Exp( a ) =3D=3D 0x7FFF ) - && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) - || ( ( extractFloatx80Exp( b ) =3D=3D 0x7FFF ) - && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) - ) { - if (floatx80_is_signaling_nan(a, status) - || floatx80_is_signaling_nan(b, status)) { - float_raise(float_flag_invalid, status); - } - return 0; - } - return - ( a.low =3D=3D b.low ) - && ( ( a.high =3D=3D b.high ) - || ( ( a.low =3D=3D 0 ) - && ( (uint16_t) ( ( a.high | b.high )<<1 ) =3D=3D 0 ) ) - ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the extended double-precision floating-point value `a' is l= ess -| than or equal to the corresponding value `b', and 0 otherwise. Quiet Na= Ns -| do not cause an exception. Otherwise, the comparison is performed accor= ding -| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int floatx80_le_quiet(floatx80 a, floatx80 b, float_status *status) -{ - bool aSign, bSign; - - if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) { - float_raise(float_flag_invalid, status); - return 0; - } - if ( ( ( extractFloatx80Exp( a ) =3D=3D 0x7FFF ) - && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) - || ( ( extractFloatx80Exp( b ) =3D=3D 0x7FFF ) - && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) - ) { - if (floatx80_is_signaling_nan(a, status) - || floatx80_is_signaling_nan(b, status)) { - float_raise(float_flag_invalid, status); - } - return 0; - } - aSign =3D extractFloatx80Sign( a ); - bSign =3D extractFloatx80Sign( b ); - if ( aSign !=3D bSign ) { - return - aSign - || ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | = b.low ) - =3D=3D 0 ); - } - return - aSign ? le128( b.high, b.low, a.high, a.low ) - : le128( a.high, a.low, b.high, b.low ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the extended double-precision floating-point value `a' is l= ess -| than the corresponding value `b', and 0 otherwise. Quiet NaNs do not ca= use -| an exception. Otherwise, the comparison is performed according to the -| IEC/IEEE Standard for Binary Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ - -int floatx80_lt_quiet(floatx80 a, floatx80 b, float_status *status) -{ - bool aSign, bSign; - - if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) { - float_raise(float_flag_invalid, status); - return 0; - } - if ( ( ( extractFloatx80Exp( a ) =3D=3D 0x7FFF ) - && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) - || ( ( extractFloatx80Exp( b ) =3D=3D 0x7FFF ) - && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) - ) { - if (floatx80_is_signaling_nan(a, status) - || floatx80_is_signaling_nan(b, status)) { - float_raise(float_flag_invalid, status); - } - return 0; - } - aSign =3D extractFloatx80Sign( a ); - bSign =3D extractFloatx80Sign( b ); - if ( aSign !=3D bSign ) { - return - aSign - && ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | = b.low ) - !=3D 0 ); - } - return - aSign ? lt128( b.high, b.low, a.high, a.low ) - : lt128( a.high, a.low, b.high, b.low ); - -} - -/*------------------------------------------------------------------------= ---- -| Returns 1 if the extended double-precision floating-point values `a' and= `b' -| cannot be compared, and 0 otherwise. Quiet NaNs do not cause an excepti= on. -| The comparison is performed according to the IEC/IEEE Standard for Binary -| Floating-Point Arithmetic. -*-------------------------------------------------------------------------= ---*/ -int floatx80_unordered_quiet(floatx80 a, floatx80 b, float_status *status) -{ - if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) { - float_raise(float_flag_invalid, status); - return 1; - } - if ( ( ( extractFloatx80Exp( a ) =3D=3D 0x7FFF ) - && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) - || ( ( extractFloatx80Exp( b ) =3D=3D 0x7FFF ) - && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) - ) { - if (floatx80_is_signaling_nan(a, status) - || floatx80_is_signaling_nan(b, status)) { - float_raise(float_flag_invalid, status); - } - return 1; - } - return 0; -} - /*------------------------------------------------------------------------= ---- | Returns the result of converting the quadruple-precision floating-point | value `a' to the 32-bit two's complement integer format. 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" This includes *_is_any_nan, *_is_neg, *_is_inf, etc. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- include/fpu/softfloat.h | 66 +++++++++++++++++----------------- fpu/softfloat-specialize.inc.c | 16 ++++----- 2 files changed, 41 insertions(+), 41 deletions(-) diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 37217d9b9b..16ca697a73 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -235,31 +235,31 @@ float16 float16_sqrt(float16, float_status *status); FloatRelation float16_compare(float16, float16, float_status *status); FloatRelation float16_compare_quiet(float16, float16, float_status *status= ); =20 -int float16_is_quiet_nan(float16, float_status *status); -int float16_is_signaling_nan(float16, float_status *status); +bool float16_is_quiet_nan(float16, float_status *status); +bool float16_is_signaling_nan(float16, float_status *status); float16 float16_silence_nan(float16, float_status *status); =20 -static inline int float16_is_any_nan(float16 a) +static inline bool float16_is_any_nan(float16 a) { return ((float16_val(a) & ~0x8000) > 0x7c00); } =20 -static inline int float16_is_neg(float16 a) +static inline bool float16_is_neg(float16 a) { return float16_val(a) >> 15; } =20 -static inline int float16_is_infinity(float16 a) +static inline bool float16_is_infinity(float16 a) { return (float16_val(a) & 0x7fff) =3D=3D 0x7c00; } =20 -static inline int float16_is_zero(float16 a) +static inline bool float16_is_zero(float16 a) { return (float16_val(a) & 0x7fff) =3D=3D 0; } =20 -static inline int float16_is_zero_or_denormal(float16 a) +static inline bool float16_is_zero_or_denormal(float16 a) { return (float16_val(a) & 0x7c00) =3D=3D 0; } @@ -351,8 +351,8 @@ float32 float32_minnum(float32, float32, float_status *= status); float32 float32_maxnum(float32, float32, float_status *status); float32 float32_minnummag(float32, float32, float_status *status); float32 float32_maxnummag(float32, float32, float_status *status); -int float32_is_quiet_nan(float32, float_status *status); -int float32_is_signaling_nan(float32, float_status *status); +bool float32_is_quiet_nan(float32, float_status *status); +bool float32_is_signaling_nan(float32, float_status *status); float32 float32_silence_nan(float32, float_status *status); float32 float32_scalbn(float32, int, float_status *status); =20 @@ -372,27 +372,27 @@ static inline float32 float32_chs(float32 a) return make_float32(float32_val(a) ^ 0x80000000); } =20 -static inline int float32_is_infinity(float32 a) +static inline bool float32_is_infinity(float32 a) { return (float32_val(a) & 0x7fffffff) =3D=3D 0x7f800000; } =20 -static inline int float32_is_neg(float32 a) +static inline bool float32_is_neg(float32 a) { return float32_val(a) >> 31; } =20 -static inline int float32_is_zero(float32 a) +static inline bool float32_is_zero(float32 a) { return (float32_val(a) & 0x7fffffff) =3D=3D 0; } =20 -static inline int float32_is_any_nan(float32 a) +static inline bool float32_is_any_nan(float32 a) { return ((float32_val(a) & ~(1 << 31)) > 0x7f800000UL); } =20 -static inline int float32_is_zero_or_denormal(float32 a) +static inline bool float32_is_zero_or_denormal(float32 a) { return (float32_val(a) & 0x7f800000) =3D=3D 0; } @@ -540,8 +540,8 @@ float64 float64_minnum(float64, float64, float_status *= status); float64 float64_maxnum(float64, float64, float_status *status); float64 float64_minnummag(float64, float64, float_status *status); float64 float64_maxnummag(float64, float64, float_status *status); -int float64_is_quiet_nan(float64 a, float_status *status); -int float64_is_signaling_nan(float64, float_status *status); +bool float64_is_quiet_nan(float64 a, float_status *status); +bool float64_is_signaling_nan(float64, float_status *status); float64 float64_silence_nan(float64, float_status *status); float64 float64_scalbn(float64, int, float_status *status); =20 @@ -561,27 +561,27 @@ static inline float64 float64_chs(float64 a) return make_float64(float64_val(a) ^ 0x8000000000000000LL); } =20 -static inline int float64_is_infinity(float64 a) +static inline bool float64_is_infinity(float64 a) { return (float64_val(a) & 0x7fffffffffffffffLL ) =3D=3D 0x7ff0000000000= 000LL; } =20 -static inline int float64_is_neg(float64 a) +static inline bool float64_is_neg(float64 a) { return float64_val(a) >> 63; } =20 -static inline int float64_is_zero(float64 a) +static inline bool float64_is_zero(float64 a) { return (float64_val(a) & 0x7fffffffffffffffLL) =3D=3D 0; } =20 -static inline int float64_is_any_nan(float64 a) +static inline bool float64_is_any_nan(float64 a) { return ((float64_val(a) & ~(1ULL << 63)) > 0x7ff0000000000000ULL); } =20 -static inline int float64_is_zero_or_denormal(float64 a) +static inline bool float64_is_zero_or_denormal(float64 a) { return (float64_val(a) & 0x7ff0000000000000LL) =3D=3D 0; } @@ -708,7 +708,7 @@ static inline floatx80 floatx80_chs(floatx80 a) return a; } =20 -static inline int floatx80_is_infinity(floatx80 a) +static inline bool floatx80_is_infinity(floatx80 a) { #if defined(TARGET_M68K) return (a.high & 0x7fff) =3D=3D floatx80_infinity.high && !(a.low << 1= ); @@ -718,22 +718,22 @@ static inline int floatx80_is_infinity(floatx80 a) #endif } =20 -static inline int floatx80_is_neg(floatx80 a) +static inline bool floatx80_is_neg(floatx80 a) { return a.high >> 15; } =20 -static inline int floatx80_is_zero(floatx80 a) +static inline bool floatx80_is_zero(floatx80 a) { return (a.high & 0x7fff) =3D=3D 0 && a.low =3D=3D 0; } =20 -static inline int floatx80_is_zero_or_denormal(floatx80 a) +static inline bool floatx80_is_zero_or_denormal(floatx80 a) { return (a.high & 0x7fff) =3D=3D 0; } =20 -static inline int floatx80_is_any_nan(floatx80 a) +static inline bool floatx80_is_any_nan(floatx80 a) { return ((a.high & 0x7fff) =3D=3D 0x7fff) && (a.low<<1); } @@ -936,8 +936,8 @@ float128 float128_rem(float128, float128, float_status = *status); float128 float128_sqrt(float128, float_status *status); FloatRelation float128_compare(float128, float128, float_status *status); FloatRelation float128_compare_quiet(float128, float128, float_status *sta= tus); -int float128_is_quiet_nan(float128, float_status *status); -int float128_is_signaling_nan(float128, float_status *status); +bool float128_is_quiet_nan(float128, float_status *status); +bool float128_is_signaling_nan(float128, float_status *status); float128 float128_silence_nan(float128, float_status *status); float128 float128_scalbn(float128, int, float_status *status); =20 @@ -953,22 +953,22 @@ static inline float128 float128_chs(float128 a) return a; } =20 -static inline int float128_is_infinity(float128 a) +static inline bool float128_is_infinity(float128 a) { return (a.high & 0x7fffffffffffffffLL) =3D=3D 0x7fff000000000000LL && = a.low =3D=3D 0; } =20 -static inline int float128_is_neg(float128 a) +static inline bool float128_is_neg(float128 a) { return a.high >> 63; } =20 -static inline int float128_is_zero(float128 a) +static inline bool float128_is_zero(float128 a) { return (a.high & 0x7fffffffffffffffLL) =3D=3D 0 && a.low =3D=3D 0; } =20 -static inline int float128_is_zero_or_denormal(float128 a) +static inline bool float128_is_zero_or_denormal(float128 a) { return (a.high & 0x7fff000000000000LL) =3D=3D 0; } @@ -983,7 +983,7 @@ static inline bool float128_is_denormal(float128 a) return float128_is_zero_or_denormal(a) && !float128_is_zero(a); } =20 -static inline int float128_is_any_nan(float128 a) +static inline bool float128_is_any_nan(float128 a) { return ((a.high >> 48) & 0x7fff) =3D=3D 0x7fff && ((a.low !=3D 0) || ((a.high & 0xffffffffffffLL) !=3D 0)); diff --git a/fpu/softfloat-specialize.inc.c b/fpu/softfloat-specialize.inc.c index 025ee4f991..44f5b661f8 100644 --- a/fpu/softfloat-specialize.inc.c +++ b/fpu/softfloat-specialize.inc.c @@ -245,7 +245,7 @@ typedef struct { | NaN; otherwise returns 0. *-------------------------------------------------------------------------= ---*/ =20 -int float16_is_quiet_nan(float16 a_, float_status *status) +bool float16_is_quiet_nan(float16 a_, float_status *status) { #ifdef NO_SIGNALING_NANS return float16_is_any_nan(a_); @@ -264,7 +264,7 @@ int float16_is_quiet_nan(float16 a_, float_status *stat= us) | NaN; otherwise returns 0. *-------------------------------------------------------------------------= ---*/ =20 -int float16_is_signaling_nan(float16 a_, float_status *status) +bool float16_is_signaling_nan(float16 a_, float_status *status) { #ifdef NO_SIGNALING_NANS return 0; @@ -283,7 +283,7 @@ int float16_is_signaling_nan(float16 a_, float_status *= status) | NaN; otherwise returns 0. *-------------------------------------------------------------------------= ---*/ =20 -int float32_is_quiet_nan(float32 a_, float_status *status) +bool float32_is_quiet_nan(float32 a_, float_status *status) { #ifdef NO_SIGNALING_NANS return float32_is_any_nan(a_); @@ -302,7 +302,7 @@ int float32_is_quiet_nan(float32 a_, float_status *stat= us) | NaN; otherwise returns 0. *-------------------------------------------------------------------------= ---*/ =20 -int float32_is_signaling_nan(float32 a_, float_status *status) +bool float32_is_signaling_nan(float32 a_, float_status *status) { #ifdef NO_SIGNALING_NANS return 0; @@ -637,7 +637,7 @@ static float32 propagateFloat32NaN(float32 a, float32 b= , float_status *status) | NaN; otherwise returns 0. *-------------------------------------------------------------------------= ---*/ =20 -int float64_is_quiet_nan(float64 a_, float_status *status) +bool float64_is_quiet_nan(float64 a_, float_status *status) { #ifdef NO_SIGNALING_NANS return float64_is_any_nan(a_); @@ -657,7 +657,7 @@ int float64_is_quiet_nan(float64 a_, float_status *stat= us) | NaN; otherwise returns 0. *-------------------------------------------------------------------------= ---*/ =20 -int float64_is_signaling_nan(float64 a_, float_status *status) +bool float64_is_signaling_nan(float64 a_, float_status *status) { #ifdef NO_SIGNALING_NANS return 0; @@ -939,7 +939,7 @@ floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b, f= loat_status *status) | NaN; otherwise returns 0. *-------------------------------------------------------------------------= ---*/ =20 -int float128_is_quiet_nan(float128 a, float_status *status) +bool float128_is_quiet_nan(float128 a, float_status *status) { #ifdef NO_SIGNALING_NANS return float128_is_any_nan(a); @@ -959,7 +959,7 @@ int float128_is_quiet_nan(float128 a, float_status *sta= tus) | signaling NaN; otherwise returns 0. *-------------------------------------------------------------------------= ---*/ =20 -int float128_is_signaling_nan(float128 a, float_status *status) +bool float128_is_signaling_nan(float128 a, float_status *status) { #ifdef NO_SIGNALING_NANS return 0; --=20 2.20.1