From nobody Sat May 18 08:46:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589301819; cv=none; d=zohomail.com; s=zohoarc; b=BOyKv4BGOkhamDBkksPk+UzwxosZPiUVU7pEWPYWtjNRA578mY1jxIk0ui3tgwCD9f7TOLQiZMXLhWUWW7PMdD0hGZtWCB5KDhmZ5bqnHnkgfFV+dUG9lOTSOVGW8nUZ5B/efHjuNE4eCMipWjdPSZk91KP1JhMBhy7AbI6gOpM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589301819; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=miq5sxrk+TH5OlhT9tqJAy5fKLaSHjQ/CF8bIqx0AcI=; b=F5BUvK7rJ1Bl1wMXIH7YvgTW+XJCeTkkQt3RqNFNtvvVTtNRHiUCT1PK0LMVSV7yUFsAYuQgI7vN21qxk2czIWjNfVzBuKgZ4VCj2RRFs8XAmIUbMKcBsXuP5gnwFFbEwe7AimITzf8PzEh5zjFNezBDmq7ji4d+2vqiMC03qrU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589301819562451.9392370861316; Tue, 12 May 2020 09:43:39 -0700 (PDT) Received: from localhost ([::1]:47932 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jYY0I-0003KZ-53 for importer@patchew.org; Tue, 12 May 2020 12:43:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50502) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jYXvy-00068z-7b for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:10 -0400 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]:46638) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jYXvx-00060a-BK for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:09 -0400 Received: by mail-wr1-x441.google.com with SMTP id w7so16303880wre.13 for ; Tue, 12 May 2020 09:39:08 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id o205sm18525981wmo.32.2020.05.12.09.39.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 09:39:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=miq5sxrk+TH5OlhT9tqJAy5fKLaSHjQ/CF8bIqx0AcI=; b=Lb4ex40AHjQhSCBPsVnhiyp6TueulsCNnYFWNqytO9xKqxoz/2rxsXrcOD2WFRlm37 4axWh74I88NEiil1u0zk9iaEby+CtF3AUZXDt96juhbLoVujMj2xzZyIAJJQvWvJC+Xe xOUUNji1FU+QTRK/j5rEZnMAoUv3WeflNUa9ZHcDM7Xs6o/SBS47WF7QsoBbHAxjXerK TWji+5YT3CLgbTQ238ipttB/H3BSHKrYq/te9XKgtn8p7B+ZEPfZQUnexXoZ9PxAwk7t Y3nM5IGD7QkZW0GVjhc88R6NiofYyOPER2v4S/7eef5zcluiolfn2pwlSO3EYtiN4Fhi rAUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=miq5sxrk+TH5OlhT9tqJAy5fKLaSHjQ/CF8bIqx0AcI=; b=kMKWmBJR0BlrA8aCmrfTxJYPsB49K9DpEFLziOYLSTq+PDUx9gXyFnkNl4NM7Nr2H7 +I7RyHfJZoBJqpwzLXcaTD+YMUDHnF2gmt+xI58R/m28v65gNKLsLLgb0nbwejhk3lU4 EPwB6wO+U99VV1k1ZmnmXy13IrohhUfrgm5jZHS9Kl+UM8FwTbnUnFo2QyJMdSkctTsg lDhWNgg12J26gf0WurGMJRAyw5LNIpX2tmb7vF5JdP6YU9adVYZo3M/L2nESyW0VFWza kQUShL6Nqt5jpTHc5lkOywkLJiyHAmEOvu0Y87jm8tVotVmq8W3y33G0ht93Hfs6cyYe SfzQ== X-Gm-Message-State: AGi0PuZA6piH3TsIuFijOnizY2ilciK7pGcY3tFhcMeowDD0EGd8jlcL 70TTujsGhgIey0noXRULBbhAsw== X-Google-Smtp-Source: APiQypKte31wA5ZyOEiHXcbyqyBJalW2tp165aDnyV8XVwak3zVSjzBcMNQRh5+9HNa6QgRF2s6bKQ== X-Received: by 2002:a5d:4806:: with SMTP id l6mr26389228wrq.121.1589301547908; Tue, 12 May 2020 09:39:07 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 01/17] target/arm: Convert Neon 3-reg-same VQRDMLAH/VQRDMLSH to decodetree Date: Tue, 12 May 2020 17:38:48 +0100 Message-Id: <20200512163904.10918-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200512163904.10918-1-peter.maydell@linaro.org> References: <20200512163904.10918-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::441; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x441.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon VQRDMLAH and VQRDMLSH insns in the 3-reg-same group to decodetree. These don't use do_3same() because they want to operate on VFP double registers, whose offsets are different from the neon_reg_offset() calculations do_3same does. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- v1->v2: use do_3same() rather than custom do_vqrdlmah() function --- target/arm/neon-dp.decode | 3 +++ target/arm/translate-neon.inc.c | 15 +++++++++++++++ target/arm/translate.c | 14 ++------------ 3 files changed, 20 insertions(+), 12 deletions(-) diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index 6b0b6566d60..04aff438410 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -89,3 +89,6 @@ VMLS_3s 1111 001 1 0 . .. .... .... 1001 . . . 0= .... @3same =20 VMUL_3s 1111 001 0 0 . .. .... .... 1001 . . . 1 .... @3same VMUL_p_3s 1111 001 1 0 . .. .... .... 1001 . . . 1 .... @3same + +VQRDMLAH_3s 1111 001 1 0 . .. .... .... 1011 ... 1 .... @3same +VQRDMLSH_3s 1111 001 1 0 . .. .... .... 1100 ... 1 .... @3same diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 099491b16f3..661b5fc4cf2 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -671,3 +671,18 @@ static bool trans_VMUL_p_3s(DisasContext *s, arg_3same= *a) } return do_3same(s, a, gen_VMUL_p_3s); } + +#define DO_VQRDMLAH(INSN, FUNC) \ + static bool trans_##INSN##_3s(DisasContext *s, arg_3same *a) \ + { \ + if (!dc_isar_feature(aa32_rdm, s)) { \ + return false; \ + } \ + if (a->size !=3D 1 && a->size !=3D 2) { = \ + return false; \ + } \ + return do_3same(s, a, FUNC); \ + } + +DO_VQRDMLAH(VQRDMLAH, gen_gvec_sqrdmlah_qc) +DO_VQRDMLAH(VQRDMLSH, gen_gvec_sqrdmlsh_qc) diff --git a/target/arm/translate.c b/target/arm/translate.c index e3d37ef2e99..1f06cb5a87f 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -5450,12 +5450,7 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) if (!u) { break; /* VPADD */ } - /* VQRDMLAH */ - if (dc_isar_feature(aa32_rdm, s) && (size =3D=3D 1 || size =3D= =3D 2)) { - gen_gvec_sqrdmlah_qc(size, rd_ofs, rn_ofs, rm_ofs, - vec_size, vec_size); - return 0; - } + /* VQRDMLAH : handled by decodetree */ return 1; =20 case NEON_3R_VFM_VQRDMLSH: @@ -5466,12 +5461,7 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) } break; } - /* VQRDMLSH */ - if (dc_isar_feature(aa32_rdm, s) && (size =3D=3D 1 || size =3D= =3D 2)) { - gen_gvec_sqrdmlsh_qc(size, rd_ofs, rn_ofs, rm_ofs, - vec_size, vec_size); - return 0; - } + /* VQRDMLSH : handled by decodetree */ return 1; =20 case NEON_3R_VABD: --=20 2.20.1 From nobody Sat May 18 08:46:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589301650; cv=none; d=zohomail.com; s=zohoarc; b=FQoZrnR18og+RDE3PYKD0rx5BY36K01ePI61NW5TFGPjTE7iufvcetTB+qY/tIE52h9ke3DiAXzj9K+jiKrz818h5Cd4J+c+t9gJiaLATIAQJIUdCvKm2mfMWgurGL01wUuVhQLHPpyTKj1UNLaf0gq1PTKNiGPlmhrXChAXgC4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589301650; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=WX2yhGL+5A/xIoAy1lX3eCz5+m+tDDilj9TcJLBfsZo=; b=B36yo8FcWIUxA8rJKiTjLONGrFFkHSBz+T6OulQqoA4Jg3SXR4hFc2I8j+wJLzvO6O1CMi1yVxHge9tgVVKS8a02Fvy8frb70KwYfcKy4HxSPISpRUX7Od85awrSxNHf5OpNWknZegO5f2tiozN6H0cT2xC9gamicbB4Z+mSyDg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589301650866172.52909167717826; Tue, 12 May 2020 09:40:50 -0700 (PDT) Received: from localhost ([::1]:40086 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jYXxZ-0008Hj-7D for importer@patchew.org; Tue, 12 May 2020 12:40:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50522) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jYXvz-0006Ah-UJ for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:11 -0400 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]:44974) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jYXvy-00061V-QX for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:11 -0400 Received: by mail-wr1-x441.google.com with SMTP id 50so15763962wrc.11 for ; Tue, 12 May 2020 09:39:10 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id o205sm18525981wmo.32.2020.05.12.09.39.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 09:39:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=WX2yhGL+5A/xIoAy1lX3eCz5+m+tDDilj9TcJLBfsZo=; b=R6BJGvEsANjNW2tuQi1uy9ImNNdc/a7cgoXPqR9uVBLZ5bFj/Dq3WWlBitTMxcv0DI e2bx9ilOL4mC1sSHwMOUrnfzTpNh6sLwS+tB98w62JnuwGAQkaEnWwqglmnHJZOYqcii VCbmb95d7DBH1nMDEzoLJH9WFoym2fP7fGhmP6X9ABL7hy6vLwZ5d5FemiJ4CVyvZ7ZC Z+2lnhW+BPBCH9Zb0BiKYBXIRrEgD9VjbwscSfMvVAv8pMQVB1/cD33eGht3tUAiim47 PcCFO5xR+rqR5qw+oWiOiCv1Pq8Y0IQqLMSulp4juctHsTg1gUe78FT8UNaEegmcOsEo v12g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=WX2yhGL+5A/xIoAy1lX3eCz5+m+tDDilj9TcJLBfsZo=; b=aAQ6uPfN4TyPGtWoNUhfeyTIdcUe403Nr/7STsbue0/f5z3Cd0EJ/byhd0U5uykIJ9 AutmO5s2HrbEeiTV2A++PPrAQ19U8YNqO/of9MruNOuPVnKtPPD1jVH7BWkCv8hMaso8 XguZVcK8jDbXBeXtUaUS8mV3Ab1VA8DHIwzEEZaGk6NpalDqCrgVbySn3t8oCB0YbNuh HVjFGSZvO4B6SyWNvsUCqjU1rvhXl7dgqgKb6ooNrmPv6AwyYnHBU9/WRwGlT8p2rZR0 Oi9fPt5uwF6ysskaMghxtZysSvERvkLN7tSlV/JhX/yffgyIXre6x4JugqkE22/gJs7p a5pg== X-Gm-Message-State: AGi0Puap+cnRLuBrXYCxjzDAgxdghEazX/862ym62dhME238bpIagTdh JMv/XZmcFvqqAm8TPZITOJKuVw== X-Google-Smtp-Source: APiQypJe8TC6yZh6d5OBnMVYkr8HWHcyjF9JPG3LHR1Uu5M5wgO7Wd4UsZwCBs9n3BCF5Ttln07ELw== X-Received: by 2002:a5d:66c5:: with SMTP id k5mr25283374wrw.17.1589301549505; Tue, 12 May 2020 09:39:09 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 02/17] target/arm: Convert Neon 3-reg-same SHA to decodetree Date: Tue, 12 May 2020 17:38:49 +0100 Message-Id: <20200512163904.10918-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200512163904.10918-1-peter.maydell@linaro.org> References: <20200512163904.10918-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::441; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x441.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon SHA instructions in the 3-reg-same group to decodetree. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/neon-dp.decode | 10 +++ target/arm/translate-neon.inc.c | 139 ++++++++++++++++++++++++++++++++ target/arm/translate.c | 46 +---------- 3 files changed, 151 insertions(+), 44 deletions(-) diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index 04aff438410..68b0a44793f 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -91,4 +91,14 @@ VMUL_3s 1111 001 0 0 . .. .... .... 1001 . . . = 1 .... @3same VMUL_p_3s 1111 001 1 0 . .. .... .... 1001 . . . 1 .... @3same =20 VQRDMLAH_3s 1111 001 1 0 . .. .... .... 1011 ... 1 .... @3same + +SHA1_3s 1111 001 0 0 . optype:2 .... .... 1100 . 1 . 0 .... \ + vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp +SHA256H_3s 1111 001 1 0 . 00 .... .... 1100 . 1 . 0 .... \ + vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp +SHA256H2_3s 1111 001 1 0 . 01 .... .... 1100 . 1 . 0 .... \ + vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp +SHA256SU1_3s 1111 001 1 0 . 10 .... .... 1100 . 1 . 0 .... \ + vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp + VQRDMLSH_3s 1111 001 1 0 . .. .... .... 1100 ... 1 .... @3same diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 661b5fc4cf2..03b3337e460 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -686,3 +686,142 @@ static bool trans_VMUL_p_3s(DisasContext *s, arg_3sam= e *a) =20 DO_VQRDMLAH(VQRDMLAH, gen_gvec_sqrdmlah_qc) DO_VQRDMLAH(VQRDMLSH, gen_gvec_sqrdmlsh_qc) + +static bool trans_SHA1_3s(DisasContext *s, arg_SHA1_3s *a) +{ + TCGv_ptr ptr1, ptr2, ptr3; + TCGv_i32 tmp; + + if (!arm_dc_feature(s, ARM_FEATURE_NEON) || + !dc_isar_feature(aa32_sha1, s)) { + return false; + } + + /* UNDEF accesses to D16-D31 if they don't exist. */ + if (!dc_isar_feature(aa32_simd_r32, s) && + ((a->vd | a->vn | a->vm) & 0x10)) { + return false; + } + + if ((a->vn | a->vm | a->vd) & 1) { + return false; + } + + if (!vfp_access_check(s)) { + return true; + } + + ptr1 =3D vfp_reg_ptr(true, a->vd); + ptr2 =3D vfp_reg_ptr(true, a->vn); + ptr3 =3D vfp_reg_ptr(true, a->vm); + tmp =3D tcg_const_i32(a->optype); + gen_helper_crypto_sha1_3reg(ptr1, ptr2, ptr3, tmp); + tcg_temp_free_i32(tmp); + tcg_temp_free_ptr(ptr1); + tcg_temp_free_ptr(ptr2); + tcg_temp_free_ptr(ptr3); + + return true; +} + +static bool trans_SHA256H_3s(DisasContext *s, arg_SHA256H_3s *a) +{ + TCGv_ptr ptr1, ptr2, ptr3; + + if (!arm_dc_feature(s, ARM_FEATURE_NEON) || + !dc_isar_feature(aa32_sha2, s)) { + return false; + } + + /* UNDEF accesses to D16-D31 if they don't exist. */ + if (!dc_isar_feature(aa32_simd_r32, s) && + ((a->vd | a->vn | a->vm) & 0x10)) { + return false; + } + + if ((a->vn | a->vm | a->vd) & 1) { + return false; + } + + if (!vfp_access_check(s)) { + return true; + } + + ptr1 =3D vfp_reg_ptr(true, a->vd); + ptr2 =3D vfp_reg_ptr(true, a->vn); + ptr3 =3D vfp_reg_ptr(true, a->vm); + gen_helper_crypto_sha256h(ptr1, ptr2, ptr3); + tcg_temp_free_ptr(ptr1); + tcg_temp_free_ptr(ptr2); + tcg_temp_free_ptr(ptr3); + + return true; +} + +static bool trans_SHA256H2_3s(DisasContext *s, arg_SHA256H2_3s *a) +{ + TCGv_ptr ptr1, ptr2, ptr3; + + if (!arm_dc_feature(s, ARM_FEATURE_NEON) || + !dc_isar_feature(aa32_sha2, s)) { + return false; + } + + /* UNDEF accesses to D16-D31 if they don't exist. */ + if (!dc_isar_feature(aa32_simd_r32, s) && + ((a->vd | a->vn | a->vm) & 0x10)) { + return false; + } + + if ((a->vn | a->vm | a->vd) & 1) { + return false; + } + + if (!vfp_access_check(s)) { + return true; + } + + ptr1 =3D vfp_reg_ptr(true, a->vd); + ptr2 =3D vfp_reg_ptr(true, a->vn); + ptr3 =3D vfp_reg_ptr(true, a->vm); + gen_helper_crypto_sha256h2(ptr1, ptr2, ptr3); + tcg_temp_free_ptr(ptr1); + tcg_temp_free_ptr(ptr2); + tcg_temp_free_ptr(ptr3); + + return true; +} + +static bool trans_SHA256SU1_3s(DisasContext *s, arg_SHA256SU1_3s *a) +{ + TCGv_ptr ptr1, ptr2, ptr3; + + if (!arm_dc_feature(s, ARM_FEATURE_NEON) || + !dc_isar_feature(aa32_sha2, s)) { + return false; + } + + /* UNDEF accesses to D16-D31 if they don't exist. */ + if (!dc_isar_feature(aa32_simd_r32, s) && + ((a->vd | a->vn | a->vm) & 0x10)) { + return false; + } + + if ((a->vn | a->vm | a->vd) & 1) { + return false; + } + + if (!vfp_access_check(s)) { + return true; + } + + ptr1 =3D vfp_reg_ptr(true, a->vd); + ptr2 =3D vfp_reg_ptr(true, a->vn); + ptr3 =3D vfp_reg_ptr(true, a->vm); + gen_helper_crypto_sha256su1(ptr1, ptr2, ptr3); + tcg_temp_free_ptr(ptr1); + tcg_temp_free_ptr(ptr2); + tcg_temp_free_ptr(ptr3); + + return true; +} diff --git a/target/arm/translate.c b/target/arm/translate.c index 1f06cb5a87f..ee2b8d6f6e3 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -5359,7 +5359,7 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) int vec_size; uint32_t imm; TCGv_i32 tmp, tmp2, tmp3, tmp4, tmp5; - TCGv_ptr ptr1, ptr2, ptr3; + TCGv_ptr ptr1, ptr2; TCGv_i64 tmp64; =20 if (!arm_dc_feature(s, ARM_FEATURE_NEON)) { @@ -5403,49 +5403,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) return 1; } switch (op) { - case NEON_3R_SHA: - /* The SHA-1/SHA-256 3-register instructions require special - * treatment here, as their size field is overloaded as an - * op type selector, and they all consume their input in a - * single pass. - */ - if (!q) { - return 1; - } - if (!u) { /* SHA-1 */ - if (!dc_isar_feature(aa32_sha1, s)) { - return 1; - } - ptr1 =3D vfp_reg_ptr(true, rd); - ptr2 =3D vfp_reg_ptr(true, rn); - ptr3 =3D vfp_reg_ptr(true, rm); - tmp4 =3D tcg_const_i32(size); - gen_helper_crypto_sha1_3reg(ptr1, ptr2, ptr3, tmp4); - tcg_temp_free_i32(tmp4); - } else { /* SHA-256 */ - if (!dc_isar_feature(aa32_sha2, s) || size =3D=3D 3) { - return 1; - } - ptr1 =3D vfp_reg_ptr(true, rd); - ptr2 =3D vfp_reg_ptr(true, rn); - ptr3 =3D vfp_reg_ptr(true, rm); - switch (size) { - case 0: - gen_helper_crypto_sha256h(ptr1, ptr2, ptr3); - break; - case 1: - gen_helper_crypto_sha256h2(ptr1, ptr2, ptr3); - break; - case 2: - gen_helper_crypto_sha256su1(ptr1, ptr2, ptr3); - break; - } - } - tcg_temp_free_ptr(ptr1); - tcg_temp_free_ptr(ptr2); - tcg_temp_free_ptr(ptr3); - return 0; - case NEON_3R_VPADD_VQRDMLAH: if (!u) { break; /* VPADD */ @@ -5496,6 +5453,7 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) case NEON_3R_VMUL: case NEON_3R_VML: case NEON_3R_VSHL: + case NEON_3R_SHA: /* Already handled by decodetree */ return 1; } --=20 2.20.1 From nobody Sat May 18 08:46:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589301843; cv=none; d=zohomail.com; s=zohoarc; b=Ol0bvMCGOxcoAaP3dSAB/oSCYuz/3xOTtgUrqrhPEblpE/KUrdLkCprEP1+pNMzq2bmzViesw0MG3UFKigTBLX+5opj0o0c3zyOS4UMHV0n23TCv/VyUmHEfTHn8+DqP43ppfC6oCgzG5b0JDWTxmi5LdeVPyguA/VhfFWgxBsc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589301843; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=NRx9HxkT7GwADPC7+Ge+K4Hy5E9A9Z7xxkBA/YQUIh8=; b=TmT4V7uC59pregazynR1716dxMH+W7biU6TOA6hWuMcPvjPeBHgoM8MxjbhGRqb/vvsZpduUcVPKwCUGezcPHE2n+sWy0G/Z6i3T6YoThl9EhW8cIPT170Gn58Wd2wxXvGH4IleoY03db0ypzLGyYrGxCNyN2cbT4bUXEJIpgW4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589301843715237.95473228519631; Tue, 12 May 2020 09:44:03 -0700 (PDT) Received: from localhost ([::1]:49088 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jYY0g-0003rf-Eb for importer@patchew.org; Tue, 12 May 2020 12:44:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50538) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jYXw1-0006E5-HQ for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:13 -0400 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]:38604) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jYXw0-00062v-DM for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:13 -0400 Received: by mail-wr1-x42e.google.com with SMTP id e1so2364812wrt.5 for ; Tue, 12 May 2020 09:39:12 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id o205sm18525981wmo.32.2020.05.12.09.39.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 09:39:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NRx9HxkT7GwADPC7+Ge+K4Hy5E9A9Z7xxkBA/YQUIh8=; b=Gm2WNXkArhuo0Vmrq9nTihLB4e6i4PkKuI3XcQPj3xwsL4dT7Y3wyMB+GnF0BJsuEq 0DAU6NPdP0IrmajDxc+trJA+dJDrrv/rPvBvoCexQDTHEDhbezHaf4zzCZPZC9W4gYn4 IZAfLrfVrim+78o6FUkyBxQ7QcDVAHes5J1HqqnFw+MfXavLbjs0zzwQy4ltYg1RSx1a IjENSpa7QX+VDiyRv8wlUQYkjAPZ6rwxYjInevf9VCgWBQY9UXqyCUFMHmW0HBKPo3YN UE5L+2TLFa7j/lbkGM/b2NiF2mXQrDwN3KejH7SMuB72Qhmi+mjw19sGiE0l8TUOJJQW XqoQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NRx9HxkT7GwADPC7+Ge+K4Hy5E9A9Z7xxkBA/YQUIh8=; b=I/fm51He/A67bE+bJfKHyDETj1c8rFuWaSY/M74kIHokV9/ej5XnvhN0fVUt2VmtiF aCfSoYTmhyyA9plhpTEc2gEH6NhBfOvyrzCIPPU1JfyCBiBG7CwRZbEJ9GDYFTQHTH5v +2kllh+PT0ACsmNiljtNeqUSH9lwU18u/qxUc0qHIYxmCS49O9EEQr1Iq9AYK/gI/jwj 2rA9/UUvJB64Y6Bm1A2hk3LlePbDqzL3138v6yJFDwVJz2psCe1Wn0ojcMgm1Lx+1Th5 hTgYGZIAiCizdOEclxtbkNm/5oB2F7zTC7pLaPKFVWYSq4E1G2nNww15MhtGtPTnHbZy AdTA== X-Gm-Message-State: AGi0PuZSG6EYlat1FPqG55DGE2TC+Z6zMBmE9RvjUczro3Stb/qzo/yA AL61ikv8/FEC/lgxhA3rmeR6k8h9aF2kKw== X-Google-Smtp-Source: APiQypIJCkDM45ZCUnSF/H9zCtMm29HHyMB7AvDfb0C1fW49/0yECqXnGzWceNPFp9x0O3YfizwJVw== X-Received: by 2002:adf:e4d0:: with SMTP id v16mr25924554wrm.294.1589301550972; Tue, 12 May 2020 09:39:10 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 03/17] target/arm: Convert Neon 64-bit element 3-reg-same insns Date: Tue, 12 May 2020 17:38:50 +0100 Message-Id: <20200512163904.10918-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200512163904.10918-1-peter.maydell@linaro.org> References: <20200512163904.10918-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42e.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the 64-bit element insns in the 3-reg-same group to decodetree. This covers VQSHL, VRSHL and VQRSHL where size=3D=3D0b11. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/neon-dp.decode | 21 ++++++++++++++++++ target/arm/translate-neon.inc.c | 24 +++++++++++++++++++++ target/arm/translate.c | 38 ++------------------------------- 3 files changed, 47 insertions(+), 36 deletions(-) diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index 68b0a44793f..fe649038547 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -73,6 +73,27 @@ VCGE_U_3s 1111 001 1 0 . .. .... .... 0011 . . . = 1 .... @3same VSHL_S_3s 1111 001 0 0 . .. .... .... 0100 . . . 0 .... @3same_rev VSHL_U_3s 1111 001 1 0 . .. .... .... 0100 . . . 0 .... @3same_rev =20 +# Insns operating on 64-bit elements (size!=3D0b11 handled elsewhere) +# The _rev suffix indicates that Vn and Vm are reversed. This is +# the case for shifts. In the Arm ARM these insns are documented +# with the Vm and Vn fields in their usual places, but in the +# assembly the operands are listed "backwards", ie in the order +# Dd, Dm, Dn where other insns use Dd, Dn, Dm. For QEMU we choose +# to consider Vm and Vm as being in different fields in the insn, +# which allows us to avoid special-casing shifts in the trans_ +# function code (where we would otherwise need to manually swap +# the operands over to call Neon helper functions that are shared +# with AArch64 which does not have this odd reversed-operand situation). +@3same_64_rev .... ... . . . 11 .... .... .... . q:1 . . .... \ + &3same vm=3D%vn_dp vn=3D%vm_dp vd=3D%vd_dp size=3D3 + +VQSHL_S64_3s 1111 001 0 0 . .. .... .... 0100 . . . 1 .... @3same_64_r= ev +VQSHL_U64_3s 1111 001 1 0 . .. .... .... 0100 . . . 1 .... @3same_64_r= ev +VRSHL_S64_3s 1111 001 0 0 . .. .... .... 0101 . . . 0 .... @3same_64_r= ev +VRSHL_U64_3s 1111 001 1 0 . .. .... .... 0101 . . . 0 .... @3same_64_r= ev +VQRSHL_S64_3s 1111 001 0 0 . .. .... .... 0101 . . . 1 .... @3same_64_r= ev +VQRSHL_U64_3s 1111 001 1 0 . .. .... .... 0101 . . . 1 .... @3same_64_r= ev + VMAX_S_3s 1111 001 0 0 . .. .... .... 0110 . . . 0 .... @3same VMAX_U_3s 1111 001 1 0 . .. .... .... 0110 . . . 0 .... @3same VMIN_S_3s 1111 001 0 0 . .. .... .... 0110 . . . 1 .... @3same diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 03b3337e460..05c6dcdc9b9 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -825,3 +825,27 @@ static bool trans_SHA256SU1_3s(DisasContext *s, arg_SH= A256SU1_3s *a) =20 return true; } + +#define DO_3SAME_64(INSN, FUNC) \ + static void gen_##INSN##_3s(unsigned vece, uint32_t rd_ofs, \ + uint32_t rn_ofs, uint32_t rm_ofs, \ + uint32_t oprsz, uint32_t maxsz) \ + { \ + static const GVecGen3 op =3D { .fni8 =3D FUNC }; = \ + tcg_gen_gvec_3(rd_ofs, rn_ofs, rm_ofs, oprsz, maxsz, &op); \ + } \ + DO_3SAME(INSN, gen_##INSN##_3s) + +#define DO_3SAME_64_ENV(INSN, FUNC) \ + static void gen_##INSN##_elt(TCGv_i64 d, TCGv_i64 n, TCGv_i64 m) \ + { \ + FUNC(d, cpu_env, n, m); \ + } \ + DO_3SAME_64(INSN, gen_##INSN##_elt) + +DO_3SAME_64(VRSHL_S64, gen_helper_neon_rshl_s64) +DO_3SAME_64(VRSHL_U64, gen_helper_neon_rshl_u64) +DO_3SAME_64_ENV(VQSHL_S64, gen_helper_neon_qshl_s64) +DO_3SAME_64_ENV(VQSHL_U64, gen_helper_neon_qshl_u64) +DO_3SAME_64_ENV(VQRSHL_S64, gen_helper_neon_qrshl_s64) +DO_3SAME_64_ENV(VQRSHL_U64, gen_helper_neon_qrshl_u64) diff --git a/target/arm/translate.c b/target/arm/translate.c index ee2b8d6f6e3..1ce3e182867 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -5459,42 +5459,8 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) } =20 if (size =3D=3D 3) { - /* 64-bit element instructions. */ - for (pass =3D 0; pass < (q ? 2 : 1); pass++) { - neon_load_reg64(cpu_V0, rn + pass); - neon_load_reg64(cpu_V1, rm + pass); - switch (op) { - case NEON_3R_VQSHL: - if (u) { - gen_helper_neon_qshl_u64(cpu_V0, cpu_env, - cpu_V1, cpu_V0); - } else { - gen_helper_neon_qshl_s64(cpu_V0, cpu_env, - cpu_V1, cpu_V0); - } - break; - case NEON_3R_VRSHL: - if (u) { - gen_helper_neon_rshl_u64(cpu_V0, cpu_V1, cpu_V0); - } else { - gen_helper_neon_rshl_s64(cpu_V0, cpu_V1, cpu_V0); - } - break; - case NEON_3R_VQRSHL: - if (u) { - gen_helper_neon_qrshl_u64(cpu_V0, cpu_env, - cpu_V1, cpu_V0); - } else { - gen_helper_neon_qrshl_s64(cpu_V0, cpu_env, - cpu_V1, cpu_V0); - } - break; - default: - abort(); - } - neon_store_reg64(cpu_V0, rd + pass); - } - return 0; + /* 64-bit element instructions: handled by decodetree */ + return 1; } pairwise =3D 0; switch (op) { --=20 2.20.1 From nobody Sat May 18 08:46:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589301658; cv=none; d=zohomail.com; s=zohoarc; b=ZS27/xTa6Cw3HEN+grWW+pgktbOWfWQ0/Sc5cNriXP+OetvwJWarDJDx6wInsHe0GIK7uubZhtWhc8O15/5uJEYgqoHLR+ZNK4JfBPhti/f9kDpDVOxDnXO5qrvBUQ7pI0pKLm8eAA/ybexEOUninX7et5xpI8N0W8EJ5GyFz+U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589301658; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=WtBRFIcGQ2KxMUWXVFcqCaZ+mGBUmkZ1KykSMd1Jqr0=; b=G/aPCawpDwUgLDMlx3Qxqgh54UQrBTEJ5x7z4lpuRPxeBAhxQw7ZbRsKK34tOU5SFAX78pj3nPlxHIHdi6OzomKTvCfS/ylBg0JStbbRyYEDAvU8k2e7G3U5yt1Nvy6mwNCCgW77dhHw6KVVFgfccKBcAkvmNblByEYj8QJU8N0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589301658266243.63078508744263; Tue, 12 May 2020 09:40:58 -0700 (PDT) Received: from localhost ([::1]:40498 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jYXxe-0008Ta-Sh for importer@patchew.org; Tue, 12 May 2020 12:40:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50552) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jYXw3-0006I5-94 for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:15 -0400 Received: from mail-wr1-x442.google.com ([2a00:1450:4864:20::442]:37780) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jYXw2-00065I-8X for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:14 -0400 Received: by mail-wr1-x442.google.com with SMTP id l17so2743785wrr.4 for ; Tue, 12 May 2020 09:39:13 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id o205sm18525981wmo.32.2020.05.12.09.39.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 09:39:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=WtBRFIcGQ2KxMUWXVFcqCaZ+mGBUmkZ1KykSMd1Jqr0=; b=CGmcPMrmum9dYuvevGAaPmNjyPDB3XyeQIuBKnOAj7JCRre1cSXtc54r/k/gpJhES8 l3Rn1K3GHUlkLKwzlq7m9s9ZMx6cxs/Mf5uTWSWC+TgO/RAZe7/c8VCeC+pM8aglhsx9 ra6Rl+HgP9ZYgETZcs9mrHDOlRwXomWmDME2Ymf0zpcp2bWqZE21kBWxO/TdHJCSaiIS qqHN3kb82tUv5tYBEb4WPBLQOs4P+jIuXnbaw88HcC+QgoCCp4j3ebwlnFhDIBx2gpaa DIWa8WN3tBlk5NflG+GH/qrWC4z5yn3AZGEa0D8MJkKlYHAaB800fcJaAFZUDFb4Foux 2FJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=WtBRFIcGQ2KxMUWXVFcqCaZ+mGBUmkZ1KykSMd1Jqr0=; b=P7CLkWvOUzhq7Yq7mymr5/jFbWh30QJ4j/wmohhAwCPGsbQQQL4mdpgfkHDaeB1Rty gWGyy9ZQVR6AjLEd1vvFI/V1SnbzXUr+9ISjXzMOXdaKT1kIgPw1ujteRcqb+HbZToGu Bwixh8KOcX7x9J8Z1RuhXxnPf1Nql74KQC1+V3ZJgyqgukS0BJwdQgauRBVFGeG4vXNA Lko0AxcBBgLjgrodt3Jbe/084lU35U1FojrDo3aPSFHv72shkPmcPuRyzGd20IRz4LT8 bptVBHhvnNb4p72TVOX2ZYBX6qgzk7XfeFYWiMHoqtduOcmsfESg1tNH7aHKjRCUmSWi fciA== X-Gm-Message-State: AGi0Pub2mxEZ2FgkWCjiElzCdSF0WZY28DOfw/IKS4jbnm++prJFD24X 51qhqBXOcPuQgFU0bIPCUU46Yw== X-Google-Smtp-Source: APiQypLhjw4yDnQ2w2m+Au0zpx/8rslNYwU4d4u25Fsy+LPNYtVYa38GJzN1QWLyP4lfE1f/7a16RQ== X-Received: by 2002:adf:d0cb:: with SMTP id z11mr18466923wrh.116.1589301552922; Tue, 12 May 2020 09:39:12 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 04/17] target/arm: Convert Neon VHADD 3-reg-same insns Date: Tue, 12 May 2020 17:38:51 +0100 Message-Id: <20200512163904.10918-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200512163904.10918-1-peter.maydell@linaro.org> References: <20200512163904.10918-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::442; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x442.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon VHADD insns in the 3-reg-same group to decodetree. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/neon-dp.decode | 2 ++ target/arm/translate-neon.inc.c | 24 ++++++++++++++++++++++++ target/arm/translate.c | 4 +--- 3 files changed, 27 insertions(+), 3 deletions(-) diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index fe649038547..3432aacfe90 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -42,6 +42,8 @@ @3same .... ... . . . size:2 .... .... .... . q:1 . . .... \ &3same vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp =20 +VHADD_S_3s 1111 001 0 0 . .. .... .... 0000 . . . 0 .... @3same +VHADD_U_3s 1111 001 1 0 . .. .... .... 0000 . . . 0 .... @3same VQADD_S_3s 1111 001 0 0 . .. .... .... 0000 . . . 1 .... @3same VQADD_U_3s 1111 001 1 0 . .. .... .... 0000 . . . 1 .... @3same =20 diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 05c6dcdc9b9..0418a84a7de 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -849,3 +849,27 @@ DO_3SAME_64_ENV(VQSHL_S64, gen_helper_neon_qshl_s64) DO_3SAME_64_ENV(VQSHL_U64, gen_helper_neon_qshl_u64) DO_3SAME_64_ENV(VQRSHL_S64, gen_helper_neon_qrshl_s64) DO_3SAME_64_ENV(VQRSHL_U64, gen_helper_neon_qrshl_u64) + +#define DO_3SAME_32(INSN, FUNC) \ + static void gen_##INSN##_3s(unsigned vece, uint32_t rd_ofs, \ + uint32_t rn_ofs, uint32_t rm_ofs, \ + uint32_t oprsz, uint32_t maxsz) \ + { \ + static const GVecGen3 ops[4] =3D { \ + { .fni4 =3D gen_helper_neon_##FUNC##8 }, \ + { .fni4 =3D gen_helper_neon_##FUNC##16 }, \ + { .fni4 =3D gen_helper_neon_##FUNC##32 }, \ + { 0 }, \ + }; \ + tcg_gen_gvec_3(rd_ofs, rn_ofs, rm_ofs, oprsz, maxsz, &ops[vece]); \ + } \ + static bool trans_##INSN##_3s(DisasContext *s, arg_3same *a) \ + { \ + if (a->size > 2) { \ + return false; \ + } \ + return do_3same(s, a, gen_##INSN##_3s); \ + } + +DO_3SAME_32(VHADD_S, hadd_s) +DO_3SAME_32(VHADD_U, hadd_u) diff --git a/target/arm/translate.c b/target/arm/translate.c index 1ce3e182867..8d856ccfe96 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -5454,6 +5454,7 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) case NEON_3R_VML: case NEON_3R_VSHL: case NEON_3R_SHA: + case NEON_3R_VHADD: /* Already handled by decodetree */ return 1; } @@ -5534,9 +5535,6 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) tmp2 =3D neon_load_reg(rm, pass); } switch (op) { - case NEON_3R_VHADD: - GEN_NEON_INTEGER_OP(hadd); - break; case NEON_3R_VRHADD: GEN_NEON_INTEGER_OP(rhadd); break; --=20 2.20.1 From nobody Sat May 18 08:46:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589301845; cv=none; d=zohomail.com; s=zohoarc; b=joqjUMxuIAWEjsWTRq/Y8LEanpHepK/jK861GeKrf2U4NMUA2UbxhNnZPS90plT/IO7hSgeat1TmSv+96eJRhrydJP6mMU6ih49HEhkoIIoBZeEtuvD+2sFXwsRN7hCEFgZF2InVAnD5/LUYeOfl4vsnHjZ6v36E4902qLItMkg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589301845; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=gZbv4QYcMc4ag+mpEYLSIdSn4AsHk1XrMWDwADXwYkg=; b=YnUc5CAmEdpPFZIzlBzHEXuWFD7lEnbZ/DC7zuiNXlMQcWtGwsegerPXWnWsifYZWpGsNd1LVoEIvd++4xa4BakTp3lAgPf7Bm4inRUbhXLJIRgEh3FGbFOAe+JmCkcdFYN3WDpxHR8arcYK/1qCGQmu4HjVVkUDO0bScu1xPXU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589301845331409.25020186049596; Tue, 12 May 2020 09:44:05 -0700 (PDT) Received: from localhost ([::1]:49180 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jYY0h-0003uX-IL for importer@patchew.org; Tue, 12 May 2020 12:44:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50566) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jYXw4-0006Le-K4 for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:16 -0400 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]:37780) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jYXw3-000661-KY for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:16 -0400 Received: by mail-wr1-x441.google.com with SMTP id l17so2743943wrr.4 for ; Tue, 12 May 2020 09:39:15 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id o205sm18525981wmo.32.2020.05.12.09.39.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 09:39:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gZbv4QYcMc4ag+mpEYLSIdSn4AsHk1XrMWDwADXwYkg=; b=xMMnD5DEWU3BaUbIVBPyfDy31d3E/yCJj/GqOcmztx/qiVjsvT+9dklvlkwReZs16h pg/Ivm9Djal4nzGKl269LMqr/e6KZdxNpr80Jad3FEIaqjw6yk/KRTzxSxLmN7t/Kgsx j0/p+RjW+/WB/B1qbuBJQx0twGdf7o0bAo23la1Beip881N0qU+4k7vxC34iALddmfCv r30ixA/6EtZz2HHUAule/9kd4qN5oeoQBpUgDPoSFlIREW9cL1b2ykbbL23Fb2vv1EVe M2NPASvUcNsHaEJho+fWP5skEmb/TmBz7dDz9Er1/rFSThJh/sn8kr9dLgZp5mMihBW2 WRGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gZbv4QYcMc4ag+mpEYLSIdSn4AsHk1XrMWDwADXwYkg=; b=t3wJ00WwuBKXUQobsySNlDS0ITMojjXTIiE0yMiMGgetX956viApYQbADbqQjrryY1 qdw7/lCz8AaiOBUwbF9vZj++2F7rGTVE1JDFuRYjXaSP/zHUncVD2mHUxa7NvmjmKCpp Za5ZdngsUFRplwDIJzimDPW+VgOZmX7cfb5r0DO/38HPcdCqjRzoBqn3GZEiIn1Sfuzr +XZC+BfbPcjxRggkOkJLa0KpozWoFXPCOTLO+H4snpX1LO1DCgpQxoO6P7x7j0CMEhTA NooHKiP2URoDjwYUlwZJ9b6DlE3DfsQ4NizxrG61MRr5PW4cnHG3Oq+VTypLsP3R3+zi Pq1w== X-Gm-Message-State: AGi0PuZPoobdPDMPDLK/mi8AXGbxkfo6WwFv8Nxb08Ydjek4spmaBjbs uwkt+U1AlsSuSMGCtwarUyZMYA== X-Google-Smtp-Source: APiQypLpTKZ/Px02HZFsIQRf/Yr6ofKjxtIBqNbQXbqr90+nKUFnT/4rJUt7MbApk5cfdyDDGmNHLg== X-Received: by 2002:a5d:694d:: with SMTP id r13mr15447595wrw.238.1589301554341; Tue, 12 May 2020 09:39:14 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 05/17] target/arm: Convert Neon VABA/VABD 3-reg-same to decodetree Date: Tue, 12 May 2020 17:38:52 +0100 Message-Id: <20200512163904.10918-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200512163904.10918-1-peter.maydell@linaro.org> References: <20200512163904.10918-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::441; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x441.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon VABA and VABD insns in the 3-reg-same group to decodetree. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/neon-dp.decode | 6 ++++++ target/arm/translate-neon.inc.c | 4 ++++ target/arm/translate.c | 22 ++-------------------- 3 files changed, 12 insertions(+), 20 deletions(-) diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index 3432aacfe90..25c08a4170d 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -101,6 +101,12 @@ VMAX_U_3s 1111 001 1 0 . .. .... .... 0110 . . = . 0 .... @3same VMIN_S_3s 1111 001 0 0 . .. .... .... 0110 . . . 1 .... @3same VMIN_U_3s 1111 001 1 0 . .. .... .... 0110 . . . 1 .... @3same =20 +VABD_S_3s 1111 001 0 0 . .. .... .... 0111 . . . 0 .... @3same +VABD_U_3s 1111 001 1 0 . .. .... .... 0111 . . . 0 .... @3same + +VABA_S_3s 1111 001 0 0 . .. .... .... 0111 . . . 1 .... @3same +VABA_U_3s 1111 001 1 0 . .. .... .... 0111 . . . 1 .... @3same + VADD_3s 1111 001 0 0 . .. .... .... 1000 . . . 0 .... @3same VSUB_3s 1111 001 1 0 . .. .... .... 1000 . . . 0 .... @3same =20 diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 0418a84a7de..20f0f2c8d83 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -641,6 +641,10 @@ DO_3SAME_NO_SZ_3(VMUL, tcg_gen_gvec_mul) DO_3SAME_NO_SZ_3(VMLA, gen_gvec_mla) DO_3SAME_NO_SZ_3(VMLS, gen_gvec_mls) DO_3SAME_NO_SZ_3(VTST, gen_gvec_cmtst) +DO_3SAME_NO_SZ_3(VABD_S, gen_gvec_sabd) +DO_3SAME_NO_SZ_3(VABA_S, gen_gvec_saba) +DO_3SAME_NO_SZ_3(VABD_U, gen_gvec_uabd) +DO_3SAME_NO_SZ_3(VABA_U, gen_gvec_uaba) =20 #define DO_3SAME_CMP(INSN, COND) \ static void gen_##INSN##_3s(unsigned vece, uint32_t rd_ofs, \ diff --git a/target/arm/translate.c b/target/arm/translate.c index 8d856ccfe96..2c842df4451 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -5421,26 +5421,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) /* VQRDMLSH : handled by decodetree */ return 1; =20 - case NEON_3R_VABD: - if (u) { - gen_gvec_uabd(size, rd_ofs, rn_ofs, rm_ofs, - vec_size, vec_size); - } else { - gen_gvec_sabd(size, rd_ofs, rn_ofs, rm_ofs, - vec_size, vec_size); - } - return 0; - - case NEON_3R_VABA: - if (u) { - gen_gvec_uaba(size, rd_ofs, rn_ofs, rm_ofs, - vec_size, vec_size); - } else { - gen_gvec_saba(size, rd_ofs, rn_ofs, rm_ofs, - vec_size, vec_size); - } - return 0; - case NEON_3R_VADD_VSUB: case NEON_3R_LOGIC: case NEON_3R_VMAX: @@ -5455,6 +5435,8 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) case NEON_3R_VSHL: case NEON_3R_SHA: case NEON_3R_VHADD: + case NEON_3R_VABD: + case NEON_3R_VABA: /* Already handled by decodetree */ return 1; } --=20 2.20.1 From nobody Sat May 18 08:46:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589302043; cv=none; d=zohomail.com; s=zohoarc; b=loFd8mwSUgX6Ddkxv8jWVMkyw9TGmGH2W88iDJSgn6bR59OynafkY7LRlLAC7RpDGQtYOsDaoc85NbSEN3fwvEv0z0PGY+dSwMLpwsvBsg4I+dznzPf9a9fttTxx+jEIhdZ7mxdo+OVrbqcc6Yb2hm40ah6GNcQsfIVrbstQ/ig= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589302043; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=yPOdog2d2dwbfs28fCvHLLSNJsF30PqsU53nWUWzmY4=; b=H8DVvsPdGLhwf3QCzRv9fZxlRrM98pXDGm12V9Mc5+hQ8rQn67srj7YGT3uWVXpAunsqRJ64g4J5vk/ZbX0M6ge4snCLgXGBgwB1CSS/FERqedy1CtWo7nK2qFCkdTBj3pZDe7DeWl+JR+DxLcHiqDfxjjKTLlWK76UVjT1QsIQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 158930204331137.318224470244104; Tue, 12 May 2020 09:47:23 -0700 (PDT) Received: from localhost ([::1]:58482 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jYY3t-0008N6-VZ for importer@patchew.org; Tue, 12 May 2020 12:47:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50588) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jYXw6-0006PZ-3D for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:18 -0400 Received: from mail-wr1-x443.google.com ([2a00:1450:4864:20::443]:37782) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jYXw4-00066Z-Rz for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:17 -0400 Received: by mail-wr1-x443.google.com with SMTP id l17so2744068wrr.4 for ; Tue, 12 May 2020 09:39:16 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id o205sm18525981wmo.32.2020.05.12.09.39.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 09:39:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yPOdog2d2dwbfs28fCvHLLSNJsF30PqsU53nWUWzmY4=; b=iNkpzGLPqI/BguCb4PU0EiKPZ1SzO9fFeH/STZkGC1996Mnh4EAul17bthAghjtTqq i77JbCi0X79uEGcy26oHCu2lz1EIUml5KvMYDzQf27MdzSoWAJgeWxASN83XkMEZaxeQ 45KcsNRWhVjgje4PPZrs+qslSm68hNUgvkONMVXiWRhHsd6f0zLtQZygWFLKj9pOfIMc DdvLGJwOVzya/roaY1TalX/gwSHAgihQxk27CtrR2MH0sq+nbKR9XDa3Tn7wRYo5pO4+ OHNjr8ZlwoTyQQwy4gpSh8H//0eVJvc/PFE5S1drPpT+XF27oV4TjNjtsEGPrOBymjFo nA5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yPOdog2d2dwbfs28fCvHLLSNJsF30PqsU53nWUWzmY4=; b=aOUQz+rkxDEIYpIbRDN0BAKvML+MpCy3ZxceeBG2vZxJnjCkv+ZG2qOkuFxDU5dyMY tW3UQ+qFlvsviGf4ecRTML9mmebDWW1jHVR+AxkadAHoeYoFjd/8YRdxePi41PBQz8N+ O0mySA8z7ioTVLSAdW030HI3tyrwgABBcgWUSoloyAHGRPkHkB/OQTy0MMiQ8aYDawlj iYeSSjXX5puAh5HfWXX22d03PuDVpPnE5Bm5AxEzVUILJ2CzJd3fSB02xMo+G7KVuBkn 6UqvePAu5omHA4y4A7/Wrg810bhP9sdJwq7n70W6z8/k2JSkIN+dVVVcMEMxelm3SZOx HXtg== X-Gm-Message-State: AGi0PuZygatJcoH5hptgZoo635HUS8F+UqTl8pvphWhurN9Ann6HrQI4 RIyTiWvXe/01xqX14p9KshEbh14HazCSxg== X-Google-Smtp-Source: APiQypI5TN3IvpHQ4SR6elcs3R5s2Wv1DQvIaD3bGlKhmZAA4YNwVrLG63JgjmG68xsJJ+IEG3ZyBQ== X-Received: by 2002:adf:ee87:: with SMTP id b7mr26448992wro.104.1589301555588; Tue, 12 May 2020 09:39:15 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 06/17] target/arm: Convert Neon VRHADD, VHSUB 3-reg-same insns to decodetree Date: Tue, 12 May 2020 17:38:53 +0100 Message-Id: <20200512163904.10918-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200512163904.10918-1-peter.maydell@linaro.org> References: <20200512163904.10918-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::443; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x443.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon VRHADD and VHSUB 3-reg-same insns to decodetree. (These are all the other insns in 3-reg-same which were using GEN_NEON_INTEGER_OP() and which are not pairwise or reversed-operands.) Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/neon-dp.decode | 6 ++++++ target/arm/translate-neon.inc.c | 4 ++++ target/arm/translate.c | 8 ++------ 3 files changed, 12 insertions(+), 6 deletions(-) diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index 25c08a4170d..353cb1f4992 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -47,6 +47,9 @@ VHADD_U_3s 1111 001 1 0 . .. .... .... 0000 . . . 0= .... @3same VQADD_S_3s 1111 001 0 0 . .. .... .... 0000 . . . 1 .... @3same VQADD_U_3s 1111 001 1 0 . .. .... .... 0000 . . . 1 .... @3same =20 +VRHADD_S_3s 1111 001 0 0 . .. .... .... 0001 . . . 0 .... @3same +VRHADD_U_3s 1111 001 1 0 . .. .... .... 0001 . . . 0 .... @3same + @3same_logic .... ... . . . .. .... .... .... . q:1 .. .... \ &3same vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp size=3D0 =20 @@ -59,6 +62,9 @@ VBSL_3s 1111 001 1 0 . 01 .... .... 0001 ... 1 .= ... @3same_logic VBIT_3s 1111 001 1 0 . 10 .... .... 0001 ... 1 .... @3same_logic VBIF_3s 1111 001 1 0 . 11 .... .... 0001 ... 1 .... @3same_logic =20 +VHSUB_S_3s 1111 001 0 0 . .. .... .... 0010 . . . 0 .... @3same +VHSUB_U_3s 1111 001 1 0 . .. .... .... 0010 . . . 0 .... @3same + VQSUB_S_3s 1111 001 0 0 . .. .... .... 0010 . . . 1 .... @3same VQSUB_U_3s 1111 001 1 0 . .. .... .... 0010 . . . 1 .... @3same =20 diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 20f0f2c8d83..e9da47171c6 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -877,3 +877,7 @@ DO_3SAME_64_ENV(VQRSHL_U64, gen_helper_neon_qrshl_u64) =20 DO_3SAME_32(VHADD_S, hadd_s) DO_3SAME_32(VHADD_U, hadd_u) +DO_3SAME_32(VHSUB_S, hsub_s) +DO_3SAME_32(VHSUB_U, hsub_u) +DO_3SAME_32(VRHADD_S, rhadd_s) +DO_3SAME_32(VRHADD_U, rhadd_u) diff --git a/target/arm/translate.c b/target/arm/translate.c index 2c842df4451..ebb899d846e 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -5435,6 +5435,8 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) case NEON_3R_VSHL: case NEON_3R_SHA: case NEON_3R_VHADD: + case NEON_3R_VRHADD: + case NEON_3R_VHSUB: case NEON_3R_VABD: case NEON_3R_VABA: /* Already handled by decodetree */ @@ -5517,12 +5519,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) tmp2 =3D neon_load_reg(rm, pass); } switch (op) { - case NEON_3R_VRHADD: - GEN_NEON_INTEGER_OP(rhadd); - break; - case NEON_3R_VHSUB: - GEN_NEON_INTEGER_OP(hsub); - break; case NEON_3R_VQSHL: GEN_NEON_INTEGER_OP_ENV(qshl); break; --=20 2.20.1 From nobody Sat May 18 08:46:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589302247; cv=none; d=zohomail.com; s=zohoarc; b=Z2FbpC8w2So9dY2fXSoum0pXyIoOWICNPw+RXLuFkB93KSnsXokl9HrHlFl8qKfGUUc6GkefvmLM4kWYcotIyWfHbFJJAsczlcM4ZjQwbdBPKJaNh3SUUUUo1pBI4W3ZDEwbKBk4TJrc7dSQx2RE43ttSGWJ2Vod8dSiaPAI8Xk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589302247; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=PpEsdABitILB0n477zrURAQAbSkegxBFrS84gleg/2g=; b=PykExQBpcG//Xd6NX3TI4z7zP5YNne7HBRR0iydYarxe/DXoiua520RxuaNJ+NNv6VFDbko5qsAxEhhHLys05WUarVVZrlqWUkXu/K2iuvzDnyEVpse1U14ibIp+GOQDbZC6aV8KTHUPTYdqAbNAHPzP+UETxvK2NtpgNQbLzeo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589302247202999.4548780447398; Tue, 12 May 2020 09:50:47 -0700 (PDT) Received: from localhost ([::1]:37706 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jYY7B-0003ZT-PD for importer@patchew.org; Tue, 12 May 2020 12:50:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50610) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jYXw7-0006Td-Px for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:19 -0400 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]:53513) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jYXw6-000675-CF for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:19 -0400 Received: by mail-wm1-x32f.google.com with SMTP id k12so22509001wmj.3 for ; Tue, 12 May 2020 09:39:17 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id o205sm18525981wmo.32.2020.05.12.09.39.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 09:39:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PpEsdABitILB0n477zrURAQAbSkegxBFrS84gleg/2g=; b=XCaxqqlJpeNtUuZhvdYnjmF9wr3CxEs9j2mndyw5MbFOfLj+ez3gZe3PeS2zzInC1X 9aJkFKbbWpaRNBo8cL1pgc2Cuqp1oueYZ8JtYujVwyyBut2SHKC2IKPjWVvRsHeAbkcK IAJ+fk8VGpuJpMuanOlQKXcvE9A9N7UsSh9rQuu6e/MG70cWoU1bSAt2bfka2G3fdhZP uvN9fWzyz2iGaC1ydYjHjkE1mxqHErOGUlFijGLS9vMhEDvvzc1Y8MwOsVmkgxHzwJSA k304bfkU7xMR2rkrYIjzZL0KoTn+H8XhxuzR8GohPOZW+r/HVOLj3b/9k7lggIyUjBk4 gOeA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PpEsdABitILB0n477zrURAQAbSkegxBFrS84gleg/2g=; b=TpX7eBVAgJg1LfmhIhodQKPBGkaKrsFv9y+N2sYXp6hCLpeSpJYY+Xx6XRwiQKOPh2 tUihkPYf4FigsQq20ygGOX7/u1AeQM08P+MuhHSGSTudcrFSiA5/V5rGmRVcqlLhlrXv LC5J9O2sBlSEI2BibstwHntZQ15hrzG/6HTYVJ4B8JOTeUDSLXL/BW36o9nATW/6I4BG rbHPe1fqqgvUWRY5vA6wYCteQ9YM2GGUKTCvdZhjOEvtks92eFUozI4oRyLsp+GP5eR2 WmxgX4/jea478putCX0s37cKJ/w7nRuAn+Ahg4WSv/VF58v2WJIV+XrAWS+f/0/HkXKh uQ0A== X-Gm-Message-State: AGi0Puaup0+wKX78LeVf99vpTxPGVvi8I09XJvuNxjIuzj85M5apy1nl MTBeTxbVu90lBEF3XwV8iTCg/A== X-Google-Smtp-Source: APiQypJUr4F9gg0V2PGbaakM8F35k2z2EFTLVuz4C5jfluy7uNSF9DfcFUcDiDmBWRs7vTru+m5cmg== X-Received: by 2002:a7b:c046:: with SMTP id u6mr8336567wmc.57.1589301556894; Tue, 12 May 2020 09:39:16 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 07/17] target/arm: Convert Neon VQSHL, VRSHL, VQRSHL 3-reg-same insns to decodetree Date: Tue, 12 May 2020 17:38:54 +0100 Message-Id: <20200512163904.10918-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200512163904.10918-1-peter.maydell@linaro.org> References: <20200512163904.10918-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32f.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the VQSHL, VRSHL and VQRSHL insns in the 3-reg-same group to decodetree. We have already implemented the size=3D=3D0b11 case of these insns; this commit handles the remaining sizes. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/neon-dp.decode | 47 +++++++++++++++++++++++---------- target/arm/translate-neon.inc.c | 43 ++++++++++++++++++++++++++++++ target/arm/translate.c | 22 +++------------ 3 files changed, 79 insertions(+), 33 deletions(-) diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index 353cb1f4992..e0da5a39fc2 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -74,14 +74,6 @@ VCGE_S_3s 1111 001 0 0 . .. .... .... 0011 . . . = 1 .... @3same VCGE_U_3s 1111 001 1 0 . .. .... .... 0011 . . . 1 .... @3same =20 # The shift operations are of the form Vd =3D Vm << Vn. -# By reversing the names of the fields here, we can use standard expanders. -@3same_rev .... ... . . . size:2 .... .... .... . q:1 . . .... \ - &3same vn=3D%vm_dp vm=3D%vn_dp vd=3D%vd_dp - -VSHL_S_3s 1111 001 0 0 . .. .... .... 0100 . . . 0 .... @3same_rev -VSHL_U_3s 1111 001 1 0 . .. .... .... 0100 . . . 0 .... @3same_rev - -# Insns operating on 64-bit elements (size!=3D0b11 handled elsewhere) # The _rev suffix indicates that Vn and Vm are reversed. This is # the case for shifts. In the Arm ARM these insns are documented # with the Vm and Vn fields in their usual places, but in the @@ -92,15 +84,42 @@ VSHL_U_3s 1111 001 1 0 . .. .... .... 0100 . . .= 0 .... @3same_rev # function code (where we would otherwise need to manually swap # the operands over to call Neon helper functions that are shared # with AArch64 which does not have this odd reversed-operand situation). +@3same_rev .... ... . . . size:2 .... .... .... . q:1 . . .... \ + &3same vn=3D%vm_dp vm=3D%vn_dp vd=3D%vd_dp + +VSHL_S_3s 1111 001 0 0 . .. .... .... 0100 . . . 0 .... @3same_rev +VSHL_U_3s 1111 001 1 0 . .. .... .... 0100 . . . 0 .... @3same_rev + +# Insns operating on 64-bit elements (size!=3D0b11 handled elsewhere) +# The _rev suffix indicates that Vn and Vm are reversed (as explained +# by the comment for the @3same_rev format). @3same_64_rev .... ... . . . 11 .... .... .... . q:1 . . .... \ &3same vm=3D%vn_dp vn=3D%vm_dp vd=3D%vd_dp size=3D3 =20 -VQSHL_S64_3s 1111 001 0 0 . .. .... .... 0100 . . . 1 .... @3same_64_r= ev -VQSHL_U64_3s 1111 001 1 0 . .. .... .... 0100 . . . 1 .... @3same_64_r= ev -VRSHL_S64_3s 1111 001 0 0 . .. .... .... 0101 . . . 0 .... @3same_64_r= ev -VRSHL_U64_3s 1111 001 1 0 . .. .... .... 0101 . . . 0 .... @3same_64_r= ev -VQRSHL_S64_3s 1111 001 0 0 . .. .... .... 0101 . . . 1 .... @3same_64_r= ev -VQRSHL_U64_3s 1111 001 1 0 . .. .... .... 0101 . . . 1 .... @3same_64_r= ev +{ + VQSHL_S64_3s 1111 001 0 0 . .. .... .... 0100 . . . 1 .... @3same_64_r= ev + VQSHL_S_3s 1111 001 0 0 . .. .... .... 0100 . . . 1 .... @3same_rev +} +{ + VQSHL_U64_3s 1111 001 1 0 . .. .... .... 0100 . . . 1 .... @3same_64_r= ev + VQSHL_U_3s 1111 001 1 0 . .. .... .... 0100 . . . 1 .... @3same_rev +} +{ + VRSHL_S64_3s 1111 001 0 0 . .. .... .... 0101 . . . 0 .... @3same_64_r= ev + VRSHL_S_3s 1111 001 0 0 . .. .... .... 0101 . . . 0 .... @3same_rev +} +{ + VRSHL_U64_3s 1111 001 1 0 . .. .... .... 0101 . . . 0 .... @3same_64_r= ev + VRSHL_U_3s 1111 001 1 0 . .. .... .... 0101 . . . 0 .... @3same_rev +} +{ + VQRSHL_S64_3s 1111 001 0 0 . .. .... .... 0101 . . . 1 .... @3same_64_r= ev + VQRSHL_S_3s 1111 001 0 0 . .. .... .... 0101 . . . 1 .... @3same_rev +} +{ + VQRSHL_U64_3s 1111 001 1 0 . .. .... .... 0101 . . . 1 .... @3same_64_r= ev + VQRSHL_U_3s 1111 001 1 0 . .. .... .... 0101 . . . 1 .... @3same_rev +} =20 VMAX_S_3s 1111 001 0 0 . .. .... .... 0110 . . . 0 .... @3same VMAX_U_3s 1111 001 1 0 . .. .... .... 0110 . . . 0 .... @3same diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index e9da47171c6..7097c18f334 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -875,9 +875,52 @@ DO_3SAME_64_ENV(VQRSHL_U64, gen_helper_neon_qrshl_u64) return do_3same(s, a, gen_##INSN##_3s); \ } =20 +/* + * Some helper functions need to be passed the cpu_env. In order + * to use those with the gvec APIs like tcg_gen_gvec_3() we need + * to create wrapper functions whose prototype is a NeonGenTwoOpFn() + * and which call a NeonGenTwoOpEnvFn(). + */ +#define WRAP_ENV_FN(WRAPNAME, FUNC) \ + static void WRAPNAME(TCGv_i32 d, TCGv_i32 n, TCGv_i32 m) \ + { \ + FUNC(d, cpu_env, n, m); \ + } + +#define DO_3SAME_32_ENV(INSN, FUNC) \ + WRAP_ENV_FN(gen_##INSN##_tramp8, gen_helper_neon_##FUNC##8); \ + WRAP_ENV_FN(gen_##INSN##_tramp16, gen_helper_neon_##FUNC##16); \ + WRAP_ENV_FN(gen_##INSN##_tramp32, gen_helper_neon_##FUNC##32); \ + static void gen_##INSN##_3s(unsigned vece, uint32_t rd_ofs, \ + uint32_t rn_ofs, uint32_t rm_ofs, \ + uint32_t oprsz, uint32_t maxsz) \ + { \ + static const GVecGen3 ops[4] =3D { \ + { .fni4 =3D gen_##INSN##_tramp8 }, \ + { .fni4 =3D gen_##INSN##_tramp16 }, \ + { .fni4 =3D gen_##INSN##_tramp32 }, \ + { 0 }, \ + }; \ + tcg_gen_gvec_3(rd_ofs, rn_ofs, rm_ofs, oprsz, maxsz, &ops[vece]); \ + } \ + static bool trans_##INSN##_3s(DisasContext *s, arg_3same *a) \ + { \ + if (a->size > 2) { \ + return false; \ + } \ + return do_3same(s, a, gen_##INSN##_3s); \ + } + DO_3SAME_32(VHADD_S, hadd_s) DO_3SAME_32(VHADD_U, hadd_u) DO_3SAME_32(VHSUB_S, hsub_s) DO_3SAME_32(VHSUB_U, hsub_u) DO_3SAME_32(VRHADD_S, rhadd_s) DO_3SAME_32(VRHADD_U, rhadd_u) +DO_3SAME_32(VRSHL_S, rshl_s) +DO_3SAME_32(VRSHL_U, rshl_u) + +DO_3SAME_32_ENV(VQSHL_S, qshl_s) +DO_3SAME_32_ENV(VQSHL_U, qshl_u) +DO_3SAME_32_ENV(VQRSHL_S, qrshl_s) +DO_3SAME_32_ENV(VQRSHL_U, qrshl_u) diff --git a/target/arm/translate.c b/target/arm/translate.c index ebb899d846e..3aabb18720b 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -5439,6 +5439,9 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) case NEON_3R_VHSUB: case NEON_3R_VABD: case NEON_3R_VABA: + case NEON_3R_VQSHL: + case NEON_3R_VRSHL: + case NEON_3R_VQRSHL: /* Already handled by decodetree */ return 1; } @@ -5449,17 +5452,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) } pairwise =3D 0; switch (op) { - case NEON_3R_VQSHL: - case NEON_3R_VRSHL: - case NEON_3R_VQRSHL: - { - int rtmp; - /* Shift instruction operands are reversed. */ - rtmp =3D rn; - rn =3D rm; - rm =3D rtmp; - } - break; case NEON_3R_VPADD_VQRDMLAH: case NEON_3R_VPMAX: case NEON_3R_VPMIN: @@ -5519,14 +5511,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) tmp2 =3D neon_load_reg(rm, pass); } switch (op) { - case NEON_3R_VQSHL: - GEN_NEON_INTEGER_OP_ENV(qshl); - break; - case NEON_3R_VRSHL: - GEN_NEON_INTEGER_OP(rshl); - break; - case NEON_3R_VQRSHL: - GEN_NEON_INTEGER_OP_ENV(qrshl); break; case NEON_3R_VPMAX: GEN_NEON_INTEGER_OP(pmax); --=20 2.20.1 From nobody Sat May 18 08:46:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589302000; cv=none; d=zohomail.com; s=zohoarc; b=KE/e+T7QGIM/8T3qqpP+ammfKCDhayl8JJdiOoKf+hGxIbAkjSkIhsCqMEgVzGQ+jmdjNWBpFih5L4Gj5Wq7oLtBjN8mBL37N3tCU5eFv4yyIwUKcItA4NNVpyuiEYrHBnefqnZ5vkNE1EFITDSJFCKlMo6UI27ZypHqm8WAxZc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589302000; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=DO73kxC/ieb1z/wK6QeuNNqcIXsVWMQQ5sDynNEanWc=; b=cbhiPCHkyMTY2hiyrSnMwlFK+lXN+8t0aj7JqR+EFFv3rBNg6cq9+rxrdOqZNI4YXyPXjWgevGIDbFhysWqjbxot8eB0E8eWH+27khDAk5k4cU2E9le6SePttdjBd8nrHzODtowL/znqLQi4uumM9gj09yZc2SNvDPfN8C+Mzko= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589302000462397.20542028748355; Tue, 12 May 2020 09:46:40 -0700 (PDT) Received: from localhost ([::1]:57290 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jYY3C-0007mM-RE for importer@patchew.org; Tue, 12 May 2020 12:46:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50626) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jYXw9-0006Xx-H8 for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:21 -0400 Received: from mail-wr1-x443.google.com ([2a00:1450:4864:20::443]:39442) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jYXw8-00067w-EA for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:21 -0400 Received: by mail-wr1-x443.google.com with SMTP id l18so16281850wrn.6 for ; Tue, 12 May 2020 09:39:20 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id o205sm18525981wmo.32.2020.05.12.09.39.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 09:39:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DO73kxC/ieb1z/wK6QeuNNqcIXsVWMQQ5sDynNEanWc=; b=MN77JafK1S/SsT5S+Me5dRKdjuh1PATCiSXfCAzYb6/VAIkfY27NEdwBwSarDYBVU2 /BHfTGG3ZNlsJthj2rUWpC4gnR+ija1RpHBbg4QVMBMGb7W5XLzolufYnhTD/dYWhQNd qAkzKZrF7oqeRLW6AiAZIHrzgai6yapwrbdoGfeHy1fazzCQghPeOTKLNOTpfNr5anyO J7A/FNIhXjBh1+RW3V/dwMDVLmmOy1shCfuCB+MoOnBOhnJq6sNzOaIuLILRtwz8FtXf LlTZ3/4dK13as0cLCifBg+FVcPylFWiDhj6bpnXV3myb90loImNEcWwG/Ml2ilzyIUXL x4Qw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DO73kxC/ieb1z/wK6QeuNNqcIXsVWMQQ5sDynNEanWc=; b=cAI4l9bJLS0ePZodXTUtMmAuE73DF940c7J7UF8WsUgd9dTDjs9+i3U/+kujsytJWf 7VEFtNQ3fU4tvcHlw+m9oKrTlewP182rTJxrdLJdP9qPJ8PQgREUryKt/wMzmJus0TWa OG/C/OZvn0ZyxAwVdywRlNbBb9CNJy0Lb5NlIzrYK2bV0MtsOgrDqAIK+JzQHdzfrXwI ntwFI+AV9j0SJtD53UwfXbQrG1r3V5XiNUwnvxz7JCzsFerd3LXCt+QHd6bnMt2V9JXN 1UIJ1OpDw1/cLh9hun61LsRCiP5a7w8faq61M7aF/I84SC6yZE+uBQRT63ks+K0ffZTp NBgQ== X-Gm-Message-State: AGi0Pua7iAOVa34jYqY27+zYW1Maj5KFqFdYW6RwT7ObvEU1mv29Tt7d 5bJs7QowVsYhpjzmpgn8gzQihoQS4EB7Pg== X-Google-Smtp-Source: APiQypKKATuRdb92nWiylLf3aQE8SKv8RK1ewXrdgyExc9B60V40SaGpqQdZhLjk83CQse3e7kuktg== X-Received: by 2002:adf:814a:: with SMTP id 68mr26355317wrm.177.1589301559036; Tue, 12 May 2020 09:39:19 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 08/17] target/arm: Convert Neon VPMAX/VPMIN 3-reg-same insns to decodetree Date: Tue, 12 May 2020 17:38:55 +0100 Message-Id: <20200512163904.10918-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200512163904.10918-1-peter.maydell@linaro.org> References: <20200512163904.10918-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::443; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x443.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon integer VPMAX and VPMIN 3-reg-same insns to decodetree. These are 'pairwise' operations. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/neon-dp.decode | 9 +++++ target/arm/translate-neon.inc.c | 71 +++++++++++++++++++++++++++++++++ target/arm/translate.c | 17 +------- 3 files changed, 82 insertions(+), 15 deletions(-) diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index e0da5a39fc2..03f39a0b44b 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -42,6 +42,9 @@ @3same .... ... . . . size:2 .... .... .... . q:1 . . .... \ &3same vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp =20 +@3same_q0 .... ... . . . size:2 .... .... .... . 0 . . .... \ + &3same vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp q=3D0 + VHADD_S_3s 1111 001 0 0 . .. .... .... 0000 . . . 0 .... @3same VHADD_U_3s 1111 001 1 0 . .. .... .... 0000 . . . 0 .... @3same VQADD_S_3s 1111 001 0 0 . .. .... .... 0000 . . . 1 .... @3same @@ -144,6 +147,12 @@ VMLS_3s 1111 001 1 0 . .. .... .... 1001 . . = . 0 .... @3same VMUL_3s 1111 001 0 0 . .. .... .... 1001 . . . 1 .... @3same VMUL_p_3s 1111 001 1 0 . .. .... .... 1001 . . . 1 .... @3same =20 +VPMAX_S_3s 1111 001 0 0 . .. .... .... 1010 . . . 0 .... @3same_q0 +VPMAX_U_3s 1111 001 1 0 . .. .... .... 1010 . . . 0 .... @3same_q0 + +VPMIN_S_3s 1111 001 0 0 . .. .... .... 1010 . . . 1 .... @3same_q0 +VPMIN_U_3s 1111 001 1 0 . .. .... .... 1010 . . . 1 .... @3same_q0 + VQRDMLAH_3s 1111 001 1 0 . .. .... .... 1011 ... 1 .... @3same =20 SHA1_3s 1111 001 0 0 . optype:2 .... .... 1100 . 1 . 0 .... \ diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 7097c18f334..7db6b856598 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -924,3 +924,74 @@ DO_3SAME_32_ENV(VQSHL_S, qshl_s) DO_3SAME_32_ENV(VQSHL_U, qshl_u) DO_3SAME_32_ENV(VQRSHL_S, qrshl_s) DO_3SAME_32_ENV(VQRSHL_U, qrshl_u) + +static bool do_3same_pair(DisasContext *s, arg_3same *a, NeonGenTwoOpFn *f= n) +{ + /* Operations handled pairwise 32 bits at a time */ + TCGv_i32 tmp, tmp2, tmp3; + + if (!arm_dc_feature(s, ARM_FEATURE_NEON)) { + return false; + } + + /* UNDEF accesses to D16-D31 if they don't exist. */ + if (!dc_isar_feature(aa32_simd_r32, s) && + ((a->vd | a->vn | a->vm) & 0x10)) { + return false; + } + + if (a->size =3D=3D 3) { + return false; + } + + if (!vfp_access_check(s)) { + return true; + } + + assert(a->q =3D=3D 0); /* enforced by decode patterns */ + + /* + * Note that we have to be careful not to clobber the source operands + * in the "vm =3D=3D vd" case by storing the result of the first pass = too + * early. Since Q is 0 there are always just two passes, so instead + * of a complicated loop over each pass we just unroll. + */ + tmp =3D neon_load_reg(a->vn, 0); + tmp2 =3D neon_load_reg(a->vn, 1); + fn(tmp, tmp, tmp2); + tcg_temp_free_i32(tmp2); + + tmp3 =3D neon_load_reg(a->vm, 0); + tmp2 =3D neon_load_reg(a->vm, 1); + fn(tmp3, tmp3, tmp2); + tcg_temp_free_i32(tmp2); + + neon_store_reg(a->vd, 0, tmp); + neon_store_reg(a->vd, 1, tmp3); + return true; +} + +#define DO_3SAME_PAIR(INSN, func) \ + static bool trans_##INSN##_3s(DisasContext *s, arg_3same *a) \ + { \ + static NeonGenTwoOpFn * const fns[] =3D { \ + gen_helper_neon_##func##8, \ + gen_helper_neon_##func##16, \ + gen_helper_neon_##func##32, \ + }; \ + if (a->size > 2) { \ + return false; \ + } \ + return do_3same_pair(s, a, fns[a->size]); \ + } + +/* 32-bit pairwise ops end up the same as the elementwise versions. */ +#define gen_helper_neon_pmax_s32 tcg_gen_smax_i32 +#define gen_helper_neon_pmax_u32 tcg_gen_umax_i32 +#define gen_helper_neon_pmin_s32 tcg_gen_smin_i32 +#define gen_helper_neon_pmin_u32 tcg_gen_umin_i32 + +DO_3SAME_PAIR(VPMAX_S, pmax_s) +DO_3SAME_PAIR(VPMIN_S, pmin_s) +DO_3SAME_PAIR(VPMAX_U, pmax_u) +DO_3SAME_PAIR(VPMIN_U, pmin_u) diff --git a/target/arm/translate.c b/target/arm/translate.c index 3aabb18720b..82be4d40282 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -3011,12 +3011,6 @@ static inline void gen_neon_rsb(int size, TCGv_i32 t= 0, TCGv_i32 t1) } } =20 -/* 32-bit pairwise ops end up the same as the elementwise versions. */ -#define gen_helper_neon_pmax_s32 tcg_gen_smax_i32 -#define gen_helper_neon_pmax_u32 tcg_gen_umax_i32 -#define gen_helper_neon_pmin_s32 tcg_gen_smin_i32 -#define gen_helper_neon_pmin_u32 tcg_gen_umin_i32 - #define GEN_NEON_INTEGER_OP_ENV(name) do { \ switch ((size << 1) | u) { \ case 0: \ @@ -5442,6 +5436,8 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) case NEON_3R_VQSHL: case NEON_3R_VRSHL: case NEON_3R_VQRSHL: + case NEON_3R_VPMAX: + case NEON_3R_VPMIN: /* Already handled by decodetree */ return 1; } @@ -5453,8 +5449,6 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) pairwise =3D 0; switch (op) { case NEON_3R_VPADD_VQRDMLAH: - case NEON_3R_VPMAX: - case NEON_3R_VPMIN: pairwise =3D 1; break; case NEON_3R_FLOAT_ARITH: @@ -5511,13 +5505,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) tmp2 =3D neon_load_reg(rm, pass); } switch (op) { - break; - case NEON_3R_VPMAX: - GEN_NEON_INTEGER_OP(pmax); - break; - case NEON_3R_VPMIN: - GEN_NEON_INTEGER_OP(pmin); - break; case NEON_3R_VQDMULH_VQRDMULH: /* Multiply high. */ if (!u) { /* VQDMULH */ switch (size) { --=20 2.20.1 From nobody Sat May 18 08:46:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589302181; cv=none; d=zohomail.com; s=zohoarc; b=YiUqN4tkXimiHu4jzMoeTKe2tdJ96Mj1iCxQbYEK5PaXPSFueniaWZOGhih3aFKvsBt2ER1edb9eW4dE9Z2JjmbRokaMtqFzM0ikEet5RbLM/JaGl/r1Z0hhbd4/tDtxhpH14cy0fiEc4/CUQ813vt3MRScVsxFTO+RKmiZxuXM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589302181; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=kVCumtOJ/X5yIQDESAlRm3BAiW9FGll9wJVdRpfR4eg=; b=CY2AFGhdRfOxux9G4p/xwZjDfT5AQreA4KpjW+FYZ3wsAhyFWW5POZmS/5HM5zo+wEwezztDKj8gAbeJVhtoiFx0zs1nn5rlMEZbqcqqmI/WMHMX/CPbXpIrVBK24rnakhnEuMQdJK+7fysxFQHmSaPylWqlcuzq8pw3dEdLwsU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589302181770896.6947420580286; Tue, 12 May 2020 09:49:41 -0700 (PDT) Received: from localhost ([::1]:35630 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jYY68-0002ed-9Q for importer@patchew.org; Tue, 12 May 2020 12:49:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50638) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jYXwA-0006a5-HD for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:22 -0400 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]:41548) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jYXw9-00069D-GG for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:22 -0400 Received: by mail-wr1-x441.google.com with SMTP id h17so7408455wrc.8 for ; Tue, 12 May 2020 09:39:21 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id o205sm18525981wmo.32.2020.05.12.09.39.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 09:39:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kVCumtOJ/X5yIQDESAlRm3BAiW9FGll9wJVdRpfR4eg=; b=gYvfBvPUqHBPhvMm8rtMFXRdY9/euVj2Qr7pAEtIoYhvZ9YzMqVspNBzq+chcYPJ0i 1UHS8MT6mL18s99a+MLzuoxY1PZ1gEbBY1cVaYqe0N7uNg9yQihx2i7KRhH557Up7tmk NZrBcI4kxdSOMJU6wELUj3mPLi6KrtbXjqmVTryaHuLwUmdVbKy1QNOpSFTbsOE7Ruq4 JYIcV2FV8Yw6orA/uH4AOcsz2O3oRVSeUa/dBg5PkHbYNYLXHHQzBGT7vRe7VsJkXbob JRoNFF2zQHUr18zfoVe/9kphILGfpEVfLYfcwzE4Qp3evSK9npU0leSfqeVqYWLaytaZ V/vQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kVCumtOJ/X5yIQDESAlRm3BAiW9FGll9wJVdRpfR4eg=; b=seCuSVcMTJZ8bQnqTvgx6/jLyg8lHsShx919qm6Q4XRunURhhvuQtW/y0w6cxaEDEr 1EIGSaEAsAA83BMiNSyb22ANZJlAVv9xCkZXqu1xNXsibJs8NFUXKxVdA4RAH9mkw9rK kIHNW7mpHztTFa51dECYMJcEFrwoXsFuRUy8zQOhiT13ZuUAHAJGGJB8Zb8B3BsSnrKA HKb5y4S+rjWOm63o3qgb6kIK//2pEm8JUz4+7NELabJD4Ebb37NB4RP1VZ60t1zTsZL2 uSVXuIlsE3505Nx51sGP1I0pTfwu3mn9O/mVSAcGvUKM7bRHCu0SbQCbDkQvkyCj9kNj cfPg== X-Gm-Message-State: AGi0PuZqOjBzgLPA7Wj3HIsyA/Z0+Y+za+4h7RuMqWnFGguBB0YYkgDl zEXbzvdQ2Ddim97BHfewqQ1rxg== X-Google-Smtp-Source: APiQypJnPILQhW+0u5CqwEUdd0VbL6ObH8xheA0Q8h+LuOey+hSt0cF7pBkByavux5e8PPcXuChLYw== X-Received: by 2002:adf:f7d2:: with SMTP id a18mr25614588wrq.169.1589301560203; Tue, 12 May 2020 09:39:20 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 09/17] target/arm: Convert Neon VPADD 3-reg-same insns to decodetree Date: Tue, 12 May 2020 17:38:56 +0100 Message-Id: <20200512163904.10918-10-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200512163904.10918-1-peter.maydell@linaro.org> References: <20200512163904.10918-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::441; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x441.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon integer VPADD 3-reg-same insns to decodetree. These are 'pairwise' operations. (Note that VQRDMLAH, which shares the same primary opcode but has U=3D1, has already been converted.) Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/neon-dp.decode | 2 ++ target/arm/translate-neon.inc.c | 2 ++ target/arm/translate.c | 19 +------------------ 3 files changed, 5 insertions(+), 18 deletions(-) diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index 03f39a0b44b..9bbb2dd77e0 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -153,6 +153,8 @@ VPMAX_U_3s 1111 001 1 0 . .. .... .... 1010 . . .= 0 .... @3same_q0 VPMIN_S_3s 1111 001 0 0 . .. .... .... 1010 . . . 1 .... @3same_q0 VPMIN_U_3s 1111 001 1 0 . .. .... .... 1010 . . . 1 .... @3same_q0 =20 +VPADD_3s 1111 001 0 0 . .. .... .... 1011 . . . 1 .... @3same_q0 + VQRDMLAH_3s 1111 001 1 0 . .. .... .... 1011 ... 1 .... @3same =20 SHA1_3s 1111 001 0 0 . optype:2 .... .... 1100 . 1 . 0 .... \ diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 7db6b856598..e0137364075 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -990,8 +990,10 @@ static bool do_3same_pair(DisasContext *s, arg_3same *= a, NeonGenTwoOpFn *fn) #define gen_helper_neon_pmax_u32 tcg_gen_umax_i32 #define gen_helper_neon_pmin_s32 tcg_gen_smin_i32 #define gen_helper_neon_pmin_u32 tcg_gen_umin_i32 +#define gen_helper_neon_padd_u32 tcg_gen_add_i32 =20 DO_3SAME_PAIR(VPMAX_S, pmax_s) DO_3SAME_PAIR(VPMIN_S, pmin_s) DO_3SAME_PAIR(VPMAX_U, pmax_u) DO_3SAME_PAIR(VPMIN_U, pmin_u) +DO_3SAME_PAIR(VPADD, padd_u) diff --git a/target/arm/translate.c b/target/arm/translate.c index 82be4d40282..ce30417014d 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -5397,13 +5397,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) return 1; } switch (op) { - case NEON_3R_VPADD_VQRDMLAH: - if (!u) { - break; /* VPADD */ - } - /* VQRDMLAH : handled by decodetree */ - return 1; - case NEON_3R_VFM_VQRDMLSH: if (!u) { /* VFM, VFMS */ @@ -5438,6 +5431,7 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) case NEON_3R_VQRSHL: case NEON_3R_VPMAX: case NEON_3R_VPMIN: + case NEON_3R_VPADD_VQRDMLAH: /* Already handled by decodetree */ return 1; } @@ -5448,9 +5442,6 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) } pairwise =3D 0; switch (op) { - case NEON_3R_VPADD_VQRDMLAH: - pairwise =3D 1; - break; case NEON_3R_FLOAT_ARITH: pairwise =3D (u && size < 2); /* if VPADD (float) */ break; @@ -5528,14 +5519,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) } } break; - case NEON_3R_VPADD_VQRDMLAH: - switch (size) { - case 0: gen_helper_neon_padd_u8(tmp, tmp, tmp2); break; - case 1: gen_helper_neon_padd_u16(tmp, tmp, tmp2); break; - case 2: tcg_gen_add_i32(tmp, tmp, tmp2); break; - default: abort(); - } - break; case NEON_3R_FLOAT_ARITH: /* Floating point arithmetic. */ { TCGv_ptr fpstatus =3D get_fpstatus_ptr(1); --=20 2.20.1 From nobody Sat May 18 08:46:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589301695; cv=none; d=zohomail.com; s=zohoarc; b=A8D2wU/XQ4qVEphefebX0OVHRw91n2VunNhcy9SeCf+www76o5UtgK/8KEhHeWLk4dBINfFf37EE1fgVmiOEGsQ7pW+OcA/hYzFRFUhytEHOeGJKzTstnlR8RNuCTapeYDQTwclBCfLIf6BCx9muEHp3G/SOgLi3KTs4fjVLnQY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589301695; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=LFie1FH/ju2YqNiDPeao+ABy38l5WYz9XJznVyORJzE=; b=WpyyR+oNunGeJdQX5ymYAKwc+YqY+FiBh9wpGlHFk5vfdA2AHLNecH0CreiwlLjuaxt6HWZJODYs3pMFmKqGy1YUK0RCHBBO+1v2W2vjTZkHRMia7V+mpQiWrdJlBNSAzgfBkY3SNR5nwYVpsrBJWG7LJLZdlz6Fxht2nYwYDXI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589301695352414.797237276969; Tue, 12 May 2020 09:41:35 -0700 (PDT) Received: from localhost ([::1]:42342 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jYXyH-0000sj-QY for importer@patchew.org; Tue, 12 May 2020 12:41:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50650) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jYXwB-0006d9-N6 for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:23 -0400 Received: from mail-wr1-x442.google.com ([2a00:1450:4864:20::442]:40655) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jYXwA-0006Be-My for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:23 -0400 Received: by mail-wr1-x442.google.com with SMTP id e16so16301962wra.7 for ; Tue, 12 May 2020 09:39:22 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id o205sm18525981wmo.32.2020.05.12.09.39.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 09:39:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LFie1FH/ju2YqNiDPeao+ABy38l5WYz9XJznVyORJzE=; b=KPYHlz8ul+lAQJ6bJDuLcalj9jDMSZ+4OzGpnGamenY7PToERdYP7YWNgAfOgmBEtL QoUq//MjRJKwRK2oDEp5t4cdeXuMzt+Ka+l30yKZZB9c1aOwq+GaFfqZfRZfuJ7FSQe/ Tkn0KZWZ1yJBAHpsM8GyJNklAKYG4TS4GaGDgAcHyBxBIKkWe7wMV4WhXAQwlEz6LwHj S4kTTp2ekzCzWVI6g3FWcSz3IxEMQyLECdXUq6gLQJY9gQJuRqRYDo1G48oBr9ODWvTp EB4Ulxi9B5HSbzgEe6RiGvx1MA5YA8cOdxQXRyKE2EwWU3BMz1DySDiK44b/9B/5dUbW BC9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LFie1FH/ju2YqNiDPeao+ABy38l5WYz9XJznVyORJzE=; b=DnQD+f/DRyxG6uBbsG40fYV1JTO9h4xL3CFukl4C8qsoSFjdIMYFFtpIz430UKrh9H 88BoYQn6+cgyEZrYXHl7zHz00WE502IIb8/VUUXj3vC1pmEoTFKt//0WzYS+eebQeMBX pRcB3ORNFy66CtzzQdSOI7uNVfR8ehe9t1/etzyXh+4Y0XGeB6CsEZHPS8k44WN/5BEA s0BaK41i4CJH8ZHMMeUmCHxUc3IvI/tLBd0Ql9pwjFrzsBhJVsuoE8C/v4PnRTm9xnHV QlGxifSohbFzypXmkLSZzsec+CzTG0pyxF5BGeVxrF1rG3rKMgqn7EfGTqNnI///LaLv /LHQ== X-Gm-Message-State: AOAM532g81LTmeMiBJpSIrT58x293up8WTgHVdTfdua3sDXqZC26/hb8 SP3Su5er41vPyrs3dmY4yglrTnoFa943Ew== X-Google-Smtp-Source: ABdhPJxV7XZG4mizTPpVXLy/PcbXqR1/DK+IgiFaaiTugS1BMxNRIeXdhYP/OKme0e/wAdblt8lN5g== X-Received: by 2002:a5d:4447:: with SMTP id x7mr1442653wrr.424.1589301561462; Tue, 12 May 2020 09:39:21 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 10/17] target/arm: Convert Neon VQDMULH/VQRDMULH 3-reg-same to decodetree Date: Tue, 12 May 2020 17:38:57 +0100 Message-Id: <20200512163904.10918-11-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200512163904.10918-1-peter.maydell@linaro.org> References: <20200512163904.10918-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::442; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x442.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon VQDMULH and VQRDMULH 3-reg-same insns to decodetree. These are the last integer operations in the 3-reg-same group. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/neon-dp.decode | 3 +++ target/arm/translate-neon.inc.c | 24 ++++++++++++++++++++++++ target/arm/translate.c | 24 +----------------------- 3 files changed, 28 insertions(+), 23 deletions(-) diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index 9bbb2dd77e0..28e8333335d 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -153,6 +153,9 @@ VPMAX_U_3s 1111 001 1 0 . .. .... .... 1010 . . .= 0 .... @3same_q0 VPMIN_S_3s 1111 001 0 0 . .. .... .... 1010 . . . 1 .... @3same_q0 VPMIN_U_3s 1111 001 1 0 . .. .... .... 1010 . . . 1 .... @3same_q0 =20 +VQDMULH_3s 1111 001 0 0 . .. .... .... 1011 . . . 0 .... @3same +VQRDMULH_3s 1111 001 1 0 . .. .... .... 1011 . . . 0 .... @3same + VPADD_3s 1111 001 0 0 . .. .... .... 1011 . . . 1 .... @3same_q0 =20 VQRDMLAH_3s 1111 001 1 0 . .. .... .... 1011 ... 1 .... @3same diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index e0137364075..f52302f42b1 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -997,3 +997,27 @@ DO_3SAME_PAIR(VPMIN_S, pmin_s) DO_3SAME_PAIR(VPMAX_U, pmax_u) DO_3SAME_PAIR(VPMIN_U, pmin_u) DO_3SAME_PAIR(VPADD, padd_u) + +#define DO_3SAME_VQDMULH(INSN, FUNC) \ + WRAP_ENV_FN(gen_##INSN##_tramp16, gen_helper_neon_##FUNC##_s16); \ + WRAP_ENV_FN(gen_##INSN##_tramp32, gen_helper_neon_##FUNC##_s32); \ + static void gen_##INSN##_3s(unsigned vece, uint32_t rd_ofs, \ + uint32_t rn_ofs, uint32_t rm_ofs, \ + uint32_t oprsz, uint32_t maxsz) \ + { \ + static const GVecGen3 ops[2] =3D { \ + { .fni4 =3D gen_##INSN##_tramp16 }, \ + { .fni4 =3D gen_##INSN##_tramp32 }, \ + }; \ + tcg_gen_gvec_3(rd_ofs, rn_ofs, rm_ofs, oprsz, maxsz, &ops[vece - 1= ]); \ + } \ + static bool trans_##INSN##_3s(DisasContext *s, arg_3same *a) \ + { \ + if (a->size !=3D 1 && a->size !=3D 2) { = \ + return false; \ + } \ + return do_3same(s, a, gen_##INSN##_3s); \ + } + +DO_3SAME_VQDMULH(VQDMULH, qdmulh) +DO_3SAME_VQDMULH(VQRDMULH, qrdmulh) diff --git a/target/arm/translate.c b/target/arm/translate.c index ce30417014d..561cb67286d 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -5432,6 +5432,7 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) case NEON_3R_VPMAX: case NEON_3R_VPMIN: case NEON_3R_VPADD_VQRDMLAH: + case NEON_3R_VQDMULH_VQRDMULH: /* Already handled by decodetree */ return 1; } @@ -5496,29 +5497,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) tmp2 =3D neon_load_reg(rm, pass); } switch (op) { - case NEON_3R_VQDMULH_VQRDMULH: /* Multiply high. */ - if (!u) { /* VQDMULH */ - switch (size) { - case 1: - gen_helper_neon_qdmulh_s16(tmp, cpu_env, tmp, tmp2); - break; - case 2: - gen_helper_neon_qdmulh_s32(tmp, cpu_env, tmp, tmp2); - break; - default: abort(); - } - } else { /* VQRDMULH */ - switch (size) { - case 1: - gen_helper_neon_qrdmulh_s16(tmp, cpu_env, tmp, tmp2); - break; - case 2: - gen_helper_neon_qrdmulh_s32(tmp, cpu_env, tmp, tmp2); - break; - default: abort(); - } - } - break; case NEON_3R_FLOAT_ARITH: /* Floating point arithmetic. */ { TCGv_ptr fpstatus =3D get_fpstatus_ptr(1); --=20 2.20.1 From nobody Sat May 18 08:46:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589302377; cv=none; d=zohomail.com; s=zohoarc; b=h232DGcoxFxtbl9eagQzvlWz7eaoHt9aKzX/bwy7OBSBDwFH6/bCfeifn+2bpLewNtOSIi/jqyrghsg760p3ZWa33SVINx4hzRGk4D3iRUWx33fAAejdPry0HM1msVt4aT6S63fUzIKB2rC/h5uD9/2KlbE01F3xFCQYjCCNkCk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589302377; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=F+yaFxIvTHCyrF2KyV7XGJ2IoIrQubqAcfuXHKLVgu4=; b=JIK1wOzaoojgKurQT47Y1XBDCDP/TQr8jiYnIuXkaPNSSz4kroONm50sHapSfxiYLC3NmSQt5DOuGhPJhiN0muFUB5sIkVBxlyCUSlzx0lUlDX5zFREPzC6Galb1d+t92s2T/TNG8Qhem6ZWVhEc4otUuYZFctKe+KkrG3aOt18= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589302377564738.6013510236216; Tue, 12 May 2020 09:52:57 -0700 (PDT) Received: from localhost ([::1]:43966 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jYY9G-0006Uo-F5 for importer@patchew.org; Tue, 12 May 2020 12:52:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50664) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jYXwD-0006gq-6Y for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:25 -0400 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]:34151) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jYXwB-0006Cr-V7 for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:24 -0400 Received: by mail-wr1-x441.google.com with SMTP id y3so16301362wrt.1 for ; Tue, 12 May 2020 09:39:23 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id o205sm18525981wmo.32.2020.05.12.09.39.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 09:39:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=F+yaFxIvTHCyrF2KyV7XGJ2IoIrQubqAcfuXHKLVgu4=; b=f3YwogxOCRlm2Vx1uuxyhA+lbQkwYgZ7t5hxk+aM5fOxgYoNxxvtINBDpTpUnqdeUQ JBDaNzLAwN4l1kHzRm9poI6+AWy7DJtzxFLDVXAUJRZL+BeMEstZxhUQ6oZHJ4odbQZf DdXja3SX7TwX8em3QwXJ8TKmkmc0lnNRPS49vEJ64vdAMkg0XozhJuGVFUp7FF3DCSKW HXygzgGIgtT06Tdek9nNiwlPmpUZD3njmoRODpKNdNYqfSMADSpGU9x+bBTSeukWpoDe Hjt4P3QBarTevUQGxdHJ+cbmu7QaBERHb7ecnk/cS9hXCkZEiM6rXNDn7TKXI/j0sqSv CAAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=F+yaFxIvTHCyrF2KyV7XGJ2IoIrQubqAcfuXHKLVgu4=; b=ANsPxqpbDI8fSAamL5/fJUpQQX9qggw2tkY/BY6tSM+UHSCmCZoOv8nAzcfTXtlLTR Rj8aO6/A//S+nssDPvhCX9kdz8mEjoqXU9QK5xDfDWIwDZLfjpzcf/9da7gQLuDhcMr9 1yF05IVECRmLC63y8zNILgJKP1oG2NoFNgUybjUifctMCqQUClkIyvTN59vSWib3OFYL SKQRpFksUUNBuvoAPIsF8aod1HbAEgLfEqaRzgVO9GQS8rwk9VdThJeuWQphvToXsB0M +xtgrWC3vOky0erQy0MMwVBtybu13WEoNPk+TTbJrJY3407d/E8fZF9itGHojzV3/gCv IaUQ== X-Gm-Message-State: AGi0PuZLOVhHPUi8iX86Xk0i2diBUPHjLFD78S6G+eM/FMD0XgT3cGa5 xgV3zuyC1qPhDZUuYVN6s0VE0Q== X-Google-Smtp-Source: APiQypJDGXqX44uHzXbxgHVjQaiC1d+InDzkKjF1C/501GbZ2KWh2baCn3BKES5/PTT3VnsA5odlVg== X-Received: by 2002:a5d:6284:: with SMTP id k4mr27254620wru.40.1589301562624; Tue, 12 May 2020 09:39:22 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 11/17] target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to decodetree Date: Tue, 12 May 2020 17:38:58 +0100 Message-Id: <20200512163904.10918-12-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200512163904.10918-1-peter.maydell@linaro.org> References: <20200512163904.10918-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::441; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x441.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon VADD, VSUB, VABD 3-reg-same insns to decodetree. We already have gvec helpers for addition and subtraction, but must add one for fabd. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/helper.h | 3 ++- target/arm/neon-dp.decode | 8 ++++++++ target/arm/neon_helper.c | 7 ------- target/arm/translate-neon.inc.c | 28 ++++++++++++++++++++++++++++ target/arm/translate.c | 10 +++------- target/arm/vec_helper.c | 7 +++++++ 6 files changed, 48 insertions(+), 15 deletions(-) diff --git a/target/arm/helper.h b/target/arm/helper.h index 1857f4ee46a..6e9629c87b0 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -396,7 +396,6 @@ DEF_HELPER_FLAGS_2(neon_qneg_s16, TCG_CALL_NO_RWG, i32,= env, i32) DEF_HELPER_FLAGS_2(neon_qneg_s32, TCG_CALL_NO_RWG, i32, env, i32) DEF_HELPER_FLAGS_2(neon_qneg_s64, TCG_CALL_NO_RWG, i64, env, i64) =20 -DEF_HELPER_3(neon_abd_f32, i32, i32, i32, ptr) DEF_HELPER_3(neon_ceq_f32, i32, i32, i32, ptr) DEF_HELPER_3(neon_cge_f32, i32, i32, i32, ptr) DEF_HELPER_3(neon_cgt_f32, i32, i32, i32, ptr) @@ -595,6 +594,8 @@ DEF_HELPER_FLAGS_5(gvec_fmul_h, TCG_CALL_NO_RWG, void, = ptr, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_5(gvec_fmul_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr,= i32) DEF_HELPER_FLAGS_5(gvec_fmul_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr,= i32) =20 +DEF_HELPER_FLAGS_5(gvec_fabd_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr,= i32) + DEF_HELPER_FLAGS_5(gvec_ftsmul_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_5(gvec_ftsmul_s, TCG_CALL_NO_RWG, diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index 28e8333335d..06fb8b96aad 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -45,6 +45,10 @@ @3same_q0 .... ... . . . size:2 .... .... .... . 0 . . .... \ &3same vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp q=3D0 =20 +# For FP insns the high bit of 'size' is used as part of opcode decode +@3same_fp .... ... . . . . size:1 .... .... .... . q:1 . . .... \ + &3same vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp + VHADD_S_3s 1111 001 0 0 . .. .... .... 0000 . . . 0 .... @3same VHADD_U_3s 1111 001 1 0 . .. .... .... 0000 . . . 0 .... @3same VQADD_S_3s 1111 001 0 0 . .. .... .... 0000 . . . 1 .... @3same @@ -170,3 +174,7 @@ SHA256SU1_3s 1111 001 1 0 . 10 .... .... 1100 . 1 .= 0 .... \ vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp =20 VQRDMLSH_3s 1111 001 1 0 . .. .... .... 1100 ... 1 .... @3same + +VADD_fp_3s 1111 001 0 0 . 0 . .... .... 1101 ... 0 .... @3same_fp +VSUB_fp_3s 1111 001 0 0 . 1 . .... .... 1101 ... 0 .... @3same_fp +VABD_fp_3s 1111 001 1 0 . 1 . .... .... 1101 ... 0 .... @3same_fp diff --git a/target/arm/neon_helper.c b/target/arm/neon_helper.c index 2ef75e04c83..b637265691a 100644 --- a/target/arm/neon_helper.c +++ b/target/arm/neon_helper.c @@ -1825,13 +1825,6 @@ uint64_t HELPER(neon_qneg_s64)(CPUARMState *env, uin= t64_t x) } =20 /* NEON Float helpers. */ -uint32_t HELPER(neon_abd_f32)(uint32_t a, uint32_t b, void *fpstp) -{ - float_status *fpst =3D fpstp; - float32 f0 =3D make_float32(a); - float32 f1 =3D make_float32(b); - return float32_val(float32_abs(float32_sub(f0, f1, fpst))); -} =20 /* Floating point comparisons produce an integer result. * Note that EQ doesn't signal InvalidOp for QNaNs but GE and GT do. diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index f52302f42b1..540720f5e0d 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -1021,3 +1021,31 @@ DO_3SAME_PAIR(VPADD, padd_u) =20 DO_3SAME_VQDMULH(VQDMULH, qdmulh) DO_3SAME_VQDMULH(VQRDMULH, qrdmulh) + +/* + * For all the functions using this macro, size =3D=3D 1 means fp16, + * which is an architecture extension we don't implement yet. + */ +#define DO_3S_FP_GVEC(INSN,FUNC) \ + static void gen_##INSN##_3s(unsigned vece, uint32_t rd_ofs, \ + uint32_t rn_ofs, uint32_t rm_ofs, \ + uint32_t oprsz, uint32_t maxsz) \ + { \ + TCGv_ptr fpst =3D get_fpstatus_ptr(1); \ + tcg_gen_gvec_3_ptr(rd_ofs, rn_ofs, rm_ofs, fpst, \ + oprsz, maxsz, 0, FUNC); \ + tcg_temp_free_ptr(fpst); \ + } \ + static bool trans_##INSN##_fp_3s(DisasContext *s, arg_3same *a) \ + { \ + if (a->size !=3D 0) { \ + /* TODO fp16 support */ \ + return false; \ + } \ + return do_3same(s, a, gen_##INSN##_3s); \ + } + + +DO_3S_FP_GVEC(VADD, gen_helper_gvec_fadd_s) +DO_3S_FP_GVEC(VSUB, gen_helper_gvec_fsub_s) +DO_3S_FP_GVEC(VABD, gen_helper_gvec_fabd_s) diff --git a/target/arm/translate.c b/target/arm/translate.c index 561cb67286d..8a94856cd28 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -5445,6 +5445,9 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) switch (op) { case NEON_3R_FLOAT_ARITH: pairwise =3D (u && size < 2); /* if VPADD (float) */ + if (!pairwise) { + return 1; /* handled by decodetree */ + } break; case NEON_3R_FLOAT_MINMAX: pairwise =3D u; /* if VPMIN/VPMAX (float) */ @@ -5501,16 +5504,9 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) { TCGv_ptr fpstatus =3D get_fpstatus_ptr(1); switch ((u << 2) | size) { - case 0: /* VADD */ case 4: /* VPADD */ gen_helper_vfp_adds(tmp, tmp, tmp2, fpstatus); break; - case 2: /* VSUB */ - gen_helper_vfp_subs(tmp, tmp, tmp2, fpstatus); - break; - case 6: /* VABD */ - gen_helper_neon_abd_f32(tmp, tmp, tmp2, fpstatus); - break; default: abort(); } diff --git a/target/arm/vec_helper.c b/target/arm/vec_helper.c index fa33df859e5..50a499299fd 100644 --- a/target/arm/vec_helper.c +++ b/target/arm/vec_helper.c @@ -691,6 +691,11 @@ static float64 float64_ftsmul(float64 op1, uint64_t op= 2, float_status *stat) return result; } =20 +static float32 float32_abd(float32 op1, float32 op2, float_status *stat) +{ + return float32_abs(float32_sub(op1, op2, stat)); +} + #define DO_3OP(NAME, FUNC, TYPE) \ void HELPER(NAME)(void *vd, void *vn, void *vm, void *stat, uint32_t desc)= \ { = \ @@ -718,6 +723,8 @@ DO_3OP(gvec_ftsmul_h, float16_ftsmul, float16) DO_3OP(gvec_ftsmul_s, float32_ftsmul, float32) DO_3OP(gvec_ftsmul_d, float64_ftsmul, float64) =20 +DO_3OP(gvec_fabd_s, float32_abd, float32) + #ifdef TARGET_AARCH64 =20 DO_3OP(gvec_recps_h, helper_recpsf_f16, float16) --=20 2.20.1 From nobody Sat May 18 08:46:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589302013; cv=none; d=zohomail.com; s=zohoarc; b=k6JLegRpRke9E40D2NwugcTBv+jvjyHDLh2Np4ej7HA1Ic+Y0GIFKj9NltdRD7MAOn1BHOE2VCzK44S9Nu8JKTz66dzD5E0UOsoGmJcgaOl2sRxzQbG4DE14SD8fBjWlIg4XznrN0bYxuQ0JXkWeibcH8scE4McAvQ0wAjIyqxs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589302013; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Dz9iHVssEtWGnM5ibB3PaM3aTlxRZRePy2DU6crML64=; b=AKKc5+HRZ+h5QMYG1hiJ3Q1VN1bUaw+Fm8JCy6tWP+DM+bapWUPmcWVKf97wovwIJC4FXJ/uBTQhsIQyikof/rj3Y3ljFConvx9NnvBv63gjv0ekXPEOBwJJbc8Ep4pG3ABwskGLeYpvPloOk2vf6dk8+PApUfhuUoJ3mlWs5zI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589302013825790.7613118709518; Tue, 12 May 2020 09:46:53 -0700 (PDT) Received: from localhost ([::1]:57732 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jYY3Q-0007yx-D8 for importer@patchew.org; Tue, 12 May 2020 12:46:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50686) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jYXwE-0006k3-Lp for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:26 -0400 Received: from mail-wm1-x344.google.com ([2a00:1450:4864:20::344]:37209) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jYXwD-0006EL-Cj for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:26 -0400 Received: by mail-wm1-x344.google.com with SMTP id z72so14581591wmc.2 for ; Tue, 12 May 2020 09:39:24 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id o205sm18525981wmo.32.2020.05.12.09.39.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 09:39:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Dz9iHVssEtWGnM5ibB3PaM3aTlxRZRePy2DU6crML64=; b=c1OXHr2+FyFy+lYBjk0f9qLhygsuI9bo91lw2hMyGPWFiQVXMEotNkrfK2zwEkZc6T AtvE0UYmSZYKqIvCj2Mn61lBHdWSLJPto0BwwYl+YwhMV+kw5/HmjsqhNdliwf8lJ0oj JuSXxOVIArw1rwltQf+t+dr2qghHB0u3O7rWjafOvf+dW0a5s4+XXtTTNpsr7JsVHhe3 m5b2HRBmuNV+eTakseEG9BYsrsVL5ras9JBFSHMx63jpwL0eBWZG9m3b3KYDtIAqDY8P qjoVPTP71NKKStQDewKNALBRUXgEISfCNPJuQUdZ9EXogQJNa4XhwQ0NlQsovvlt3KAT BS9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Dz9iHVssEtWGnM5ibB3PaM3aTlxRZRePy2DU6crML64=; b=fk2TO43TmcGPuX9rr4Lss8LWvDI6yRoCG1siWq/T36LW3nTkUZso2EYwnt6yIQZCoc yq8VU3frg+87g2Lg1d/PSqgl9Vr6PTNKMEloujzDHNZ8VXQqPljp/2FYtwQu5oi3Q3JA JQih+YEgYwDCsQWC704z1ApGO+jcB/ZiOu3JmGlm7z0/D+5LMzLDibn75dGz4LHv0sn2 Cp/xvKL4pcYIZOl1A+cMlpKpV0hM5R9fOkxwCJdEuMZtVvk9J18eOl/ogroMwA96lWax pLafi1kEguDoxjVSUokcuOp/8gxXtTgOAwC9rNPp6QQJgcHxqcSBnWoXpUOJ+SGtDkGo +nRQ== X-Gm-Message-State: AGi0PuZncNaqH9XUjByrAZpmsiSKis4GCyCrFEcKPB0ugploQOvrSsZB O3mQ/Kl/wiAShXGqH47wq/4YQQ== X-Google-Smtp-Source: APiQypIaIUwOXEWs50yRc89VRnmIy0T7Kr99vJoceNFw/9NK4oPFDsdG/zLH/7Sui1ZuIgdmKSVPBQ== X-Received: by 2002:a7b:c959:: with SMTP id i25mr18843475wml.84.1589301563849; Tue, 12 May 2020 09:39:23 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 12/17] target/arm: Convert Neon VPMIN/VPMAX/VPADD float 3-reg-same insns to decodetree Date: Tue, 12 May 2020 17:38:59 +0100 Message-Id: <20200512163904.10918-13-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200512163904.10918-1-peter.maydell@linaro.org> References: <20200512163904.10918-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::344; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x344.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon float VPMIN, VPMAX and VPADD 3-reg-same insns to decodetree. These are the only remaining 'pairwise' operations, so we can delete the pairwise-specific bits of the old decoder's for-each-element loop now. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/neon-dp.decode | 5 +++ target/arm/translate-neon.inc.c | 63 +++++++++++++++++++++++++++++++++ target/arm/translate.c | 63 +++++---------------------------- 3 files changed, 76 insertions(+), 55 deletions(-) diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index 06fb8b96aad..1f289750dcd 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -48,6 +48,8 @@ # For FP insns the high bit of 'size' is used as part of opcode decode @3same_fp .... ... . . . . size:1 .... .... .... . q:1 . . .... \ &3same vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp +@3same_fp_q0 .... ... . . . . size:1 .... .... .... . 0 . . .... \ + &3same vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp q=3D0 =20 VHADD_S_3s 1111 001 0 0 . .. .... .... 0000 . . . 0 .... @3same VHADD_U_3s 1111 001 1 0 . .. .... .... 0000 . . . 0 .... @3same @@ -177,4 +179,7 @@ VQRDMLSH_3s 1111 001 1 0 . .. .... .... 1100 ... 1= .... @3same =20 VADD_fp_3s 1111 001 0 0 . 0 . .... .... 1101 ... 0 .... @3same_fp VSUB_fp_3s 1111 001 0 0 . 1 . .... .... 1101 ... 0 .... @3same_fp +VPADD_fp_3s 1111 001 1 0 . 0 . .... .... 1101 ... 0 .... @3same_fp_q0 VABD_fp_3s 1111 001 1 0 . 1 . .... .... 1101 ... 0 .... @3same_fp +VPMAX_fp_3s 1111 001 1 0 . 0 . .... .... 1111 ... 0 .... @3same_fp_q0 +VPMIN_fp_3s 1111 001 1 0 . 1 . .... .... 1111 ... 0 .... @3same_fp_q0 diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 540720f5e0d..7bdf1e3fee8 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -1049,3 +1049,66 @@ DO_3SAME_VQDMULH(VQRDMULH, qrdmulh) DO_3S_FP_GVEC(VADD, gen_helper_gvec_fadd_s) DO_3S_FP_GVEC(VSUB, gen_helper_gvec_fsub_s) DO_3S_FP_GVEC(VABD, gen_helper_gvec_fabd_s) + +static bool do_3same_fp_pair(DisasContext *s, arg_3same *a, VFPGen3OpSPFn = *fn) +{ + /* FP operations handled pairwise 32 bits at a time */ + TCGv_i32 tmp, tmp2, tmp3; + TCGv_ptr fpstatus; + + if (!arm_dc_feature(s, ARM_FEATURE_NEON)) { + return false; + } + + /* UNDEF accesses to D16-D31 if they don't exist. */ + if (!dc_isar_feature(aa32_simd_r32, s) && + ((a->vd | a->vn | a->vm) & 0x10)) { + return false; + } + + if (!vfp_access_check(s)) { + return true; + } + + assert(a->q =3D=3D 0); /* enforced by decode patterns */ + + /* + * Note that we have to be careful not to clobber the source operands + * in the "vm =3D=3D vd" case by storing the result of the first pass = too + * early. Since Q is 0 there are always just two passes, so instead + * of a complicated loop over each pass we just unroll. + */ + fpstatus =3D get_fpstatus_ptr(1); + tmp =3D neon_load_reg(a->vn, 0); + tmp2 =3D neon_load_reg(a->vn, 1); + fn(tmp, tmp, tmp2, fpstatus); + tcg_temp_free_i32(tmp2); + + tmp3 =3D neon_load_reg(a->vm, 0); + tmp2 =3D neon_load_reg(a->vm, 1); + fn(tmp3, tmp3, tmp2, fpstatus); + tcg_temp_free_i32(tmp2); + tcg_temp_free_ptr(fpstatus); + + neon_store_reg(a->vd, 0, tmp); + neon_store_reg(a->vd, 1, tmp3); + return true; +} + +/* + * For all the functions using this macro, size =3D=3D 1 means fp16, + * which is an architecture extension we don't implement yet. + */ +#define DO_3S_FP_PAIR(INSN,FUNC) \ + static bool trans_##INSN##_fp_3s(DisasContext *s, arg_3same *a) \ + { \ + if (a->size !=3D 0) { \ + /* TODO fp16 support */ \ + return false; \ + } \ + return do_3same_fp_pair(s, a, FUNC); \ + } + +DO_3S_FP_PAIR(VPADD, gen_helper_vfp_adds) +DO_3S_FP_PAIR(VPMAX, gen_helper_vfp_maxs) +DO_3S_FP_PAIR(VPMIN, gen_helper_vfp_mins) diff --git a/target/arm/translate.c b/target/arm/translate.c index 8a94856cd28..ca6ed09ec34 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -5348,7 +5348,6 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) int shift; int pass; int count; - int pairwise; int u; int vec_size; uint32_t imm; @@ -5433,6 +5432,7 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) case NEON_3R_VPMIN: case NEON_3R_VPADD_VQRDMLAH: case NEON_3R_VQDMULH_VQRDMULH: + case NEON_3R_FLOAT_ARITH: /* Already handled by decodetree */ return 1; } @@ -5441,16 +5441,11 @@ static int disas_neon_data_insn(DisasContext *s, ui= nt32_t insn) /* 64-bit element instructions: handled by decodetree */ return 1; } - pairwise =3D 0; switch (op) { - case NEON_3R_FLOAT_ARITH: - pairwise =3D (u && size < 2); /* if VPADD (float) */ - if (!pairwise) { - return 1; /* handled by decodetree */ - } - break; case NEON_3R_FLOAT_MINMAX: - pairwise =3D u; /* if VPMIN/VPMAX (float) */ + if (u) { + return 1; /* VPMIN/VPMAX handled by decodetree */ + } break; case NEON_3R_FLOAT_CMP: if (!u && size) { @@ -5478,41 +5473,12 @@ static int disas_neon_data_insn(DisasContext *s, ui= nt32_t insn) break; } =20 - if (pairwise && q) { - /* All the pairwise insns UNDEF if Q is set */ - return 1; - } - for (pass =3D 0; pass < (q ? 4 : 2); pass++) { =20 - if (pairwise) { - /* Pairwise. */ - if (pass < 1) { - tmp =3D neon_load_reg(rn, 0); - tmp2 =3D neon_load_reg(rn, 1); - } else { - tmp =3D neon_load_reg(rm, 0); - tmp2 =3D neon_load_reg(rm, 1); - } - } else { - /* Elementwise. */ - tmp =3D neon_load_reg(rn, pass); - tmp2 =3D neon_load_reg(rm, pass); - } + /* Elementwise. */ + tmp =3D neon_load_reg(rn, pass); + tmp2 =3D neon_load_reg(rm, pass); switch (op) { - case NEON_3R_FLOAT_ARITH: /* Floating point arithmetic. */ - { - TCGv_ptr fpstatus =3D get_fpstatus_ptr(1); - switch ((u << 2) | size) { - case 4: /* VPADD */ - gen_helper_vfp_adds(tmp, tmp, tmp2, fpstatus); - break; - default: - abort(); - } - tcg_temp_free_ptr(fpstatus); - break; - } case NEON_3R_FLOAT_MULTIPLY: { TCGv_ptr fpstatus =3D get_fpstatus_ptr(1); @@ -5603,22 +5569,9 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) } tcg_temp_free_i32(tmp2); =20 - /* Save the result. For elementwise operations we can put it - straight into the destination register. For pairwise operations - we have to be careful to avoid clobbering the source operands. = */ - if (pairwise && rd =3D=3D rm) { - neon_store_scratch(pass, tmp); - } else { - neon_store_reg(rd, pass, tmp); - } + neon_store_reg(rd, pass, tmp); =20 } /* for pass */ - if (pairwise && rd =3D=3D rm) { - for (pass =3D 0; pass < (q ? 4 : 2); pass++) { - tmp =3D neon_load_scratch(pass); - neon_store_reg(rd, pass, tmp); - } - } /* End of 3 register same size operations. */ } else if (insn & (1 << 4)) { if ((insn & 0x00380080) !=3D 0) { --=20 2.20.1 From nobody Sat May 18 08:46:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589302192; cv=none; d=zohomail.com; s=zohoarc; b=aDRc7YZR6xFMVwVngpGMSBsSNiwFksu+ZgFlsd1ptNq2SOkAdzXSDt+jIk65nX9ZI6J2zfwcdYf0dw9kYjg31LuxrkdKnOSYcxoO0UDPuRc193oUD2EE548aFAgGeacWhli22anSigcOonBH+eOdbOCOFE7/mKxu0GthlytmoeA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589302192; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=1c0sA0VXCHDtNOClCYM5tpbz5xGR3LiI9SrLPs+uUSg=; b=RUIBiWy+/Aak/b/9PmkIqQ2CSQa5j9yy90cJ0eyo20BnJnYyY5tkYwQLMkg9JorSOhsnf+uud07ypgQ7Q7FNhkQRGvAr1RaeECY53SN0TmT1Hgq1GMP7yeXtzu5CYYp1fI1tXylux5UcUOW4D4C27qMW9OlAauIvikpqBMB8WL4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589302192305793.0049837740237; Tue, 12 May 2020 09:49:52 -0700 (PDT) Received: from localhost ([::1]:36340 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jYY6I-0002zV-VC for importer@patchew.org; Tue, 12 May 2020 12:49:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50706) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jYXwG-0006n7-4y for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:28 -0400 Received: from mail-wm1-x329.google.com ([2a00:1450:4864:20::329]:37016) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jYXwE-0006HH-KP for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:27 -0400 Received: by mail-wm1-x329.google.com with SMTP id z72so14581697wmc.2 for ; Tue, 12 May 2020 09:39:26 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id o205sm18525981wmo.32.2020.05.12.09.39.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 09:39:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1c0sA0VXCHDtNOClCYM5tpbz5xGR3LiI9SrLPs+uUSg=; b=H85ZFcM4wC8Nx3ytnFQ4rLCqrDo43ErNcpKuCE+SmKuNSHy4wNeqlruoMSw9wufrVZ lbEurnaLHpZCEmy1AWEs/t613po1I+RY4rcA7j+KBAKp90IFW6A6ekVY2agTI3wh/Kp/ ZIKo9yDw/FwYUdoltiRYwickGkqg0QVvvFypFQ9P/p0K12mzBnmiA2tSLYmcznoeozKj r1A5Wf6BfmKhJoeSIZ3uoBPN0tUlyzD2eV6G4hG/x/NyJaX7Hi0wUnYr+116H5FHXSIm l8Xg5YxvI6A1X+/MLe4QHSHOlVnpAEdy25HqkyGvV0FkkdD4eUQf0mSy+38otWFBxH8u tXpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1c0sA0VXCHDtNOClCYM5tpbz5xGR3LiI9SrLPs+uUSg=; b=ZhVgyuyg5+kUkSymvOr4HNmlb1XuBJv92SP673/IBcYplZvatjp95yyDFiptKGoaxE Xd/+2XzyN+hiMQFTVelMgm2q/Xk/6kruqHvxlMbKR4imABdJuCVTN1lTUQ2UjLzHrBvL 3CnahkkbJrx+uDFfTmyat7Zfg7beIpeMO6vy4UrETrbRcSYZSsi9bbB18TW9wSfUB4bP mcUg3y5m8P8POmXOoheLQiiSMIO+LzxAvSCLdBPUT3ePcRi6nbU8/WNq9YP4PzVK6Ue6 of5jIIjo472NM4F6YGWKZ++OLuybZ2+1tu3KzwEBv5ZCCglAdRwztvWqqmHNMz+uYmte aE0Q== X-Gm-Message-State: AGi0PuZz16T9z/T9COtfxUmLReqjb1400jtgKbBqawNjU1aXZDehfE1r Gp5+Nc6vTZsF75uGVejmR6U8eL0PfaQGGA== X-Google-Smtp-Source: APiQypLkXud+KEFktjTWJ6/AhoGbpTnA/492feSQC2AMiIQokmM9DD2/nszpNQnwd02rJCIkiOw+PA== X-Received: by 2002:a7b:caf2:: with SMTP id t18mr15665722wml.35.1589301565036; Tue, 12 May 2020 09:39:25 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 13/17] target/arm: Convert Neon fp VMUL, VMLA, VMLS 3-reg-same insns to decodetree Date: Tue, 12 May 2020 17:39:00 +0100 Message-Id: <20200512163904.10918-14-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200512163904.10918-1-peter.maydell@linaro.org> References: <20200512163904.10918-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x329.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon integer VMUL, VMLA, and VMLS 3-reg-same inssn to decodetree. We don't have a gvec helper for multiply-accumulate, so VMLA and VMLS need a loop function do_3same_fp(). This takes a reads_vd parameter to do_3same_fp() which tells it to load the old value into vd before calling the callback function, in the same way that the do_vfp_3op_sp() and do_vfp_3op_dp() functions in translate-vfp.inc.c work. (The only uses in this patch pass reads_vd =3D=3D true, but later commits will use reads_vd =3D=3D false.) This conversion fixes in passing an underdecoding for VMUL (originally reported by Fredrik Strupe ): bit 1 of the 'size' field must be 0. The old decoder didn't enforce this, but the decodetree pattern does. The gen_VMLA_fp_reg() function performs the addition operation with the operands in the opposite order to the old decoder: since Neon sets 'default NaN mode' float32_add operations are commutative so there is no behaviour difference, but putting them this way around matches the Arm ARM pseudocode and the required operation order for the subtraction in gen_VMLS_fp_reg(). Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/neon-dp.decode | 3 ++ target/arm/translate-neon.inc.c | 81 +++++++++++++++++++++++++++++++++ target/arm/translate.c | 17 +------ 3 files changed, 85 insertions(+), 16 deletions(-) diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index 1f289750dcd..0f74b31dcd1 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -181,5 +181,8 @@ VADD_fp_3s 1111 001 0 0 . 0 . .... .... 1101 ... = 0 .... @3same_fp VSUB_fp_3s 1111 001 0 0 . 1 . .... .... 1101 ... 0 .... @3same_fp VPADD_fp_3s 1111 001 1 0 . 0 . .... .... 1101 ... 0 .... @3same_fp_q0 VABD_fp_3s 1111 001 1 0 . 1 . .... .... 1101 ... 0 .... @3same_fp +VMLA_fp_3s 1111 001 0 0 . 0 . .... .... 1101 ... 1 .... @3same_fp +VMLS_fp_3s 1111 001 0 0 . 1 . .... .... 1101 ... 1 .... @3same_fp +VMUL_fp_3s 1111 001 1 0 . 0 . .... .... 1101 ... 1 .... @3same_fp VPMAX_fp_3s 1111 001 1 0 . 0 . .... .... 1111 ... 0 .... @3same_fp_q0 VPMIN_fp_3s 1111 001 1 0 . 1 . .... .... 1111 ... 0 .... @3same_fp_q0 diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 7bdf1e3fee8..18896598bb4 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -1022,6 +1022,55 @@ DO_3SAME_PAIR(VPADD, padd_u) DO_3SAME_VQDMULH(VQDMULH, qdmulh) DO_3SAME_VQDMULH(VQRDMULH, qrdmulh) =20 +static bool do_3same_fp(DisasContext *s, arg_3same *a, VFPGen3OpSPFn *fn, + bool reads_vd) +{ + /* + * FP operations handled elementwise 32 bits at a time. + * If reads_vd is true then the old value of Vd will be + * loaded before calling the callback function. This is + * used for multiply-accumulate type operations. + */ + TCGv_i32 tmp, tmp2; + int pass; + + if (!arm_dc_feature(s, ARM_FEATURE_NEON)) { + return false; + } + + /* UNDEF accesses to D16-D31 if they don't exist. */ + if (!dc_isar_feature(aa32_simd_r32, s) && + ((a->vd | a->vn | a->vm) & 0x10)) { + return false; + } + + if ((a->vn | a->vm | a->vd) & a->q) { + return false; + } + + if (!vfp_access_check(s)) { + return true; + } + + TCGv_ptr fpstatus =3D get_fpstatus_ptr(1); + for (pass =3D 0; pass < (a->q ? 4 : 2); pass++) { + tmp =3D neon_load_reg(a->vn, pass); + tmp2 =3D neon_load_reg(a->vm, pass); + if (reads_vd) { + TCGv_i32 tmp_rd =3D neon_load_reg(a->vd, pass); + fn(tmp_rd, tmp, tmp2, fpstatus); + neon_store_reg(a->vd, pass, tmp_rd); + tcg_temp_free_i32(tmp); + } else { + fn(tmp, tmp, tmp2, fpstatus); + neon_store_reg(a->vd, pass, tmp); + } + tcg_temp_free_i32(tmp2); + } + tcg_temp_free_ptr(fpstatus); + return true; +} + /* * For all the functions using this macro, size =3D=3D 1 means fp16, * which is an architecture extension we don't implement yet. @@ -1049,6 +1098,38 @@ DO_3SAME_VQDMULH(VQRDMULH, qrdmulh) DO_3S_FP_GVEC(VADD, gen_helper_gvec_fadd_s) DO_3S_FP_GVEC(VSUB, gen_helper_gvec_fsub_s) DO_3S_FP_GVEC(VABD, gen_helper_gvec_fabd_s) +DO_3S_FP_GVEC(VMUL, gen_helper_gvec_fmul_s) + +/* + * For all the functions using this macro, size =3D=3D 1 means fp16, + * which is an architecture extension we don't implement yet. + */ +#define DO_3S_FP(INSN,FUNC,READS_VD) \ + static bool trans_##INSN##_fp_3s(DisasContext *s, arg_3same *a) \ + { \ + if (a->size !=3D 0) { \ + /* TODO fp16 support */ \ + return false; \ + } \ + return do_3same_fp(s, a, FUNC, READS_VD); \ + } + +static void gen_VMLA_fp_3s(TCGv_i32 vd, TCGv_i32 vn, TCGv_i32 vm, + TCGv_ptr fpstatus) +{ + gen_helper_vfp_muls(vn, vn, vm, fpstatus); + gen_helper_vfp_adds(vd, vd, vn, fpstatus); +} + +static void gen_VMLS_fp_3s(TCGv_i32 vd, TCGv_i32 vn, TCGv_i32 vm, + TCGv_ptr fpstatus) +{ + gen_helper_vfp_muls(vn, vn, vm, fpstatus); + gen_helper_vfp_subs(vd, vd, vn, fpstatus); +} + +DO_3S_FP(VMLA, gen_VMLA_fp_3s, true) +DO_3S_FP(VMLS, gen_VMLS_fp_3s, true) =20 static bool do_3same_fp_pair(DisasContext *s, arg_3same *a, VFPGen3OpSPFn = *fn) { diff --git a/target/arm/translate.c b/target/arm/translate.c index ca6ed09ec34..06b6925d31e 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -5433,6 +5433,7 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) case NEON_3R_VPADD_VQRDMLAH: case NEON_3R_VQDMULH_VQRDMULH: case NEON_3R_FLOAT_ARITH: + case NEON_3R_FLOAT_MULTIPLY: /* Already handled by decodetree */ return 1; } @@ -5479,22 +5480,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) tmp =3D neon_load_reg(rn, pass); tmp2 =3D neon_load_reg(rm, pass); switch (op) { - case NEON_3R_FLOAT_MULTIPLY: - { - TCGv_ptr fpstatus =3D get_fpstatus_ptr(1); - gen_helper_vfp_muls(tmp, tmp, tmp2, fpstatus); - if (!u) { - tcg_temp_free_i32(tmp2); - tmp2 =3D neon_load_reg(rd, pass); - if (size =3D=3D 0) { - gen_helper_vfp_adds(tmp, tmp, tmp2, fpstatus); - } else { - gen_helper_vfp_subs(tmp, tmp2, tmp, fpstatus); - } - } - tcg_temp_free_ptr(fpstatus); - break; - } case NEON_3R_FLOAT_CMP: { TCGv_ptr fpstatus =3D get_fpstatus_ptr(1); --=20 2.20.1 From nobody Sat May 18 08:46:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589302531; cv=none; d=zohomail.com; s=zohoarc; b=KnYj8jiiriZ2KO5TfvBW/knEko8MjU9HdYYmyVYJRvk17yHU8aVhij9rB+/Aowmx253HUP+xsVtLTKzfnKKP6uQNXS6twxRn0nNDGCX3r4fFhWoB3Is6nx1n1Tht7H27h/BB588F6JVvjmvvOrw/XGfjdWxj/2hmqxyG4BB/9Wk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589302531; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=pvqJd3qWY/MPKRY/jCCulOuFIxuFeVoByyFCNf9EIS0=; b=bRGf0IM+56jyl/BITAqJQZxQ01xgcLNuKwDG8blVJT3+LOJlRdUSb06X7Z5oc3T5xHhXEB/1rrFbGjw0AoKTX4f/Pg46YyvfUpOn3tzDlinLQlYO/lzNIsaBUDdVglX1scCRjqXRuUxxwXEmFy36rUrCh77fSVPShLWYxbGo3SM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589302531245978.716823340733; Tue, 12 May 2020 09:55:31 -0700 (PDT) Received: from localhost ([::1]:52842 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jYYBl-0001qc-Oj for importer@patchew.org; Tue, 12 May 2020 12:55:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50718) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jYXwG-0006or-SP for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:28 -0400 Received: from mail-wm1-x343.google.com ([2a00:1450:4864:20::343]:39678) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jYXwF-0006Ik-Mm for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:28 -0400 Received: by mail-wm1-x343.google.com with SMTP id y24so24224086wma.4 for ; Tue, 12 May 2020 09:39:27 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id o205sm18525981wmo.32.2020.05.12.09.39.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 09:39:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pvqJd3qWY/MPKRY/jCCulOuFIxuFeVoByyFCNf9EIS0=; b=JBdbHZ9Q3w5xev6NvMd+xn8UT0jnee4oQGeS5PKrl/rD+uuyB29gVF+UXpZmy+zRdc uFiGbi9t4C1rcjnT/kFY9Gi5LJS+EBOJC5s3z9dNVsR3GqPed44dVznnrs8iGgUCJs3J eAyinRREmRpHMm0RF43kbIQveREuehUNn6KPNdjw79pXONzC1zfR6enumrwuUYWrk8VU ind8oQrVL3vkRozf0bT95eWP+Yq/gsn66Uv/51YLsMqv9HnBar6omGIAyjmt8ZyMFUFf CikAauboWeFrC/xDgnWucVOd0Vk/ZkxPgoJJn1dUdGp2RTEFnCx6YG0Td1dJ43ro1szk WeFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pvqJd3qWY/MPKRY/jCCulOuFIxuFeVoByyFCNf9EIS0=; b=jznw7sh0JSCF9N5pZYxZG5xgbD25DI+DqLPlpfbVjbYRX+5W1TqufB3MbFUGTxwD9p MClPr9GnAFybiq2kh/fmbAUc1AxJ+bml4KnoiG/v/YNjjVBEaE4HIaaFIgPX/jQuiVsy 2DxMEjk4Zi2ywMdQZ4FTcBsWTQ5TxWgS81xbWSyGjJF2Kz0cdrd27w9kC4vKz1S5QiBY /RQPaQnq5FEANNkENXpfciFnPWR7+7HRV9h/nkxLbgjRRzf0Nk838dWelR7WVDdo/xK3 WB1AcjwdunAe65xHi5h6yppzv+xFZLttpYfpCkfQXcxBXJyfUmwhZk54sJIk16IMweEt TZYA== X-Gm-Message-State: AGi0PuY2hdOL9wW97Q/t6MMzIVygku6oaHlWs7gedb7dMkde5Pc388Kf nRPzb8lCkEPGa6nfNwgfr2okNTDeiSU6IA== X-Google-Smtp-Source: APiQypJUjwvf/59l1uPokuHRk5AWg03fOCEutMyPJEuvIwCyY4d7sv3xrZIpjGpA/4RNBhTIRkhYsA== X-Received: by 2002:a1c:7f91:: with SMTP id a139mr36404611wmd.164.1589301566336; Tue, 12 May 2020 09:39:26 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 14/17] target/arm: Convert Neon 3-reg-same compare insns to decodetree Date: Tue, 12 May 2020 17:39:01 +0100 Message-Id: <20200512163904.10918-15-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200512163904.10918-1-peter.maydell@linaro.org> References: <20200512163904.10918-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::343; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x343.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon integer 3-reg-same compare insns VCGE, VCGT, VCEQ, VACGE and VACGT to decodetree. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/neon-dp.decode | 5 +++++ target/arm/translate-neon.inc.c | 6 +++++ target/arm/translate.c | 39 ++------------------------------- 3 files changed, 13 insertions(+), 37 deletions(-) diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index 0f74b31dcd1..bc5a3e0295c 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -184,5 +184,10 @@ VABD_fp_3s 1111 001 1 0 . 1 . .... .... 1101 ...= 0 .... @3same_fp VMLA_fp_3s 1111 001 0 0 . 0 . .... .... 1101 ... 1 .... @3same_fp VMLS_fp_3s 1111 001 0 0 . 1 . .... .... 1101 ... 1 .... @3same_fp VMUL_fp_3s 1111 001 1 0 . 0 . .... .... 1101 ... 1 .... @3same_fp +VCEQ_fp_3s 1111 001 0 0 . 0 . .... .... 1110 ... 0 .... @3same_fp +VCGE_fp_3s 1111 001 1 0 . 0 . .... .... 1110 ... 0 .... @3same_fp +VACGE_fp_3s 1111 001 1 0 . 0 . .... .... 1110 ... 1 .... @3same_fp +VCGT_fp_3s 1111 001 1 0 . 1 . .... .... 1110 ... 0 .... @3same_fp +VACGT_fp_3s 1111 001 1 0 . 1 . .... .... 1110 ... 1 .... @3same_fp VPMAX_fp_3s 1111 001 1 0 . 0 . .... .... 1111 ... 0 .... @3same_fp_q0 VPMIN_fp_3s 1111 001 1 0 . 1 . .... .... 1111 ... 0 .... @3same_fp_q0 diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 18896598bb4..eeea71e3bec 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -1114,6 +1114,12 @@ DO_3S_FP_GVEC(VMUL, gen_helper_gvec_fmul_s) return do_3same_fp(s, a, FUNC, READS_VD); \ } =20 +DO_3S_FP(VCEQ, gen_helper_neon_ceq_f32, false) +DO_3S_FP(VCGE, gen_helper_neon_cge_f32, false) +DO_3S_FP(VCGT, gen_helper_neon_cgt_f32, false) +DO_3S_FP(VACGE, gen_helper_neon_acge_f32, false) +DO_3S_FP(VACGT, gen_helper_neon_acgt_f32, false) + static void gen_VMLA_fp_3s(TCGv_i32 vd, TCGv_i32 vn, TCGv_i32 vm, TCGv_ptr fpstatus) { diff --git a/target/arm/translate.c b/target/arm/translate.c index 06b6925d31e..b9fcbbcbcb5 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -5434,6 +5434,8 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) case NEON_3R_VQDMULH_VQRDMULH: case NEON_3R_FLOAT_ARITH: case NEON_3R_FLOAT_MULTIPLY: + case NEON_3R_FLOAT_CMP: + case NEON_3R_FLOAT_ACMP: /* Already handled by decodetree */ return 1; } @@ -5448,17 +5450,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) return 1; /* VPMIN/VPMAX handled by decodetree */ } break; - case NEON_3R_FLOAT_CMP: - if (!u && size) { - /* no encoding for U=3D0 C=3D1x */ - return 1; - } - break; - case NEON_3R_FLOAT_ACMP: - if (!u) { - return 1; - } - break; case NEON_3R_FLOAT_MISC: /* VMAXNM/VMINNM in ARMv8 */ if (u && !arm_dc_feature(s, ARM_FEATURE_V8)) { @@ -5480,32 +5471,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) tmp =3D neon_load_reg(rn, pass); tmp2 =3D neon_load_reg(rm, pass); switch (op) { - case NEON_3R_FLOAT_CMP: - { - TCGv_ptr fpstatus =3D get_fpstatus_ptr(1); - if (!u) { - gen_helper_neon_ceq_f32(tmp, tmp, tmp2, fpstatus); - } else { - if (size =3D=3D 0) { - gen_helper_neon_cge_f32(tmp, tmp, tmp2, fpstatus); - } else { - gen_helper_neon_cgt_f32(tmp, tmp, tmp2, fpstatus); - } - } - tcg_temp_free_ptr(fpstatus); - break; - } - case NEON_3R_FLOAT_ACMP: - { - TCGv_ptr fpstatus =3D get_fpstatus_ptr(1); - if (size =3D=3D 0) { - gen_helper_neon_acge_f32(tmp, tmp, tmp2, fpstatus); - } else { - gen_helper_neon_acgt_f32(tmp, tmp, tmp2, fpstatus); - } - tcg_temp_free_ptr(fpstatus); - break; - } case NEON_3R_FLOAT_MINMAX: { TCGv_ptr fpstatus =3D get_fpstatus_ptr(1); --=20 2.20.1 From nobody Sat May 18 08:46:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589302403; cv=none; d=zohomail.com; s=zohoarc; b=mIPT3GaWLbOoQPL6UjEmDTQvEs6O5lRXl9g5XjQmMk691TnXRFvIM19wdcVy8BmClP9EV+/IqrsjyA8EIQ1vbTbn5hzx+WC2CFO8FrohUzmZevA6VhHs3849NLYLGmQ7J0VCW4O8DuHM7zEPQeJeM3ruzecf/gKC3KYLRP2MAGA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589302403; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=5kP2tavJeHXFNyw0D0tAlIReOM6uXCl1ajq9fRhVF/U=; b=dh9ue4ZLvinQ0cTZbJ6iO+RLcDJWJdmjKKziOeh0+rOPQkGh9Mqjg1Ir6mvzqNEVQSVvyz4ZzX/LP5QnTY2YvFHk83BHB1zxbEgzhkXWQI6HIX2LRA1/SiH1EJNsSz1dsaWGhvQUPdEM4TQi3JZL25GSFUZB1nTu9qySM80bDsg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589302403055540.5242931331002; Tue, 12 May 2020 09:53:23 -0700 (PDT) Received: from localhost ([::1]:44972 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jYY9g-0006tz-Rp for importer@patchew.org; Tue, 12 May 2020 12:53:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50734) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jYXwH-0006qo-Kl for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:29 -0400 Received: from mail-wr1-x444.google.com ([2a00:1450:4864:20::444]:35992) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jYXwG-0006K9-J2 for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:29 -0400 Received: by mail-wr1-x444.google.com with SMTP id y16so9132693wrs.3 for ; Tue, 12 May 2020 09:39:28 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id o205sm18525981wmo.32.2020.05.12.09.39.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 09:39:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5kP2tavJeHXFNyw0D0tAlIReOM6uXCl1ajq9fRhVF/U=; b=vdTzzdS2ByFH3nPVXqLeqletGredx5trALGRyfWMbXsBxdE/sFOM/8noIu/oJvA0nw 7wbDcawcvL4RYm3t8/H2nzgLggocvu3Wo2OjqgkZ6hqAzlDfFIJMiCC5HCLfyLfvQJ8F q+fI1svyqeu6ycsVzNEUjKR7EqRsTqkmLzve9tkAbL1ZMG7+7ocWe3NTnl5BAsS4sakC +3C3u25RV8hNO50sGrdGliqr+ipBUEhdABgF8Y/IR2Lzk3OaWPGdDkLVbZWQCJlYF+bW Y6xSeFFBUy6qEBPd+Dp2fmCT7ejUw6gXgo8BqBVS2lIhlTwPE1oH0ZLrCXKoCFLVvh3m QHog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5kP2tavJeHXFNyw0D0tAlIReOM6uXCl1ajq9fRhVF/U=; b=RVlz64X4xwATsymYg0zECxMzeDcd8oP5KPd5SeB9ZyNvfnpUqb0qe77867wiQO1sUm E6UK251DWERknjyeFq9YiBSLKaP/14R+VSMcHEeIak83Jb3hPqNc+5vhKOxbysHdm83t UyC1Garo6Va2aHiOVkZD2kELCAXnP0YGSLwnahZaFz7MPqTYvq1nPm4WJwnCwRo/DGDp 1qZeMlx6mHz0PLt6YDoDu5qM/TxN50BETsiXmiGM5s2EK79acIapA2MJKtJhVUqxKi49 fXHlBgx5MDL9Z9rdxFaTv6azSDW8cySPgrqFR0wkmllCqV8HdrkPro1GJ+uJ3Xb/uUSe Bx2A== X-Gm-Message-State: AGi0PubTsyFHUqeEVKPnOmunXkK2V6sNxpnWlTH0UCB+XUQy+wsPqZAX LYdCQUhseHXE4jVpVA4XQwPZTQ== X-Google-Smtp-Source: APiQypLf4h7skDhPjAmBdCIxKMoKISjeBUnfdiesVUTlcsrJY2HA8/5SXS6WrtjWNSo7W42sb2qZcg== X-Received: by 2002:a5d:4806:: with SMTP id l6mr26390535wrq.121.1589301567302; Tue, 12 May 2020 09:39:27 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 15/17] target/arm: Move 'env' argument of recps_f32 and rsqrts_f32 helpers to usual place Date: Tue, 12 May 2020 17:39:02 +0100 Message-Id: <20200512163904.10918-16-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200512163904.10918-1-peter.maydell@linaro.org> References: <20200512163904.10918-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::444; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x444.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" The usual location for the env argument in the argument list of a TCG helper is immediately after the return-value argument. recps_f32 and rsqrts_f32 differ in that they put it at the end. Move the env argument to its usual place; this will allow us to more easily use these helper functions with the gvec APIs. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/helper.h | 4 ++-- target/arm/translate.c | 4 ++-- target/arm/vfp_helper.c | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/target/arm/helper.h b/target/arm/helper.h index 6e9629c87b0..49336dc432c 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -203,8 +203,8 @@ DEF_HELPER_FLAGS_3(vfp_fcvt_f64_to_f16, TCG_CALL_NO_RWG= , f16, f64, ptr, i32) DEF_HELPER_4(vfp_muladdd, f64, f64, f64, f64, ptr) DEF_HELPER_4(vfp_muladds, f32, f32, f32, f32, ptr) =20 -DEF_HELPER_3(recps_f32, f32, f32, f32, env) -DEF_HELPER_3(rsqrts_f32, f32, f32, f32, env) +DEF_HELPER_3(recps_f32, f32, env, f32, f32) +DEF_HELPER_3(rsqrts_f32, f32, env, f32, f32) DEF_HELPER_FLAGS_2(recpe_f16, TCG_CALL_NO_RWG, f16, f16, ptr) DEF_HELPER_FLAGS_2(recpe_f32, TCG_CALL_NO_RWG, f32, f32, ptr) DEF_HELPER_FLAGS_2(recpe_f64, TCG_CALL_NO_RWG, f64, f64, ptr) diff --git a/target/arm/translate.c b/target/arm/translate.c index b9fcbbcbcb5..23e3705172b 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -5494,9 +5494,9 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) tcg_temp_free_ptr(fpstatus); } else { if (size =3D=3D 0) { - gen_helper_recps_f32(tmp, tmp, tmp2, cpu_env); + gen_helper_recps_f32(tmp, cpu_env, tmp, tmp2); } else { - gen_helper_rsqrts_f32(tmp, tmp, tmp2, cpu_env); + gen_helper_rsqrts_f32(tmp, cpu_env, tmp, tmp2); } } break; diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c index a7926611665..f5ecaab2d4a 100644 --- a/target/arm/vfp_helper.c +++ b/target/arm/vfp_helper.c @@ -581,7 +581,7 @@ uint32_t HELPER(vfp_fcvt_f64_to_f16)(float64 a, void *f= pstp, uint32_t ahp_mode) #define float32_three make_float32(0x40400000) #define float32_one_point_five make_float32(0x3fc00000) =20 -float32 HELPER(recps_f32)(float32 a, float32 b, CPUARMState *env) +float32 HELPER(recps_f32)(CPUARMState *env, float32 a, float32 b) { float_status *s =3D &env->vfp.standard_fp_status; if ((float32_is_infinity(a) && float32_is_zero_or_denormal(b)) || @@ -594,7 +594,7 @@ float32 HELPER(recps_f32)(float32 a, float32 b, CPUARMS= tate *env) return float32_sub(float32_two, float32_mul(a, b, s), s); } =20 -float32 HELPER(rsqrts_f32)(float32 a, float32 b, CPUARMState *env) +float32 HELPER(rsqrts_f32)(CPUARMState *env, float32 a, float32 b) { float_status *s =3D &env->vfp.standard_fp_status; float32 product; --=20 2.20.1 From nobody Sat May 18 08:46:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589302420; cv=none; d=zohomail.com; s=zohoarc; b=IkPYbrFWIdHwu/h7l2oszJoy3HN7LP19+LUUr4scGT+7I+WbfCN+oviQvGCdn81qhUDaK34ws1A3TnGJuqi/2mw07nJg32xukydowm9AnWDDlYt8/C9U6zqo3JjZ+fG/cbhT5wJH609GSfY+7M8yP3/MtwDPzXedSDVWWaYU+VY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589302420; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=rYOYRtg99xSCr5ET97yS6jthFxSiidOBBESmPdEt8oM=; b=muaa4ydqLSVL0rm+sT3hKOgqVke7kTRjuH+xHea+ElaSjrngWpvfNZ3AFKd+RGU1htrr8uBbSRwNW29FYHJ/WOef/zOePV6OWWUubF/CY58RD0zgNSXnCGTZ+Sbdwdj9CXSovxV87QlbMVTU73LpEBoxDQMRup2J0ExTvDKJAOk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589302420494573.8225238314153; Tue, 12 May 2020 09:53:40 -0700 (PDT) Received: from localhost ([::1]:46604 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jYY9z-0007bN-7p for importer@patchew.org; Tue, 12 May 2020 12:53:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50748) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jYXwI-0006uD-Vb for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:31 -0400 Received: from mail-wm1-x343.google.com ([2a00:1450:4864:20::343]:39679) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jYXwH-0006Lh-PE for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:30 -0400 Received: by mail-wm1-x343.google.com with SMTP id y24so24224360wma.4 for ; Tue, 12 May 2020 09:39:29 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id o205sm18525981wmo.32.2020.05.12.09.39.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 09:39:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rYOYRtg99xSCr5ET97yS6jthFxSiidOBBESmPdEt8oM=; b=aj+xLkG5shy+V/aSdioqQNdl0VFxdvf8MHu4Cevfb4KPWvpoD5Z7XmoDrLRJMLSxfz CgugOXN7Zlvzk3j57VHtiQGiM+yUcrILgnpb6GgT442yCUFW9nMPP13qMs6x/pbZ9H8n AcmkoKrFwpbknjz2jXIVPBJhjlQ7ve3FbyzZ1UwGoW29LehldJNvzRfNsiRVBWnppHNf CU882O42sCbjZ5iU06yjnyhj9T+wnl+RQMEFua3Q+rmnF5TbaqERitdvUE+Kly/0bHqa pGIAKDTm0shw4jQf7wyGJzUOgUd255tj6ztZV+ywAIeCEUspp4lNnGwf9BlLAfjDi304 HIBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rYOYRtg99xSCr5ET97yS6jthFxSiidOBBESmPdEt8oM=; b=aEjetbZGxu2JNi3JUZ/SwL5fyWr6uGQspqXtVGbmX6m/HjWnwo4HoTX5FRGVuC9UjD Hy9+Jc4JDmheM9fehtfAWKgfkSxWQA5hboyXICpDU/O+vWAo4KuYnq1ndWkSlTgs2Dc/ xUoCsHY4EWhO32dwNdHTbeQZQkh4O5fyh7HViXeHDmueeU9cRTZUqamD8RklP4Dkkf3u BqnKHiWjVkoCMWVGQCK1fPTohZnbsERS9QbYfVU+lDeRoWk8wmo5S6ahM9WDsuarxEiz K8rSWM9DL3eN1MdZweXhiVRVyg+h3Er6G9wqcEcKs3XI1iq32OgwoZBC5J0JxNGDEhnR O3+w== X-Gm-Message-State: AGi0Puag1vosD5iiQW8F1ekSh8X/4cM2JVh0705os2174YtKTjWo471j y5qe7VAiVCR6Dgpj6Ifl6oYW+Q== X-Google-Smtp-Source: APiQypJQIZ9GRzW9aHCT1fq52a88j61AgsGwGl8tkzPNkkfZ0tbi1JS73YgFLcsGVmascEZgmF/Mbg== X-Received: by 2002:a05:600c:2f17:: with SMTP id r23mr36608455wmn.81.1589301568454; Tue, 12 May 2020 09:39:28 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 16/17] target/arm: Convert Neon fp VMAX/VMIN/VMAXNM/VMINNM/VRECPS/VRSQRTS to decodetree Date: Tue, 12 May 2020 17:39:03 +0100 Message-Id: <20200512163904.10918-17-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200512163904.10918-1-peter.maydell@linaro.org> References: <20200512163904.10918-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::343; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x343.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon fp VMAX/VMIN/VMAXNM/VMINNM/VRECPS/VRSQRTS 3-reg-same insns to decodetree. (These are all the remaining non-accumulation instructions in this group.) Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/neon-dp.decode | 6 +++ target/arm/translate-neon.inc.c | 70 +++++++++++++++++++++++++++++++++ target/arm/translate.c | 42 +------------------- 3 files changed, 78 insertions(+), 40 deletions(-) diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index bc5a3e0295c..c276faf8cce 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -189,5 +189,11 @@ VCGE_fp_3s 1111 001 1 0 . 0 . .... .... 1110 ...= 0 .... @3same_fp VACGE_fp_3s 1111 001 1 0 . 0 . .... .... 1110 ... 1 .... @3same_fp VCGT_fp_3s 1111 001 1 0 . 1 . .... .... 1110 ... 0 .... @3same_fp VACGT_fp_3s 1111 001 1 0 . 1 . .... .... 1110 ... 1 .... @3same_fp +VMAX_fp_3s 1111 001 0 0 . 0 . .... .... 1111 ... 0 .... @3same_fp +VMIN_fp_3s 1111 001 0 0 . 1 . .... .... 1111 ... 0 .... @3same_fp VPMAX_fp_3s 1111 001 1 0 . 0 . .... .... 1111 ... 0 .... @3same_fp_q0 VPMIN_fp_3s 1111 001 1 0 . 1 . .... .... 1111 ... 0 .... @3same_fp_q0 +VRECPS_fp_3s 1111 001 0 0 . 0 . .... .... 1111 ... 1 .... @3same_fp +VRSQRTS_fp_3s 1111 001 0 0 . 1 . .... .... 1111 ... 1 .... @3same_fp +VMAXNM_fp_3s 1111 001 1 0 . 0 . .... .... 1111 ... 1 .... @3same_fp +VMINNM_fp_3s 1111 001 1 0 . 1 . .... .... 1111 ... 1 .... @3same_fp diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index eeea71e3bec..263d2b47132 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -1119,6 +1119,8 @@ DO_3S_FP(VCGE, gen_helper_neon_cge_f32, false) DO_3S_FP(VCGT, gen_helper_neon_cgt_f32, false) DO_3S_FP(VACGE, gen_helper_neon_acge_f32, false) DO_3S_FP(VACGT, gen_helper_neon_acgt_f32, false) +DO_3S_FP(VMAX, gen_helper_vfp_maxs, false) +DO_3S_FP(VMIN, gen_helper_vfp_mins, false) =20 static void gen_VMLA_fp_3s(TCGv_i32 vd, TCGv_i32 vn, TCGv_i32 vm, TCGv_ptr fpstatus) @@ -1137,6 +1139,74 @@ static void gen_VMLS_fp_3s(TCGv_i32 vd, TCGv_i32 vn,= TCGv_i32 vm, DO_3S_FP(VMLA, gen_VMLA_fp_3s, true) DO_3S_FP(VMLS, gen_VMLS_fp_3s, true) =20 +static bool trans_VMAXNM_fp_3s(DisasContext *s, arg_3same *a) +{ + if (!arm_dc_feature(s, ARM_FEATURE_V8)) { + return false; + } + + if (a->size !=3D 0) { + /* TODO fp16 support */ + return false; + } + + return do_3same_fp(s, a, gen_helper_vfp_maxnums, false); +} + +static bool trans_VMINNM_fp_3s(DisasContext *s, arg_3same *a) +{ + if (!arm_dc_feature(s, ARM_FEATURE_V8)) { + return false; + } + + if (a->size !=3D 0) { + /* TODO fp16 support */ + return false; + } + + return do_3same_fp(s, a, gen_helper_vfp_minnums, false); +} + +WRAP_ENV_FN(gen_VRECPS_tramp, gen_helper_recps_f32) + +static void gen_VRECPS_fp_3s(unsigned vece, uint32_t rd_ofs, + uint32_t rn_ofs, uint32_t rm_ofs, + uint32_t oprsz, uint32_t maxsz) +{ + static const GVecGen3 ops =3D { .fni4 =3D gen_VRECPS_tramp }; + tcg_gen_gvec_3(rd_ofs, rn_ofs, rm_ofs, oprsz, maxsz, &ops); +} + +static bool trans_VRECPS_fp_3s(DisasContext *s, arg_3same *a) +{ + if (a->size !=3D 0) { + /* TODO fp16 support */ + return false; + } + + return do_3same(s, a, gen_VRECPS_fp_3s); +} + +WRAP_ENV_FN(gen_VRSQRTS_tramp, gen_helper_rsqrts_f32) + +static void gen_VRSQRTS_fp_3s(unsigned vece, uint32_t rd_ofs, + uint32_t rn_ofs, uint32_t rm_ofs, + uint32_t oprsz, uint32_t maxsz) +{ + static const GVecGen3 ops =3D { .fni4 =3D gen_VRSQRTS_tramp }; + tcg_gen_gvec_3(rd_ofs, rn_ofs, rm_ofs, oprsz, maxsz, &ops); +} + +static bool trans_VRSQRTS_fp_3s(DisasContext *s, arg_3same *a) +{ + if (a->size !=3D 0) { + /* TODO fp16 support */ + return false; + } + + return do_3same(s, a, gen_VRSQRTS_fp_3s); +} + static bool do_3same_fp_pair(DisasContext *s, arg_3same *a, VFPGen3OpSPFn = *fn) { /* FP operations handled pairwise 32 bits at a time */ diff --git a/target/arm/translate.c b/target/arm/translate.c index 23e3705172b..c1d4fab8e80 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -5436,6 +5436,8 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) case NEON_3R_FLOAT_MULTIPLY: case NEON_3R_FLOAT_CMP: case NEON_3R_FLOAT_ACMP: + case NEON_3R_FLOAT_MINMAX: + case NEON_3R_FLOAT_MISC: /* Already handled by decodetree */ return 1; } @@ -5445,17 +5447,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) return 1; } switch (op) { - case NEON_3R_FLOAT_MINMAX: - if (u) { - return 1; /* VPMIN/VPMAX handled by decodetree */ - } - break; - case NEON_3R_FLOAT_MISC: - /* VMAXNM/VMINNM in ARMv8 */ - if (u && !arm_dc_feature(s, ARM_FEATURE_V8)) { - return 1; - } - break; case NEON_3R_VFM_VQRDMLSH: if (!dc_isar_feature(aa32_simdfmac, s)) { return 1; @@ -5471,35 +5462,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) tmp =3D neon_load_reg(rn, pass); tmp2 =3D neon_load_reg(rm, pass); switch (op) { - case NEON_3R_FLOAT_MINMAX: - { - TCGv_ptr fpstatus =3D get_fpstatus_ptr(1); - if (size =3D=3D 0) { - gen_helper_vfp_maxs(tmp, tmp, tmp2, fpstatus); - } else { - gen_helper_vfp_mins(tmp, tmp, tmp2, fpstatus); - } - tcg_temp_free_ptr(fpstatus); - break; - } - case NEON_3R_FLOAT_MISC: - if (u) { - /* VMAXNM/VMINNM */ - TCGv_ptr fpstatus =3D get_fpstatus_ptr(1); - if (size =3D=3D 0) { - gen_helper_vfp_maxnums(tmp, tmp, tmp2, fpstatus); - } else { - gen_helper_vfp_minnums(tmp, tmp, tmp2, fpstatus); - } - tcg_temp_free_ptr(fpstatus); - } else { - if (size =3D=3D 0) { - gen_helper_recps_f32(tmp, cpu_env, tmp, tmp2); - } else { - gen_helper_rsqrts_f32(tmp, cpu_env, tmp, tmp2); - } - } - break; case NEON_3R_VFM_VQRDMLSH: { /* VFMA, VFMS: fused multiply-add */ --=20 2.20.1 From nobody Sat May 18 08:46:53 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1589302581; cv=none; d=zohomail.com; s=zohoarc; b=H53mzhJOVjQ4KZc+5uMqufLkPMV2VNc9yAu+igCnxE4IQFxT9Ospr+ZjxLToRxDbg4YG6QSlRyBZtSLAGGIkaliFpKqIFC84FuVtZut8KjI/DA5dwIvhKNTyUIM+67zIrUK/7PMUL0JQvuZtOrYeugTWbCsIO4EXzWoqsYJ0fBI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589302581; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=jvTpgwbd+LTkl54Kt4cTm/vhOyWXxlbq+3ojpz64Gk8=; b=nlmN5MRHvRS5/LOuieAqLh89CS4MNkekQot9LeO8g2xGdQp56X0UXimB2Y++cDuDPUfdJTWBG6/07YjAsOQkM9ufOHCg125ya2Hh4GroYDIFbP18uxuQ6jA5XkIgqSwJksIHqlG+gPQi1FVT92abr69GMy1+W/6jmB7QwMvACto= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1589302581559523.0660429518556; Tue, 12 May 2020 09:56:21 -0700 (PDT) Received: from localhost ([::1]:55610 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jYYCZ-00038U-W9 for importer@patchew.org; Tue, 12 May 2020 12:56:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50774) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jYXwK-0006yU-M3 for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:32 -0400 Received: from mail-wm1-x343.google.com ([2a00:1450:4864:20::343]:36783) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jYXwJ-0006N5-6l for qemu-devel@nongnu.org; Tue, 12 May 2020 12:39:32 -0400 Received: by mail-wm1-x343.google.com with SMTP id w19so9435217wmc.1 for ; Tue, 12 May 2020 09:39:30 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id o205sm18525981wmo.32.2020.05.12.09.39.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 09:39:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jvTpgwbd+LTkl54Kt4cTm/vhOyWXxlbq+3ojpz64Gk8=; b=sEbNz3QB4lL4aDrpkmxAcr6fgTDjTqatABWw3sURm2rR6Dd8qAllDmwCLs+TES7AWI Ew1enGJ1mQ6m3iB50WAhoJy/C5xd07nBba73QQEdlv3qK4LmzTKnhDTrbiDmfKV1Jrra tuibWe3bgwrCjxHMWsfQsdiuNg3lcXLuP4oIzao2TZUC7Yu45TP7uZ8SXv2dSB5MmNdD D4t65L0kx1jfVHR97B6s7ferIeY85z1C72393a+eLxWAv0NbMvYzmlet2H5y6/HHO0YD jA6gkBS+vOLI3ul3jrbLncAaQqBHd5Jh/3Ef5vjBY2qePKRJ8pALG+B7l7zHyy8K8HQU djpQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jvTpgwbd+LTkl54Kt4cTm/vhOyWXxlbq+3ojpz64Gk8=; b=qUU8O1Qh33K6d94cvXBlJ7dYMqEO+SZKvYEsJ8nTJEyxvhhan81YSBM++GSGKO5Ff+ FMSTMBfC6EMHlR/KUMiupbdg/yBCtIL47Qzk4Un+aI/YiT9epG3pVkhd4QuMFNNDB2EF BXkOXy3m3rpyWly1/mZC9FMzVlE4UAfehC6rcspPRS+0PFg3rgxdv6F4x+ZF7jszFmWb AXsB6fgfixdZfmBPKgNexRfXD3M4Vo34h9u0qiIbswtQsaZ67wbYvReEZs3GNfsv33ej RXCS/rf1xqjXfxAfZb5t+WHW7P9wFrlZqf5hk4oKi03ZgOaO+V0BZvfaxL25NMw2Ue+j v3jA== X-Gm-Message-State: AGi0PuYLdAf46ducuuq3eibZZOK/62uD+c+epM4tCXDidYTJb/HAi2No VzxFVBQUvwOwjE3T3VZ2evyvS+2wU51Ajg== X-Google-Smtp-Source: APiQypJMpv1fCmXHkv2Bfkl+PKG4vCSv65KMdHOM5CdwMyt+AiFVsfDwGwQ6cLzbCVtmBjl/aUHNIA== X-Received: by 2002:a1c:19c1:: with SMTP id 184mr22810671wmz.29.1589301569642; Tue, 12 May 2020 09:39:29 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 17/17] target/arm: Convert NEON VFMA, VFMS 3-reg-same insns to decodetree Date: Tue, 12 May 2020 17:39:04 +0100 Message-Id: <20200512163904.10918-18-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200512163904.10918-1-peter.maydell@linaro.org> References: <20200512163904.10918-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::343; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x343.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon floating point VFMA and VFMS insn to decodetree. These are the last insns in the 3-reg-same group so we can remove all the support/loop code from the old decoder. Signed-off-by: Peter Maydell Reviewed-by: Richard= Henderson --- target/arm/neon-dp.decode | 3 + target/arm/translate-neon.inc.c | 41 ++++++++ target/arm/translate.c | 176 +------------------------------- 3 files changed, 46 insertions(+), 174 deletions(-) diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index c276faf8cce..f53bf8a4494 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -175,6 +175,9 @@ SHA256H2_3s 1111 001 1 0 . 01 .... .... 1100 . 1 .= 0 .... \ SHA256SU1_3s 1111 001 1 0 . 10 .... .... 1100 . 1 . 0 .... \ vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp =20 +VFMA_fp_3s 1111 001 0 0 . 0 . .... .... 1100 ... 1 .... @3same_fp +VFMS_fp_3s 1111 001 0 0 . 1 . .... .... 1100 ... 1 .... @3same_fp + VQRDMLSH_3s 1111 001 1 0 . .. .... .... 1100 ... 1 .... @3same =20 VADD_fp_3s 1111 001 0 0 . 0 . .... .... 1101 ... 0 .... @3same_fp diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 263d2b47132..7212876e8f0 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -1207,6 +1207,47 @@ static bool trans_VRSQRTS_fp_3s(DisasContext *s, arg= _3same *a) return do_3same(s, a, gen_VRSQRTS_fp_3s); } =20 +static void gen_VFMA_fp_3s(TCGv_i32 vd, TCGv_i32 vn, TCGv_i32 vm, + TCGv_ptr fpstatus) +{ + gen_helper_vfp_muladds(vd, vn, vm, vd, fpstatus); +} + +static bool trans_VFMA_fp_3s(DisasContext *s, arg_3same *a) +{ + if (!dc_isar_feature(aa32_simdfmac, s)) { + return false; + } + + if (a->size !=3D 0) { + /* TODO fp16 support */ + return false; + } + + return do_3same_fp(s, a, gen_VFMA_fp_3s, true); +} + +static void gen_VFMS_fp_3s(TCGv_i32 vd, TCGv_i32 vn, TCGv_i32 vm, + TCGv_ptr fpstatus) +{ + gen_helper_vfp_negs(vn, vn); + gen_helper_vfp_muladds(vd, vn, vm, vd, fpstatus); +} + +static bool trans_VFMS_fp_3s(DisasContext *s, arg_3same *a) +{ + if (!dc_isar_feature(aa32_simdfmac, s)) { + return false; + } + + if (a->size !=3D 0) { + /* TODO fp16 support */ + return false; + } + + return do_3same_fp(s, a, gen_VFMS_fp_3s, true); +} + static bool do_3same_fp_pair(DisasContext *s, arg_3same *a, VFPGen3OpSPFn = *fn) { /* FP operations handled pairwise 32 bits at a time */ diff --git a/target/arm/translate.c b/target/arm/translate.c index c1d4fab8e80..4c9bb8b5ac0 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -3391,78 +3391,6 @@ static void gen_neon_narrow_op(int op, int u, int si= ze, } } =20 -/* Symbolic constants for op fields for Neon 3-register same-length. - * The values correspond to bits [11:8,4]; see the ARM ARM DDI0406B - * table A7-9. - */ -#define NEON_3R_VHADD 0 -#define NEON_3R_VQADD 1 -#define NEON_3R_VRHADD 2 -#define NEON_3R_LOGIC 3 /* VAND,VBIC,VORR,VMOV,VORN,VEOR,VBIF,VBIT,VBSL */ -#define NEON_3R_VHSUB 4 -#define NEON_3R_VQSUB 5 -#define NEON_3R_VCGT 6 -#define NEON_3R_VCGE 7 -#define NEON_3R_VSHL 8 -#define NEON_3R_VQSHL 9 -#define NEON_3R_VRSHL 10 -#define NEON_3R_VQRSHL 11 -#define NEON_3R_VMAX 12 -#define NEON_3R_VMIN 13 -#define NEON_3R_VABD 14 -#define NEON_3R_VABA 15 -#define NEON_3R_VADD_VSUB 16 -#define NEON_3R_VTST_VCEQ 17 -#define NEON_3R_VML 18 /* VMLA, VMLS */ -#define NEON_3R_VMUL 19 -#define NEON_3R_VPMAX 20 -#define NEON_3R_VPMIN 21 -#define NEON_3R_VQDMULH_VQRDMULH 22 -#define NEON_3R_VPADD_VQRDMLAH 23 -#define NEON_3R_SHA 24 /* SHA1C,SHA1P,SHA1M,SHA1SU0,SHA256H{2},SHA256SU1 */ -#define NEON_3R_VFM_VQRDMLSH 25 /* VFMA, VFMS, VQRDMLSH */ -#define NEON_3R_FLOAT_ARITH 26 /* float VADD, VSUB, VPADD, VABD */ -#define NEON_3R_FLOAT_MULTIPLY 27 /* float VMLA, VMLS, VMUL */ -#define NEON_3R_FLOAT_CMP 28 /* float VCEQ, VCGE, VCGT */ -#define NEON_3R_FLOAT_ACMP 29 /* float VACGE, VACGT, VACLE, VACLT */ -#define NEON_3R_FLOAT_MINMAX 30 /* float VMIN, VMAX */ -#define NEON_3R_FLOAT_MISC 31 /* float VRECPS, VRSQRTS, VMAXNM/MINNM */ - -static const uint8_t neon_3r_sizes[] =3D { - [NEON_3R_VHADD] =3D 0x7, - [NEON_3R_VQADD] =3D 0xf, - [NEON_3R_VRHADD] =3D 0x7, - [NEON_3R_LOGIC] =3D 0xf, /* size field encodes op type */ - [NEON_3R_VHSUB] =3D 0x7, - [NEON_3R_VQSUB] =3D 0xf, - [NEON_3R_VCGT] =3D 0x7, - [NEON_3R_VCGE] =3D 0x7, - [NEON_3R_VSHL] =3D 0xf, - [NEON_3R_VQSHL] =3D 0xf, - [NEON_3R_VRSHL] =3D 0xf, - [NEON_3R_VQRSHL] =3D 0xf, - [NEON_3R_VMAX] =3D 0x7, - [NEON_3R_VMIN] =3D 0x7, - [NEON_3R_VABD] =3D 0x7, - [NEON_3R_VABA] =3D 0x7, - [NEON_3R_VADD_VSUB] =3D 0xf, - [NEON_3R_VTST_VCEQ] =3D 0x7, - [NEON_3R_VML] =3D 0x7, - [NEON_3R_VMUL] =3D 0x7, - [NEON_3R_VPMAX] =3D 0x7, - [NEON_3R_VPMIN] =3D 0x7, - [NEON_3R_VQDMULH_VQRDMULH] =3D 0x6, - [NEON_3R_VPADD_VQRDMLAH] =3D 0x7, - [NEON_3R_SHA] =3D 0xf, /* size field encodes op type */ - [NEON_3R_VFM_VQRDMLSH] =3D 0x7, /* For VFM, size bit 1 encodes op */ - [NEON_3R_FLOAT_ARITH] =3D 0x5, /* size bit 1 encodes op */ - [NEON_3R_FLOAT_MULTIPLY] =3D 0x5, /* size bit 1 encodes op */ - [NEON_3R_FLOAT_CMP] =3D 0x5, /* size bit 1 encodes op */ - [NEON_3R_FLOAT_ACMP] =3D 0x5, /* size bit 1 encodes op */ - [NEON_3R_FLOAT_MINMAX] =3D 0x5, /* size bit 1 encodes op */ - [NEON_3R_FLOAT_MISC] =3D 0x5, /* size bit 1 encodes op */ -}; - /* Symbolic constants for op fields for Neon 2-register miscellaneous. * The values correspond to bits [17:16,10:7]; see the ARM ARM DDI0406B * table A7-13. @@ -5383,108 +5311,8 @@ static int disas_neon_data_insn(DisasContext *s, ui= nt32_t insn) rm_ofs =3D neon_reg_offset(rm, 0); =20 if ((insn & (1 << 23)) =3D=3D 0) { - /* Three register same length. */ - op =3D ((insn >> 7) & 0x1e) | ((insn >> 4) & 1); - /* Catch invalid op and bad size combinations: UNDEF */ - if ((neon_3r_sizes[op] & (1 << size)) =3D=3D 0) { - return 1; - } - /* All insns of this form UNDEF for either this condition or the - * superset of cases "Q=3D=3D1"; we catch the latter later. - */ - if (q && ((rd | rn | rm) & 1)) { - return 1; - } - switch (op) { - case NEON_3R_VFM_VQRDMLSH: - if (!u) { - /* VFM, VFMS */ - if (size =3D=3D 1) { - return 1; - } - break; - } - /* VQRDMLSH : handled by decodetree */ - return 1; - - case NEON_3R_VADD_VSUB: - case NEON_3R_LOGIC: - case NEON_3R_VMAX: - case NEON_3R_VMIN: - case NEON_3R_VTST_VCEQ: - case NEON_3R_VCGT: - case NEON_3R_VCGE: - case NEON_3R_VQADD: - case NEON_3R_VQSUB: - case NEON_3R_VMUL: - case NEON_3R_VML: - case NEON_3R_VSHL: - case NEON_3R_SHA: - case NEON_3R_VHADD: - case NEON_3R_VRHADD: - case NEON_3R_VHSUB: - case NEON_3R_VABD: - case NEON_3R_VABA: - case NEON_3R_VQSHL: - case NEON_3R_VRSHL: - case NEON_3R_VQRSHL: - case NEON_3R_VPMAX: - case NEON_3R_VPMIN: - case NEON_3R_VPADD_VQRDMLAH: - case NEON_3R_VQDMULH_VQRDMULH: - case NEON_3R_FLOAT_ARITH: - case NEON_3R_FLOAT_MULTIPLY: - case NEON_3R_FLOAT_CMP: - case NEON_3R_FLOAT_ACMP: - case NEON_3R_FLOAT_MINMAX: - case NEON_3R_FLOAT_MISC: - /* Already handled by decodetree */ - return 1; - } - - if (size =3D=3D 3) { - /* 64-bit element instructions: handled by decodetree */ - return 1; - } - switch (op) { - case NEON_3R_VFM_VQRDMLSH: - if (!dc_isar_feature(aa32_simdfmac, s)) { - return 1; - } - break; - default: - break; - } - - for (pass =3D 0; pass < (q ? 4 : 2); pass++) { - - /* Elementwise. */ - tmp =3D neon_load_reg(rn, pass); - tmp2 =3D neon_load_reg(rm, pass); - switch (op) { - case NEON_3R_VFM_VQRDMLSH: - { - /* VFMA, VFMS: fused multiply-add */ - TCGv_ptr fpstatus =3D get_fpstatus_ptr(1); - TCGv_i32 tmp3 =3D neon_load_reg(rd, pass); - if (size) { - /* VFMS */ - gen_helper_vfp_negs(tmp, tmp); - } - gen_helper_vfp_muladds(tmp, tmp, tmp2, tmp3, fpstatus); - tcg_temp_free_i32(tmp3); - tcg_temp_free_ptr(fpstatus); - break; - } - default: - abort(); - } - tcg_temp_free_i32(tmp2); - - neon_store_reg(rd, pass, tmp); - - } /* for pass */ - /* End of 3 register same size operations. */ + /* Three register same length: handled by decodetree */ + return 1; } else if (insn & (1 << 4)) { if ((insn & 0x00380080) !=3D 0) { /* Two registers and shift. */ --=20 2.20.1