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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id m3sm2154818wrn.96.2020.05.11.06.34.13 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 May 2020 06:34:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=JEvempOs4qwCLlW8+Q/mQ4vm2AHnJE/FFxeayEtZ2rg=; b=ND0BwB2qLdk0USt8J04Shxk31omqX3pgStx/xXqVLqrwNOFd8PDM+IItgVYrQxcYd9 Z1/SJ6ko9rP0MEaRWvdsbaTdQ4NOUs5Jx5Y6xqNoTCaJh2ysrQhcvR7Jg+CEejQpnEDP 0UzxRgFzarDmIKcNhGxUNZoxjyqjtkVLIIgaT/NYM4J+3tQs7FPTSNKCs46xAFuKy46k GGZZi7a+6snW+HyWHp/zQKvuAZoL+0q8BLYPREc13/YeWH/PPnxf0K45w7RRExlzk/oi 7sq3P6qC6Mhgo+N3ujLxD+M2OEi2GJO/q83rO821mcUouBU2pIysXMSsCXbKCvvbS3ie 79gA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JEvempOs4qwCLlW8+Q/mQ4vm2AHnJE/FFxeayEtZ2rg=; b=CPE6YXDwSANB/nQ9bZxcr4wFm2LclG8+DP2tGRZtjPxhnr3mo70ZdPJyZc7FDV3dza aIwMC6iz19HsuwZ4wIbeatS+dn57Je5aGipK/72HIaO5PiB+F2h2PtSvkJQhf5E0NEDD 84+MD7u23VVcTEEPUhiegdBQS2wZTncm/2nBgjQCoAI5ZTmgHs6gddrjwd2m6nNm627W YncI6LaJvAoMJ4mHC624Dodaxhh20TDkHt6DlcF6N6mwGZ+YkZJhqT6AO3D2vO4DSBDI Tztuzf1u5DLEfwXxKfjRYOoAEElsxwaegwGa8AS7lG9xnr53pBXDIqvciEFXQFB+4xux uU5A== X-Gm-Message-State: AGi0PuZ1jRzJVxFH0J6HHJJil6DMD3u94qXJNuajjpBA6xjEX46+ss2G ooB17dzluRyhdVXH4zBSFfh/sx2k3w1zmw== X-Google-Smtp-Source: APiQypJ9Q49j2E+xgorTERhSnr+0UiGin//+C7BWrqeK6MA/QipHkHQXguqVVFfx7JdybLm2WGbfIA== X-Received: by 2002:adf:afd6:: with SMTP id y22mr18779187wrd.417.1589204054485; Mon, 11 May 2020 06:34:14 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 06/34] hw/timer/nrf51_timer: Display timer ID in trace events Date: Mon, 11 May 2020 14:33:37 +0100 Message-Id: <20200511133405.5275-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200511133405.5275-1-peter.maydell@linaro.org> References: <20200511133405.5275-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42b.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 The NRF51 series SoC have 3 timer peripherals, each having 4 counters. To help differentiate which peripheral is accessed, display the timer ID in the trace events. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20200504072822.18799-4-f4bug@amsat.org Signed-off-by: Peter Maydell --- include/hw/timer/nrf51_timer.h | 1 + hw/arm/nrf51_soc.c | 5 +++++ hw/timer/nrf51_timer.c | 11 +++++++++-- hw/timer/trace-events | 4 ++-- 4 files changed, 17 insertions(+), 4 deletions(-) diff --git a/include/hw/timer/nrf51_timer.h b/include/hw/timer/nrf51_timer.h index 85cad2300df..eb6815f21d7 100644 --- a/include/hw/timer/nrf51_timer.h +++ b/include/hw/timer/nrf51_timer.h @@ -59,6 +59,7 @@ typedef struct NRF51TimerState { MemoryRegion iomem; qemu_irq irq; =20 + uint8_t id; QEMUTimer timer; int64_t timer_start_ns; int64_t update_counter_ns; diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c index e50473fd199..71309e53cc8 100644 --- a/hw/arm/nrf51_soc.c +++ b/hw/arm/nrf51_soc.c @@ -150,6 +150,11 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Er= ror **errp) =20 /* TIMER */ for (i =3D 0; i < NRF51_NUM_TIMERS; i++) { + object_property_set_uint(OBJECT(&s->timer[i]), i, "id", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->timer[i]), true, "realized", &= err); if (err) { error_propagate(errp, err); diff --git a/hw/timer/nrf51_timer.c b/hw/timer/nrf51_timer.c index bc82c85a6f2..38cea0542e1 100644 --- a/hw/timer/nrf51_timer.c +++ b/hw/timer/nrf51_timer.c @@ -17,6 +17,7 @@ #include "hw/arm/nrf51.h" #include "hw/irq.h" #include "hw/timer/nrf51_timer.h" +#include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "trace.h" =20 @@ -185,7 +186,7 @@ static uint64_t nrf51_timer_read(void *opaque, hwaddr o= ffset, unsigned int size) __func__, offset); } =20 - trace_nrf51_timer_read(offset, r, size); + trace_nrf51_timer_read(s->id, offset, r, size); =20 return r; } @@ -197,7 +198,7 @@ static void nrf51_timer_write(void *opaque, hwaddr offs= et, uint64_t now =3D qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); size_t idx; =20 - trace_nrf51_timer_write(offset, value, size); + trace_nrf51_timer_write(s->id, offset, value, size); =20 switch (offset) { case NRF51_TIMER_TASK_START: @@ -372,12 +373,18 @@ static const VMStateDescription vmstate_nrf51_timer = =3D { } }; =20 +static Property nrf51_timer_properties[] =3D { + DEFINE_PROP_UINT8("id", NRF51TimerState, id, 0), + DEFINE_PROP_END_OF_LIST(), +}; + static void nrf51_timer_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); =20 dc->reset =3D nrf51_timer_reset; dc->vmsd =3D &vmstate_nrf51_timer; + device_class_set_props(dc, nrf51_timer_properties); } =20 static const TypeInfo nrf51_timer_info =3D { diff --git a/hw/timer/trace-events b/hw/timer/trace-events index 29fda7870e0..43b605cc759 100644 --- a/hw/timer/trace-events +++ b/hw/timer/trace-events @@ -67,8 +67,8 @@ cmsdk_apb_dualtimer_write(uint64_t offset, uint64_t data,= unsigned size) "CMSDK cmsdk_apb_dualtimer_reset(void) "CMSDK APB dualtimer: reset" =20 # nrf51_timer.c -nrf51_timer_read(uint64_t addr, uint32_t value, unsigned size) "read addr = 0x%" PRIx64 " data 0x%" PRIx32 " size %u" -nrf51_timer_write(uint64_t addr, uint32_t value, unsigned size) "write add= r 0x%" PRIx64 " data 0x%" PRIx32 " size %u" +nrf51_timer_read(uint8_t timer_id, uint64_t addr, uint32_t value, unsigned= size) "timer %u read addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" +nrf51_timer_write(uint8_t timer_id, uint64_t addr, uint32_t value, unsigne= d size) "timer %u write addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" =20 # bcm2835_systmr.c bcm2835_systmr_irq(bool enable) "timer irq state %u" --=20 2.20.1