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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id m3sm2154818wrn.96.2020.05.11.06.34.40 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 May 2020 06:34:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=EycYX61osoiUiTKFgHPBJxcF1OjdHnGeFDt+a8slNIw=; b=IagC0eV3GbvO+tI5GJbDS25Os/grZzVWaQyRGqejkYach3H8Pb3w4FDj04Jspye/Yk OVhzZHzh7k6bscJjZdN1hbCsBIT9+u/UrdWOzBX1obOd0x0q9nk/lT0M6pAQksTtQixh 8RWJ1na0z7hjZ9lFQ3bcwVE+FXoVoNuhA0mHTtYFnE9njZjE0AfUUfg7dxmwaaDrZqQU +EcrUZ1z2DuGt/W1fiO6qYMBJpqn+dGVz9D8CjY+c87Tp+tpYDe7EGn5bvhrdF1QsbN0 uZeSwXus3N/aZxtzfP4J8kxQg796Oz9/mBvtSCPC7/7rxn7GnsIbQmTPNuF1YUP8JOF/ mupQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=EycYX61osoiUiTKFgHPBJxcF1OjdHnGeFDt+a8slNIw=; b=KW2J2H1lPwi8i3OZZhk3ZkVn5pnH/17zU6gu5Q6N/NwsJGzC9PiQPMOigohSi2tqkZ 7wX8r69H6Jp76adBFhDdl8DpMvOHbq3V2OUsnJA9JfG9WD7WDaT/0jtrP/f0q0jePFuK KSFa/3xlQeMhcYNrnqK1rXPW4VshAWPasfgNi8/RhXtgbI2WMV26Chk4hzxBwEuajoUG 5kNKUlHqndMzG5u3QwtIIKtdmMsQP2vhjZ+2fkFWodZWUJpm2XIyK6crzJuicKEZVXjU 0sP1nqociEE5s9F3lo+5g2DdDVD/wlu83sgD39AqGdavSs9ZV288eDjrvlh+HeFIsvRE 1eeg== X-Gm-Message-State: AGi0PuafnvvGeURvCDlHxUxozdPuweLOJgCOM8VW2TClY6/814GG1V0v Xnz1A5uyeDTISVR06/1ZTPqchuEMFEG/tQ== X-Google-Smtp-Source: APiQypJQ2fDECOnU6bV5jAI3Nvtmsv4YGdFrpXNHCKF6u9ZNfKGAxI4sOq2WgXkigh9o1lQcopcT4w== X-Received: by 2002:a1c:e903:: with SMTP id q3mr30634884wmc.76.1589204082008; Mon, 11 May 2020 06:34:42 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 27/34] target/arm/kvm: Inline set_feature() calls Date: Mon, 11 May 2020 14:33:58 +0100 Message-Id: <20200511133405.5275-28-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200511133405.5275-1-peter.maydell@linaro.org> References: <20200511133405.5275-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x335.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 We want to move the inlined declarations of set_feature() from cpu*.c to cpu.h. To avoid clashing with the KVM declarations, inline the few KVM calls. Suggested-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20200504172448.9402-2-philmd@redhat.com Signed-off-by: Peter Maydell --- target/arm/kvm32.c | 13 ++++--------- target/arm/kvm64.c | 22 ++++++---------------- 2 files changed, 10 insertions(+), 25 deletions(-) diff --git a/target/arm/kvm32.c b/target/arm/kvm32.c index f271181ab8e..7b3a19e9aef 100644 --- a/target/arm/kvm32.c +++ b/target/arm/kvm32.c @@ -22,11 +22,6 @@ #include "internals.h" #include "qemu/log.h" =20 -static inline void set_feature(uint64_t *features, int feature) -{ - *features |=3D 1ULL << feature; -} - static int read_sys_reg32(int fd, uint32_t *pret, uint64_t id) { struct kvm_one_reg idreg =3D { .id =3D id, .addr =3D (uintptr_t)pret }; @@ -146,14 +141,14 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures= *ahcf) * timers; this in turn implies most of the other feature * bits, but a few must be tested. */ - set_feature(&features, ARM_FEATURE_V7VE); - set_feature(&features, ARM_FEATURE_GENERIC_TIMER); + features |=3D 1ULL << ARM_FEATURE_V7VE; + features |=3D 1ULL << ARM_FEATURE_GENERIC_TIMER; =20 if (extract32(id_pfr0, 12, 4) =3D=3D 1) { - set_feature(&features, ARM_FEATURE_THUMB2EE); + features |=3D 1ULL << ARM_FEATURE_THUMB2EE; } if (extract32(ahcf->isar.mvfr1, 12, 4) =3D=3D 1) { - set_feature(&features, ARM_FEATURE_NEON); + features |=3D 1ULL << ARM_FEATURE_NEON; } =20 ahcf->features =3D features; diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index be5b31c2b0f..cd8ab6b8aed 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -447,16 +447,6 @@ void kvm_arm_pmu_set_irq(CPUState *cs, int irq) } } =20 -static inline void set_feature(uint64_t *features, int feature) -{ - *features |=3D 1ULL << feature; -} - -static inline void unset_feature(uint64_t *features, int feature) -{ - *features &=3D ~(1ULL << feature); -} - static int read_sys_reg32(int fd, uint32_t *pret, uint64_t id) { uint64_t ret; @@ -648,11 +638,11 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures= *ahcf) * with VFPv4+Neon; this in turn implies most of the other * feature bits. */ - set_feature(&features, ARM_FEATURE_V8); - set_feature(&features, ARM_FEATURE_NEON); - set_feature(&features, ARM_FEATURE_AARCH64); - set_feature(&features, ARM_FEATURE_PMU); - set_feature(&features, ARM_FEATURE_GENERIC_TIMER); + features |=3D 1ULL << ARM_FEATURE_V8; + features |=3D 1ULL << ARM_FEATURE_NEON; + features |=3D 1ULL << ARM_FEATURE_AARCH64; + features |=3D 1ULL << ARM_FEATURE_PMU; + features |=3D 1ULL << ARM_FEATURE_GENERIC_TIMER; =20 ahcf->features =3D features; =20 @@ -802,7 +792,7 @@ int kvm_arch_init_vcpu(CPUState *cs) if (cpu->has_pmu) { cpu->kvm_init_features[0] |=3D 1 << KVM_ARM_VCPU_PMU_V3; } else { - unset_feature(&env->features, ARM_FEATURE_PMU); + env->features &=3D ~(1ULL << ARM_FEATURE_PMU); } if (cpu_isar_feature(aa64_sve, cpu)) { assert(kvm_arm_sve_supported(cs)); --=20 2.20.1