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[174.21.149.226]) by smtp.gmail.com with ESMTPSA id u9sm2421775pfn.197.2020.05.08.11.26.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2020 11:26:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NsnJVOaPLwH5XsOssCR1XTL/4FrFEQFISOVbUenMYyk=; b=DvRDGDzpTAD4PPesue8Le9rXSDC0dfRdEUdfkQc7ITnRsXuK2QpbNd1g0vhChvI+yC pwcx3M3I84GVQFD6KaSGSOdHljZFGGcACMBWB5/01pzQJJGYMdxSaPcmNQGoCRTRraIE x5ZfLkucPrF7R9tX8Ex2K8ZWaWvSvtO3mytgXX2SmzqJpMh6J9T3St0qUsbCecmM5sF6 Fisxtica996Ru8v4uhIWzfc1WKtxVsLihpVwtX5eoprsVpI8nmgJWmfdKmkelPElZyQF ymcK73v7nKFJLFUZsq/jTOMo/X3gwv20zctCKfE3YOhxWRKVmE5HK7PmcXLtGexOoBtK KUgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NsnJVOaPLwH5XsOssCR1XTL/4FrFEQFISOVbUenMYyk=; b=MYy8GsBg4XIYgMvfH1bW5HYsGbyzNVHKqlzJpcxm6eZ4+1lMpYGqzYcXmsTaxzc+5V Lf+hEbyi32g411T29N7XEXXwem509/VOZHshE2jmTOF4mpxnea0RPHrN7OACH7BOh2Qc WWG2Xw6Un9hsrg5wLU6x67My9a8oSRXskFcdH7Of/cW9PJNsZpw8XUV1zroI/vsYS+Uq 4LdxtFRdiGBRTCKW3weSvpb4ovkG0fE518hxwfADysvRar/GID991/nZvVme/2WZVxVa 8oQMZvwybt04Gsn9FjKy3vudcxRsZvWpH5NmrIY7hj0QJt00Ib1+ahry3TqtR58wPcQE NhDQ== X-Gm-Message-State: AGi0Pub2LTDu85ohEfm/Nl02FyhL3HvFS8qNdnJi3a9MQk0BnQWH2dXr Zi5fWRP9rBERgN3tS0z9PnIjegDCa9I= X-Google-Smtp-Source: APiQypL0M2/1dBArShNDg77kTZcY/EtzYORYy2L6Iwy3tzQOSxpfd7vpCYHbeI1J6VL4nfiam/uQLA== X-Received: by 2002:a17:90a:a414:: with SMTP id y20mr6841155pjp.45.1588962385219; Fri, 08 May 2020 11:26:25 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 05/19] tcg: Use tcg_constant_{i32, i64} with tcg int expanders Date: Fri, 8 May 2020 11:26:02 -0700 Message-Id: <20200508182616.18318-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200508182616.18318-1-richard.henderson@linaro.org> References: <20200508182616.18318-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102e.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- include/tcg/tcg-op.h | 13 +-- tcg/tcg-op.c | 216 ++++++++++++++++++++----------------------- 2 files changed, 100 insertions(+), 129 deletions(-) diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h index 5abf17fecc..b4fba35e87 100644 --- a/include/tcg/tcg-op.h +++ b/include/tcg/tcg-op.h @@ -271,6 +271,7 @@ void tcg_gen_mb(TCGBar); =20 /* 32 bit ops */ =20 +void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg); void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2); void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2); void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2); @@ -349,11 +350,6 @@ static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_= i32 arg) } } =20 -static inline void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg) -{ - tcg_gen_op2i_i32(INDEX_op_movi_i32, ret, arg); -} - static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset) { @@ -467,6 +463,7 @@ static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i= 32 arg) =20 /* 64 bit ops */ =20 +void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg); void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2); void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2); void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2); @@ -550,11 +547,6 @@ static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_= i64 arg) } } =20 -static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg) -{ - tcg_gen_op2i_i64(INDEX_op_movi_i64, ret, arg); -} - static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset) { @@ -698,7 +690,6 @@ static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i= 64 arg1, TCGv_i64 arg2) =20 void tcg_gen_discard_i64(TCGv_i64 arg); void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg); -void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg); void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset); void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset); void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset= ); diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index e60b74fb82..202d8057c5 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -104,15 +104,18 @@ void tcg_gen_mb(TCGBar mb_type) =20 /* 32 bit ops */ =20 +void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg) +{ + tcg_gen_mov_i32(ret, tcg_constant_i32(arg)); +} + void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2) { /* some cases can be optimized here */ if (arg2 =3D=3D 0) { tcg_gen_mov_i32(ret, arg1); } else { - TCGv_i32 t0 =3D tcg_const_i32(arg2); - tcg_gen_add_i32(ret, arg1, t0); - tcg_temp_free_i32(t0); + tcg_gen_add_i32(ret, arg1, tcg_constant_i32(arg2)); } } =20 @@ -122,9 +125,7 @@ void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv= _i32 arg2) /* Don't recurse with tcg_gen_neg_i32. */ tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg2); } else { - TCGv_i32 t0 =3D tcg_const_i32(arg1); - tcg_gen_sub_i32(ret, t0, arg2); - tcg_temp_free_i32(t0); + tcg_gen_sub_i32(ret, tcg_constant_i32(arg1), arg2); } } =20 @@ -134,15 +135,12 @@ void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, in= t32_t arg2) if (arg2 =3D=3D 0) { tcg_gen_mov_i32(ret, arg1); } else { - TCGv_i32 t0 =3D tcg_const_i32(arg2); - tcg_gen_sub_i32(ret, arg1, t0); - tcg_temp_free_i32(t0); + tcg_gen_sub_i32(ret, arg1, tcg_constant_i32(arg2)); } } =20 void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2) { - TCGv_i32 t0; /* Some cases can be optimized here. */ switch (arg2) { case 0: @@ -165,9 +163,8 @@ void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int3= 2_t arg2) } break; } - t0 =3D tcg_const_i32(arg2); - tcg_gen_and_i32(ret, arg1, t0); - tcg_temp_free_i32(t0); + + tcg_gen_and_i32(ret, arg1, tcg_constant_i32(arg2)); } =20 void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2) @@ -178,9 +175,7 @@ void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32= _t arg2) } else if (arg2 =3D=3D 0) { tcg_gen_mov_i32(ret, arg1); } else { - TCGv_i32 t0 =3D tcg_const_i32(arg2); - tcg_gen_or_i32(ret, arg1, t0); - tcg_temp_free_i32(t0); + tcg_gen_or_i32(ret, arg1, tcg_constant_i32(arg2)); } } =20 @@ -193,9 +188,7 @@ void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int3= 2_t arg2) /* Don't recurse with tcg_gen_not_i32. */ tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg1); } else { - TCGv_i32 t0 =3D tcg_const_i32(arg2); - tcg_gen_xor_i32(ret, arg1, t0); - tcg_temp_free_i32(t0); + tcg_gen_xor_i32(ret, arg1, tcg_constant_i32(arg2)); } } =20 @@ -205,9 +198,7 @@ void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int3= 2_t arg2) if (arg2 =3D=3D 0) { tcg_gen_mov_i32(ret, arg1); } else { - TCGv_i32 t0 =3D tcg_const_i32(arg2); - tcg_gen_shl_i32(ret, arg1, t0); - tcg_temp_free_i32(t0); + tcg_gen_shl_i32(ret, arg1, tcg_constant_i32(arg2)); } } =20 @@ -217,9 +208,7 @@ void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int3= 2_t arg2) if (arg2 =3D=3D 0) { tcg_gen_mov_i32(ret, arg1); } else { - TCGv_i32 t0 =3D tcg_const_i32(arg2); - tcg_gen_shr_i32(ret, arg1, t0); - tcg_temp_free_i32(t0); + tcg_gen_shr_i32(ret, arg1, tcg_constant_i32(arg2)); } } =20 @@ -229,9 +218,7 @@ void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, int3= 2_t arg2) if (arg2 =3D=3D 0) { tcg_gen_mov_i32(ret, arg1); } else { - TCGv_i32 t0 =3D tcg_const_i32(arg2); - tcg_gen_sar_i32(ret, arg1, t0); - tcg_temp_free_i32(t0); + tcg_gen_sar_i32(ret, arg1, tcg_constant_i32(arg2)); } } =20 @@ -250,9 +237,7 @@ void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, i= nt32_t arg2, TCGLabel *l) if (cond =3D=3D TCG_COND_ALWAYS) { tcg_gen_br(l); } else if (cond !=3D TCG_COND_NEVER) { - TCGv_i32 t0 =3D tcg_const_i32(arg2); - tcg_gen_brcond_i32(cond, arg1, t0, l); - tcg_temp_free_i32(t0); + tcg_gen_brcond_i32(cond, arg1, tcg_constant_i32(arg2), l); } } =20 @@ -271,9 +256,7 @@ void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret, void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2) { - TCGv_i32 t0 =3D tcg_const_i32(arg2); - tcg_gen_setcond_i32(cond, ret, arg1, t0); - tcg_temp_free_i32(t0); + tcg_gen_setcond_i32(cond, ret, arg1, tcg_constant_i32(arg2)); } =20 void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2) @@ -283,9 +266,7 @@ void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int3= 2_t arg2) } else if (is_power_of_2(arg2)) { tcg_gen_shli_i32(ret, arg1, ctz32(arg2)); } else { - TCGv_i32 t0 =3D tcg_const_i32(arg2); - tcg_gen_mul_i32(ret, arg1, t0); - tcg_temp_free_i32(t0); + tcg_gen_mul_i32(ret, arg1, tcg_constant_i32(arg2)); } } =20 @@ -433,9 +414,7 @@ void tcg_gen_clz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_= i32 arg2) =20 void tcg_gen_clzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2) { - TCGv_i32 t =3D tcg_const_i32(arg2); - tcg_gen_clz_i32(ret, arg1, t); - tcg_temp_free_i32(t); + tcg_gen_clz_i32(ret, arg1, tcg_constant_i32(arg2)); } =20 void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) @@ -468,10 +447,9 @@ void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv= _i32 arg2) tcg_gen_clzi_i32(t, t, 32); tcg_gen_xori_i32(t, t, 31); } - z =3D tcg_const_i32(0); + z =3D tcg_constant_i32(0); tcg_gen_movcond_i32(TCG_COND_EQ, ret, arg1, z, arg2, t); tcg_temp_free_i32(t); - tcg_temp_free_i32(z); } else { gen_helper_ctz_i32(ret, arg1, arg2); } @@ -487,9 +465,7 @@ void tcg_gen_ctzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint= 32_t arg2) tcg_gen_ctpop_i32(ret, t); tcg_temp_free_i32(t); } else { - TCGv_i32 t =3D tcg_const_i32(arg2); - tcg_gen_ctz_i32(ret, arg1, t); - tcg_temp_free_i32(t); + tcg_gen_ctz_i32(ret, arg1, tcg_constant_i32(arg2)); } } =20 @@ -547,9 +523,7 @@ void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, int= 32_t arg2) if (arg2 =3D=3D 0) { tcg_gen_mov_i32(ret, arg1); } else if (TCG_TARGET_HAS_rot_i32) { - TCGv_i32 t0 =3D tcg_const_i32(arg2); - tcg_gen_rotl_i32(ret, arg1, t0); - tcg_temp_free_i32(t0); + tcg_gen_rotl_i32(ret, arg1, tcg_constant_i32(arg2)); } else { TCGv_i32 t0, t1; t0 =3D tcg_temp_new_i32(); @@ -653,9 +627,8 @@ void tcg_gen_deposit_z_i32(TCGv_i32 ret, TCGv_i32 arg, tcg_gen_andi_i32(ret, arg, (1u << len) - 1); } else if (TCG_TARGET_HAS_deposit_i32 && TCG_TARGET_deposit_i32_valid(ofs, len)) { - TCGv_i32 zero =3D tcg_const_i32(0); + TCGv_i32 zero =3D tcg_constant_i32(0); tcg_gen_op5ii_i32(INDEX_op_deposit_i32, ret, zero, arg, ofs, len); - tcg_temp_free_i32(zero); } else { /* To help two-operand hosts we prefer to zero-extend first, which allows ARG to stay live. */ @@ -1052,7 +1025,7 @@ void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg) } else { TCGv_i32 t0 =3D tcg_temp_new_i32(); TCGv_i32 t1 =3D tcg_temp_new_i32(); - TCGv_i32 t2 =3D tcg_const_i32(0x00ff00ff); + TCGv_i32 t2 =3D tcg_constant_i32(0x00ff00ff); =20 /* arg =3D abcd */ tcg_gen_shri_i32(t0, arg, 8); /* t0 =3D .abc */ @@ -1067,7 +1040,6 @@ void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg) =20 tcg_temp_free_i32(t0); tcg_temp_free_i32(t1); - tcg_temp_free_i32(t2); } } =20 @@ -1237,6 +1209,14 @@ void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TC= Gv_i64 arg2) tcg_temp_free_i64(t0); tcg_temp_free_i32(t1); } + +#else + +void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg) +{ + tcg_gen_mov_i64(ret, tcg_constant_i64(arg)); +} + #endif /* TCG_TARGET_REG_SIZE =3D=3D 32 */ =20 void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) @@ -1244,10 +1224,12 @@ void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, = int64_t arg2) /* some cases can be optimized here */ if (arg2 =3D=3D 0) { tcg_gen_mov_i64(ret, arg1); + } else if (TCG_TARGET_REG_BITS =3D=3D 64) { + tcg_gen_add_i64(ret, arg1, tcg_constant_i64(arg2)); } else { - TCGv_i64 t0 =3D tcg_const_i64(arg2); - tcg_gen_add_i64(ret, arg1, t0); - tcg_temp_free_i64(t0); + tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), + TCGV_LOW(arg1), TCGV_HIGH(arg1), + tcg_constant_i32(arg2), tcg_constant_i32(arg2 >> = 32)); } } =20 @@ -1256,10 +1238,12 @@ void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, = TCGv_i64 arg2) if (arg1 =3D=3D 0 && TCG_TARGET_HAS_neg_i64) { /* Don't recurse with tcg_gen_neg_i64. */ tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg2); + } else if (TCG_TARGET_REG_BITS =3D=3D 64) { + tcg_gen_sub_i64(ret, tcg_constant_i64(arg1), arg2); } else { - TCGv_i64 t0 =3D tcg_const_i64(arg1); - tcg_gen_sub_i64(ret, t0, arg2); - tcg_temp_free_i64(t0); + tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), + tcg_constant_i32(arg1), tcg_constant_i32(arg1 >> = 32), + TCGV_LOW(arg2), TCGV_HIGH(arg2)); } } =20 @@ -1268,17 +1252,17 @@ void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, = int64_t arg2) /* some cases can be optimized here */ if (arg2 =3D=3D 0) { tcg_gen_mov_i64(ret, arg1); + } else if (TCG_TARGET_REG_BITS =3D=3D 64) { + tcg_gen_sub_i64(ret, arg1, tcg_constant_i64(arg2)); } else { - TCGv_i64 t0 =3D tcg_const_i64(arg2); - tcg_gen_sub_i64(ret, arg1, t0); - tcg_temp_free_i64(t0); + tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), + TCGV_LOW(arg1), TCGV_HIGH(arg1), + tcg_constant_i32(arg2), tcg_constant_i32(arg2 >> = 32)); } } =20 void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) { - TCGv_i64 t0; - if (TCG_TARGET_REG_BITS =3D=3D 32) { tcg_gen_andi_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2); tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); @@ -1313,9 +1297,8 @@ void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, in= t64_t arg2) } break; } - t0 =3D tcg_const_i64(arg2); - tcg_gen_and_i64(ret, arg1, t0); - tcg_temp_free_i64(t0); + + tcg_gen_and_i64(ret, arg1, tcg_constant_i64(arg2)); } =20 void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) @@ -1331,9 +1314,7 @@ void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int= 64_t arg2) } else if (arg2 =3D=3D 0) { tcg_gen_mov_i64(ret, arg1); } else { - TCGv_i64 t0 =3D tcg_const_i64(arg2); - tcg_gen_or_i64(ret, arg1, t0); - tcg_temp_free_i64(t0); + tcg_gen_or_i64(ret, arg1, tcg_constant_i64(arg2)); } } =20 @@ -1351,9 +1332,7 @@ void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, in= t64_t arg2) /* Don't recurse with tcg_gen_not_i64. */ tcg_gen_op2_i64(INDEX_op_not_i64, ret, arg1); } else { - TCGv_i64 t0 =3D tcg_const_i64(arg2); - tcg_gen_xor_i64(ret, arg1, t0); - tcg_temp_free_i64(t0); + tcg_gen_xor_i64(ret, arg1, tcg_constant_i64(arg2)); } } =20 @@ -1415,9 +1394,7 @@ void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, in= t64_t arg2) } else if (arg2 =3D=3D 0) { tcg_gen_mov_i64(ret, arg1); } else { - TCGv_i64 t0 =3D tcg_const_i64(arg2); - tcg_gen_shl_i64(ret, arg1, t0); - tcg_temp_free_i64(t0); + tcg_gen_shl_i64(ret, arg1, tcg_constant_i64(arg2)); } } =20 @@ -1429,9 +1406,7 @@ void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, in= t64_t arg2) } else if (arg2 =3D=3D 0) { tcg_gen_mov_i64(ret, arg1); } else { - TCGv_i64 t0 =3D tcg_const_i64(arg2); - tcg_gen_shr_i64(ret, arg1, t0); - tcg_temp_free_i64(t0); + tcg_gen_shr_i64(ret, arg1, tcg_constant_i64(arg2)); } } =20 @@ -1443,9 +1418,7 @@ void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, in= t64_t arg2) } else if (arg2 =3D=3D 0) { tcg_gen_mov_i64(ret, arg1); } else { - TCGv_i64 t0 =3D tcg_const_i64(arg2); - tcg_gen_sar_i64(ret, arg1, t0); - tcg_temp_free_i64(t0); + tcg_gen_sar_i64(ret, arg1, tcg_constant_i64(arg2)); } } =20 @@ -1468,12 +1441,17 @@ void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1= , TCGv_i64 arg2, TCGLabel *l) =20 void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLab= el *l) { - if (cond =3D=3D TCG_COND_ALWAYS) { + if (TCG_TARGET_REG_BITS =3D=3D 64) { + tcg_gen_brcond_i64(cond, arg1, tcg_constant_i64(arg2), l); + } else if (cond =3D=3D TCG_COND_ALWAYS) { tcg_gen_br(l); } else if (cond !=3D TCG_COND_NEVER) { - TCGv_i64 t0 =3D tcg_const_i64(arg2); - tcg_gen_brcond_i64(cond, arg1, t0, l); - tcg_temp_free_i64(t0); + l->refs++; + tcg_gen_op6ii_i32(INDEX_op_brcond2_i32, + TCGV_LOW(arg1), TCGV_HIGH(arg1), + tcg_constant_i32(arg2), + tcg_constant_i32(arg2 >> 32), + cond, label_arg(l)); } } =20 @@ -1499,9 +1477,19 @@ void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret, void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) { - TCGv_i64 t0 =3D tcg_const_i64(arg2); - tcg_gen_setcond_i64(cond, ret, arg1, t0); - tcg_temp_free_i64(t0); + if (TCG_TARGET_REG_BITS =3D=3D 64) { + tcg_gen_setcond_i64(cond, ret, arg1, tcg_constant_i64(arg2)); + } else if (cond =3D=3D TCG_COND_ALWAYS) { + tcg_gen_movi_i64(ret, 1); + } else if (cond =3D=3D TCG_COND_NEVER) { + tcg_gen_movi_i64(ret, 0); + } else { + tcg_gen_op6i_i32(INDEX_op_setcond2_i32, TCGV_LOW(ret), + TCGV_LOW(arg1), TCGV_HIGH(arg1), + tcg_constant_i32(arg2), + tcg_constant_i32(arg2 >> 32), cond); + tcg_gen_movi_i32(TCGV_HIGH(ret), 0); + } } =20 void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) @@ -1690,7 +1678,7 @@ void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg) } else { TCGv_i64 t0 =3D tcg_temp_new_i64(); TCGv_i64 t1 =3D tcg_temp_new_i64(); - TCGv_i64 t2 =3D tcg_const_i64(0x00ff00ff); + TCGv_i64 t2 =3D tcg_constant_i64(0x00ff00ff); =20 /* arg =3D ....abcd */ tcg_gen_shri_i64(t0, arg, 8); /* t0 =3D .....abc */ @@ -1706,7 +1694,6 @@ void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg) =20 tcg_temp_free_i64(t0); tcg_temp_free_i64(t1); - tcg_temp_free_i64(t2); } } =20 @@ -1850,16 +1837,16 @@ void tcg_gen_clzi_i64(TCGv_i64 ret, TCGv_i64 arg1, = uint64_t arg2) if (TCG_TARGET_REG_BITS =3D=3D 32 && TCG_TARGET_HAS_clz_i32 && arg2 <=3D 0xffffffffu) { - TCGv_i32 t =3D tcg_const_i32((uint32_t)arg2 - 32); - tcg_gen_clz_i32(t, TCGV_LOW(arg1), t); + TCGv_i32 t =3D tcg_temp_new_i32(); + tcg_gen_clzi_i32(t, TCGV_LOW(arg1), arg2 - 32); tcg_gen_addi_i32(t, t, 32); tcg_gen_clz_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), t); tcg_gen_movi_i32(TCGV_HIGH(ret), 0); tcg_temp_free_i32(t); } else { - TCGv_i64 t =3D tcg_const_i64(arg2); - tcg_gen_clz_i64(ret, arg1, t); - tcg_temp_free_i64(t); + TCGv_i64 t0 =3D tcg_const_i64(arg2); + tcg_gen_clz_i64(ret, arg1, t0); + tcg_temp_free_i64(t0); } } =20 @@ -1881,7 +1868,7 @@ void tcg_gen_ctz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCG= v_i64 arg2) tcg_gen_clzi_i64(t, t, 64); tcg_gen_xori_i64(t, t, 63); } - z =3D tcg_const_i64(0); + z =3D tcg_constant_i64(0); tcg_gen_movcond_i64(TCG_COND_EQ, ret, arg1, z, arg2, t); tcg_temp_free_i64(t); tcg_temp_free_i64(z); @@ -1895,8 +1882,8 @@ void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, ui= nt64_t arg2) if (TCG_TARGET_REG_BITS =3D=3D 32 && TCG_TARGET_HAS_ctz_i32 && arg2 <=3D 0xffffffffu) { - TCGv_i32 t32 =3D tcg_const_i32((uint32_t)arg2 - 32); - tcg_gen_ctz_i32(t32, TCGV_HIGH(arg1), t32); + TCGv_i32 t32 =3D tcg_temp_new_i32(); + tcg_gen_ctzi_i32(t32, TCGV_HIGH(arg1), arg2 - 32); tcg_gen_addi_i32(t32, t32, 32); tcg_gen_ctz_i32(TCGV_LOW(ret), TCGV_LOW(arg1), t32); tcg_gen_movi_i32(TCGV_HIGH(ret), 0); @@ -1911,9 +1898,9 @@ void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, ui= nt64_t arg2) tcg_gen_ctpop_i64(ret, t); tcg_temp_free_i64(t); } else { - TCGv_i64 t64 =3D tcg_const_i64(arg2); - tcg_gen_ctz_i64(ret, arg1, t64); - tcg_temp_free_i64(t64); + TCGv_i64 t0 =3D tcg_const_i64(arg2); + tcg_gen_ctz_i64(ret, arg1, t0); + tcg_temp_free_i64(t0); } } =20 @@ -1969,9 +1956,7 @@ void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, i= nt64_t arg2) if (arg2 =3D=3D 0) { tcg_gen_mov_i64(ret, arg1); } else if (TCG_TARGET_HAS_rot_i64) { - TCGv_i64 t0 =3D tcg_const_i64(arg2); - tcg_gen_rotl_i64(ret, arg1, t0); - tcg_temp_free_i64(t0); + tcg_gen_rotl_i64(ret, arg1, tcg_constant_i64(arg2)); } else { TCGv_i64 t0, t1; t0 =3D tcg_temp_new_i64(); @@ -2089,9 +2074,8 @@ void tcg_gen_deposit_z_i64(TCGv_i64 ret, TCGv_i64 arg, tcg_gen_andi_i64(ret, arg, (1ull << len) - 1); } else if (TCG_TARGET_HAS_deposit_i64 && TCG_TARGET_deposit_i64_valid(ofs, len)) { - TCGv_i64 zero =3D tcg_const_i64(0); + TCGv_i64 zero =3D tcg_constant_i64(0); tcg_gen_op5ii_i64(INDEX_op_deposit_i64, ret, zero, arg, ofs, len); - tcg_temp_free_i64(zero); } else { if (TCG_TARGET_REG_BITS =3D=3D 32) { if (ofs >=3D 32) { @@ -3102,9 +3086,8 @@ void tcg_gen_atomic_cmpxchg_i32(TCGv_i32 retv, TCGv a= ddr, TCGv_i32 cmpv, =20 #ifdef CONFIG_SOFTMMU { - TCGv_i32 oi =3D tcg_const_i32(make_memop_idx(memop & ~MO_SIGN,= idx)); - gen(retv, cpu_env, addr, cmpv, newv, oi); - tcg_temp_free_i32(oi); + TCGMemOpIdx oi =3D make_memop_idx(memop & ~MO_SIGN, idx); + gen(retv, cpu_env, addr, cmpv, newv, tcg_constant_i32(oi)); } #else gen(retv, cpu_env, addr, cmpv, newv); @@ -3147,9 +3130,8 @@ void tcg_gen_atomic_cmpxchg_i64(TCGv_i64 retv, TCGv a= ddr, TCGv_i64 cmpv, =20 #ifdef CONFIG_SOFTMMU { - TCGv_i32 oi =3D tcg_const_i32(make_memop_idx(memop, idx)); - gen(retv, cpu_env, addr, cmpv, newv, oi); - tcg_temp_free_i32(oi); + TCGMemOpIdx oi =3D make_memop_idx(memop, idx); + gen(retv, cpu_env, addr, cmpv, newv, tcg_constant_i32(oi)); } #else gen(retv, cpu_env, addr, cmpv, newv); @@ -3210,9 +3192,8 @@ static void do_atomic_op_i32(TCGv_i32 ret, TCGv addr,= TCGv_i32 val, =20 #ifdef CONFIG_SOFTMMU { - TCGv_i32 oi =3D tcg_const_i32(make_memop_idx(memop & ~MO_SIGN, idx= )); - gen(ret, cpu_env, addr, val, oi); - tcg_temp_free_i32(oi); + TCGMemOpIdx oi =3D make_memop_idx(memop & ~MO_SIGN, idx); + gen(ret, cpu_env, addr, val, tcg_constant_i32(oi)); } #else gen(ret, cpu_env, addr, val); @@ -3255,9 +3236,8 @@ static void do_atomic_op_i64(TCGv_i64 ret, TCGv addr,= TCGv_i64 val, =20 #ifdef CONFIG_SOFTMMU { - TCGv_i32 oi =3D tcg_const_i32(make_memop_idx(memop & ~MO_SIGN,= idx)); - gen(ret, cpu_env, addr, val, oi); - tcg_temp_free_i32(oi); + TCGMemOpIdx oi =3D make_memop_idx(memop & ~MO_SIGN, idx); + gen(ret, cpu_env, addr, val, tcg_constant_i32(oi)); } #else gen(ret, cpu_env, addr, val); --=20 2.20.1