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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id q4sm12253608wrx.9.2020.05.04.05.33.19 for <qemu-devel@nongnu.org> (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 05:33:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=M3vgvadFWkC90M8EmTrfIPMjpAv4cjLc8OSWbkOS2EQ=; b=BHaU1xmjxgoHhGCCPnt4qs4vycVBT1mZw3Fi3H2a+LvSATdoJkoETgm9cgL/mm/MfC /wKAa26QxgIEKsg9HNPnMmYfnVOntzVa1pVa/r1XA+/fjo4WK+9vI0tClvTnq1RvjD8u kN6xnOIanMxw959jJ5q0tj2JMLGZV10+WOg/1sfb458Lg4RE0faoMjyHY5rTuMbmkPLc jSDZlOdxwBG7uvNT2OaLegD6PgKWmWay3N+qJq6sp+J0BRpQVbwDouuHYk0JMydoftxY XK2fN45AsBmOUnVa0lC8RsB7PiYJEw8Mdgl3KQ+O9Cm4eS+jmY/TuCeSP7Bw4B/UJ+DV c/dw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=M3vgvadFWkC90M8EmTrfIPMjpAv4cjLc8OSWbkOS2EQ=; b=n3D+BRbbdnsaL+0JHUy9dBlMDEnI3hvA96ZspGJT5cMWW7x0EgkhaQFLqpIQYIqUlP QyeHRf4dcQCZBHEb7OBW7f2GNiE3Oktt6pKVh75kjPfEDv+BNPPWKGkf67wgXEKFop/M Xz5c6CaHc2vCNtCNSQxlPhKE0hGTBaOMqcT5bp+Q9Do6aCpRtmI9IuqSp0NUno0I2sg1 ZG63W3ME+zArjE26QuyIRUeYIO4dyAW32Wjt4mvez2AnZevPOhEMROh9AoXD7gbNE74t e5OULAy376GJeqnyRoNr7gyI7QFEYrvGlbcHDt3XMD+76HY4Lw/KcVk+H3hbUykEF6Py dPjQ== X-Gm-Message-State: AGi0PuajT3ivW5uBpCueUReB7+X/0dqabv5/WMfSOLjHAgdljYvGypS5 LudlfR1KZQFwRmTo+Is6lo4iXY/u0o2wxw== X-Google-Smtp-Source: APiQypJ6+QxeDUmEmEc+H/HLcujcTmAIyWS+fO3UmiPnh/J7oeqtautJwkHPU+RCmsMjkOVCh4PkfA== X-Received: by 2002:a7b:cf23:: with SMTP id m3mr14050982wmg.36.1588595601027; Mon, 04 May 2020 05:33:21 -0700 (PDT) From: Peter Maydell <peter.maydell@linaro.org> To: qemu-devel@nongnu.org Subject: [PULL 08/39] target/arm: Use uint64_t for midr field in CPU state struct Date: Mon, 4 May 2020 13:32:38 +0100 Message-Id: <20200504123309.3808-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200504123309.3808-1-peter.maydell@linaro.org> References: <20200504123309.3808-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x332.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+importer=patchew.org@nongnu.org> X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org> MIDR_EL1 is a 64-bit system register with the top 32-bit being RES0. Represent it in QEMU's ARMCPU struct with a uint64_t, not a uint32_t. This fixes an error when compiling with -Werror=3Dconversion because we were manipulating the register value using a local uint64_t variable: target/arm/cpu64.c: In function =E2=80=98aarch64_max_initfn=E2=80=99: target/arm/cpu64.c:628:21: error: conversion from =E2=80=98uint64_t=E2=80= =99 {aka =E2=80=98long unsigned int=E2=80=99} to =E2=80=98uint32_t=E2=80=99= {aka =E2=80=98unsigned int=E2=80=99} may change value [-Werror=3Dconversio= n] 628 | cpu->midr =3D t; | ^ and future-proofs us against a possible future architecture change using some of the top 32 bits. Suggested-by: Laurent Desnogues <laurent.desnogues@gmail.com> Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org> Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com> Message-id: 20200428172634.29707-1-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/arm/cpu.h | 2 +- target/arm/cpu.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 9aae324d0f6..8608da6b6fc 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -894,7 +894,7 @@ struct ARMCPU { uint64_t id_aa64dfr0; uint64_t id_aa64dfr1; } isar; - uint32_t midr; + uint64_t midr; uint32_t revidr; uint32_t reset_fpsid; uint32_t ctr; diff --git a/target/arm/cpu.c b/target/arm/cpu.c index f588344df83..5d64adfe76e 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2755,7 +2755,7 @@ static const ARMCPUInfo arm_cpus[] =3D { static Property arm_cpu_properties[] =3D { DEFINE_PROP_BOOL("start-powered-off", ARMCPU, start_powered_off, false= ), DEFINE_PROP_UINT32("psci-conduit", ARMCPU, psci_conduit, 0), - DEFINE_PROP_UINT32("midr", ARMCPU, midr, 0), + DEFINE_PROP_UINT64("midr", ARMCPU, midr, 0), DEFINE_PROP_UINT64("mp-affinity", ARMCPU, mp_affinity, ARM64_AFFINITY_INVALID), DEFINE_PROP_INT32("node-id", ARMCPU, node_id, CPU_UNSET_NUMA_NODE_ID), --=20 2.20.1