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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 28/39] target/arm: Convert V[US]DOT (scalar) to decodetree
Date: Mon, 4 May 2020 13:32:58 +0100
Message-Id: <20200504123309.3808-29-peter.maydell@linaro.org>
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Convert the V[US]DOT (scalar) insns in the 2reg-scalar-ext group
to decodetree.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200430181003.21682-10-peter.maydell@linaro.org
---
target/arm/neon-shared.decode | 3 +++
target/arm/translate-neon.inc.c | 35 +++++++++++++++++++++++++++++++++
target/arm/translate.c | 13 +-----------
3 files changed, 39 insertions(+), 12 deletions(-)
diff --git a/target/arm/neon-shared.decode b/target/arm/neon-shared.decode
index c11d755ed14..63a46c63c07 100644
--- a/target/arm/neon-shared.decode
+++ b/target/arm/neon-shared.decode
@@ -54,3 +54,6 @@ VCMLA_scalar 1111 1110 0 . rot:2 .... .... 1000 . q:1 i=
ndex:1 0 vm:4 \
vn=3D%vn_dp vd=3D%vd_dp size=3D0
VCMLA_scalar 1111 1110 1 . rot:2 .... .... 1000 . q:1 . 0 .... \
vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp size=3D1 index=3D0
+
+VDOT_scalar 1111 1110 0 . 10 .... .... 1101 . q:1 index:1 u:1 rm:4 \
+ vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp
diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in=
c.c
index 92eccbf8236..7cc6ccb0697 100644
--- a/target/arm/translate-neon.inc.c
+++ b/target/arm/translate-neon.inc.c
@@ -207,3 +207,38 @@ static bool trans_VCMLA_scalar(DisasContext *s, arg_VC=
MLA_scalar *a)
tcg_temp_free_ptr(fpst);
return true;
}
+
+static bool trans_VDOT_scalar(DisasContext *s, arg_VDOT_scalar *a)
+{
+ gen_helper_gvec_3 *fn_gvec;
+ int opr_sz;
+ TCGv_ptr fpst;
+
+ if (!dc_isar_feature(aa32_dp, s)) {
+ return false;
+ }
+
+ /* UNDEF accesses to D16-D31 if they don't exist. */
+ if (!dc_isar_feature(aa32_simd_r32, s) &&
+ ((a->vd | a->vn) & 0x10)) {
+ return false;
+ }
+
+ if ((a->vd | a->vn) & a->q) {
+ return false;
+ }
+
+ if (!vfp_access_check(s)) {
+ return true;
+ }
+
+ fn_gvec =3D a->u ? gen_helper_gvec_udot_idx_b : gen_helper_gvec_sdot_i=
dx_b;
+ opr_sz =3D (1 + a->q) * 8;
+ fpst =3D get_fpstatus_ptr(1);
+ tcg_gen_gvec_3_ool(vfp_reg_offset(1, a->vd),
+ vfp_reg_offset(1, a->vn),
+ vfp_reg_offset(1, a->rm),
+ opr_sz, opr_sz, a->index, fn_gvec);
+ tcg_temp_free_ptr(fpst);
+ return true;
+}
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 4cb8c6d55b1..8574d0964f7 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -7049,18 +7049,7 @@ static int disas_neon_insn_2reg_scalar_ext(DisasCont=
ext *s, uint32_t insn)
bool is_long =3D false, q =3D extract32(insn, 6, 1);
bool ptr_is_env =3D false;
=20
- if ((insn & 0xffb00f00) =3D=3D 0xfe200d00) {
- /* V[US]DOT -- 1111 1110 0.10 .... .... 1101 .Q.U .... */
- int u =3D extract32(insn, 4, 1);
-
- if (!dc_isar_feature(aa32_dp, s)) {
- return 1;
- }
- fn_gvec =3D u ? gen_helper_gvec_udot_idx_b : gen_helper_gvec_sdot_=
idx_b;
- /* rm is just Vm, and index is M. */
- data =3D extract32(insn, 5, 1); /* index */
- rm =3D extract32(insn, 0, 4);
- } else if ((insn & 0xffa00f10) =3D=3D 0xfe000810) {
+ if ((insn & 0xffa00f10) =3D=3D 0xfe000810) {
/* VFM[AS]L -- 1111 1110 0.0S .... .... 1000 .Q.1 .... */
int is_s =3D extract32(insn, 20, 1);
int vm20 =3D extract32(insn, 0, 3);
--=20
2.20.1