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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id t8sm652421wrq.88.2020.04.30.11.10.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Apr 2020 11:10:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=br31+94xk2iuX4LX0dtLuZ7yS2HpgC0VmUDIcN1CJ/Y=; b=ji4g1vmCR8QuaWebesXMZpqQ871NJ5xgAmdcGzknTpelxOI0T+f0VfnSto87l2OsFk Sa+txs9AYmhaV+BLK/jRpfBcK/J49jGpkxr21/fAK27DPkXK4PHPUJvwvqV/f7hDQ5mg Xg601r4kdhvibKsg0rFt08GcEpZwwL4b0QMydMrEx7tClxzq+zepKSaU98ilxA3jjF4u BmgPvItDLHauhmtMaqCzpYgT9YOL2AASrB9Q58wFqA3D4sHmKLWezZ34HDMDAk29iWbe 4qm1mP9tXmeudEU6txjRB9l4IeTLPbsXWvU5sG5g2QQoOzKU0PMbDP0/iFnDmeV1DgD7 akSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=br31+94xk2iuX4LX0dtLuZ7yS2HpgC0VmUDIcN1CJ/Y=; b=KFVMerFEzJUsiiC27CW5gg4+yc25YOWY0CBvxgBLpk/5RU5HWcWhtwdrpFBCwVCSQ+ Gk60PQK1kgR7Zs+XofcVscU2nIpTLJABNVh9PpiI1k4njp7RD06OHSKpMNnACT6wOLs7 IGkeYWKl3YHOeyPcJ7RNLgkIqL6G+sPyLDV60u13jaDvnA+1ixQB0Myw4w87qZ1uHWGn KDW6h/8V0WmCNsvFRQG+lQqEecIBlbFP0rnNmyoNhXz9x9S7V+ksI/yBVqLALdpKz/gq 58wZlneU1ueJOkfj5Kq2viZgB9NF+zJmCOEgGbB4w33R14H3rsxgZHirz4yLdcDk/sqg 5s9w== X-Gm-Message-State: AGi0PuZ2fgfrDtbpzo6aDY1crz66I0EsCLcEHuk6x/VI3dRFD3LOVeTO HrWFGG+ZrbDo8SOwXfI3Xh+LSw== X-Google-Smtp-Source: APiQypIAHBvHAX4l/cXDUKGUhezLEUSttmnhNBGrndRsup+CwW9pudBikzjvU+9lxadN0cuYiLFPQw== X-Received: by 2002:a5d:61c5:: with SMTP id q5mr5388182wrv.260.1588270249194; Thu, 30 Apr 2020 11:10:49 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 34/36] target/arm: Convert Neon 3-reg-same compare insns to decodetree Date: Thu, 30 Apr 2020 19:10:01 +0100 Message-Id: <20200430181003.21682-35-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200430181003.21682-1-peter.maydell@linaro.org> References: <20200430181003.21682-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::441; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x441.google.com X-detected-operating-system: by eggs.gnu.org: Error: [-] PROGRAM ABORT : Malformed IPv6 address (bad octet value). Location : parse_addr6(), p0f-client.c:67 X-Received-From: 2a00:1450:4864:20::441 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the Neon integer 3-reg-same compare insns VCGE, VCGT, VCEQ, VACGE and VACGT to decodetree. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/translate-neon.inc.c | 5 +++++ target/arm/translate.c | 39 ++------------------------------- target/arm/neon-dp.decode | 5 +++++ 3 files changed, 12 insertions(+), 37 deletions(-) diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.in= c.c index 47879bbb6c9..29a3f7677c7 100644 --- a/target/arm/translate-neon.inc.c +++ b/target/arm/translate-neon.inc.c @@ -1389,6 +1389,11 @@ DO_3S_FP(VADD, gen_helper_vfp_adds, false) DO_3S_FP(VSUB, gen_helper_vfp_subs, false) DO_3S_FP(VABD, gen_helper_neon_abd_f32, false) DO_3S_FP(VMUL, gen_helper_vfp_muls, false) +DO_3S_FP(VCEQ, gen_helper_neon_ceq_f32, false) +DO_3S_FP(VCGE, gen_helper_neon_cge_f32, false) +DO_3S_FP(VCGT, gen_helper_neon_cgt_f32, false) +DO_3S_FP(VACGE, gen_helper_neon_acge_f32, false) +DO_3S_FP(VACGT, gen_helper_neon_acgt_f32, false) =20 static void gen_VMLA_fp_3s(TCGv_i32 vd, TCGv_i32 vn, TCGv_i32 vm, TCGv_ptr fpstatus) diff --git a/target/arm/translate.c b/target/arm/translate.c index 57343daa10a..c68dbe126eb 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -4786,6 +4786,8 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) case NEON_3R_VQDMULH_VQRDMULH: case NEON_3R_FLOAT_ARITH: case NEON_3R_FLOAT_MULTIPLY: + case NEON_3R_FLOAT_CMP: + case NEON_3R_FLOAT_ACMP: /* Already handled by decodetree */ return 1; } @@ -4800,17 +4802,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) return 1; /* VPMIN/VPMAX handled by decodetree */ } break; - case NEON_3R_FLOAT_CMP: - if (!u && size) { - /* no encoding for U=3D0 C=3D1x */ - return 1; - } - break; - case NEON_3R_FLOAT_ACMP: - if (!u) { - return 1; - } - break; case NEON_3R_FLOAT_MISC: /* VMAXNM/VMINNM in ARMv8 */ if (u && !arm_dc_feature(s, ARM_FEATURE_V8)) { @@ -4832,32 +4823,6 @@ static int disas_neon_data_insn(DisasContext *s, uin= t32_t insn) tmp =3D neon_load_reg(rn, pass); tmp2 =3D neon_load_reg(rm, pass); switch (op) { - case NEON_3R_FLOAT_CMP: - { - TCGv_ptr fpstatus =3D get_fpstatus_ptr(1); - if (!u) { - gen_helper_neon_ceq_f32(tmp, tmp, tmp2, fpstatus); - } else { - if (size =3D=3D 0) { - gen_helper_neon_cge_f32(tmp, tmp, tmp2, fpstatus); - } else { - gen_helper_neon_cgt_f32(tmp, tmp, tmp2, fpstatus); - } - } - tcg_temp_free_ptr(fpstatus); - break; - } - case NEON_3R_FLOAT_ACMP: - { - TCGv_ptr fpstatus =3D get_fpstatus_ptr(1); - if (size =3D=3D 0) { - gen_helper_neon_acge_f32(tmp, tmp, tmp2, fpstatus); - } else { - gen_helper_neon_acgt_f32(tmp, tmp, tmp2, fpstatus); - } - tcg_temp_free_ptr(fpstatus); - break; - } case NEON_3R_FLOAT_MINMAX: { TCGv_ptr fpstatus =3D get_fpstatus_ptr(1); diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode index 96866c03db4..e90c7a9afe9 100644 --- a/target/arm/neon-dp.decode +++ b/target/arm/neon-dp.decode @@ -168,5 +168,10 @@ VABD_fp_3s 1111 001 1 0 . 1 . .... .... 1101 ...= 0 .... @3same_fp VMLA_fp_3s 1111 001 0 0 . 0 . .... .... 1101 ... 1 .... @3same_fp VMLS_fp_3s 1111 001 0 0 . 1 . .... .... 1101 ... 1 .... @3same_fp VMUL_fp_3s 1111 001 1 0 . 0 . .... .... 1101 ... 1 .... @3same_fp +VCEQ_fp_3s 1111 001 0 0 . 0 . .... .... 1110 ... 0 .... @3same_fp +VCGE_fp_3s 1111 001 1 0 . 0 . .... .... 1110 ... 0 .... @3same_fp +VACGE_fp_3s 1111 001 1 0 . 0 . .... .... 1110 ... 1 .... @3same_fp +VCGT_fp_3s 1111 001 1 0 . 1 . .... .... 1110 ... 0 .... @3same_fp +VACGT_fp_3s 1111 001 1 0 . 1 . .... .... 1110 ... 1 .... @3same_fp VPMAX_fp_3s 1111 001 1 0 . 0 . .... .... 1111 ... 0 .... @3same_fp_q0 VPMIN_fp_3s 1111 001 1 0 . 1 . .... .... 1111 ... 0 .... @3same_fp_q0 --=20 2.20.1