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[174.21.149.226]) by smtp.gmail.com with ESMTPSA id j5sm243514pfh.58.2020.04.30.09.28.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Apr 2020 09:28:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fF+5wwLOen+npTtt/gQ1qVYGPHz8onoyiX2hDw1RdH0=; b=ryO0Z/9VTEorOTI4tehYyq7r8ZaTSrQ2w3uWPQT45P5LIXmk5YgmteFesGzOpBjQk3 cgVQitmw76/phs4F2d7g0zTfDuXs9vlXtbxQTIG4aMQXG4C4b0l5i770/PhbDG8ElSrK OePxduvncQOpT6cWZbsRp2A2eyDK/7Tsd2pGAS6/cvfhylNCtaVVvuYMu9p6L+iW9a4N MiJKzVKPLuaC6/N1cacmRZjPKBo5C4XSoatnCMpZPHiT+DejkcZK8vDx5mcejK+wNa8a obD7GUwS/XGv4gDPQ2PSfqpuALmA4RVP89cm6SJ0lwWhxRPTIBsUjrKbSRv0oW37AdWg stzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fF+5wwLOen+npTtt/gQ1qVYGPHz8onoyiX2hDw1RdH0=; b=YQP846ktlhUBlmKXD/PqdKpQvRYYEGp3noAKT0DC9kt7BC26olVLGF3OVSMR7XARCG 0UOW5w8ImSCa7Cbm+iJHeAr5PKxSMo29X9k99ofGWXPZulGQh/QymeSeT3qJSfUS3LJR NydGH3+NHb6faNTEpFDqujHF9B6e/4OjRRtCYWDNLF2boPBKH8GVFPALM1QCZiGBnCUo bdUN9P8CL21BXr402d69XGU3nJpPXh14wU8pvI6sByi8sl+siCk7XjXdw63aqJCpLJEu VVo8ip99JipCYJjJmHdfwxdSzOA4DbqP91BzXsJDYhxxdn0I1C02Yp6j8fWAUxFCcFNp xyAQ== X-Gm-Message-State: AGi0PuZ+3J3YKCOfN8+3a6JfRUF2+y6/cKDMv4AKbD4GDukmAM3kKzUJ RKlm1eLY2CmSUfe65uSdhMvSGfHpGCE= X-Google-Smtp-Source: APiQypImbVgNefblPbyGGJw14HzCaax2vPP3WrjcL+JPlgLA/E00voMOUe8bnSroSsOcmcha5+K1mw== X-Received: by 2002:a17:902:b7cc:: with SMTP id v12mr4478544plz.320.1588264105412; Thu, 30 Apr 2020 09:28:25 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 07/18] target/arm: Drop manual handling of set/clear_helper_retaddr Date: Thu, 30 Apr 2020 09:28:02 -0700 Message-Id: <20200430162813.17671-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200430162813.17671-1-richard.henderson@linaro.org> References: <20200430162813.17671-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::644; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x644.google.com X-detected-operating-system: by eggs.gnu.org: Error: [-] PROGRAM ABORT : Malformed IPv6 address (bad octet value). Location : parse_addr6(), p0f-client.c:67 X-Received-From: 2607:f8b0:4864:20::644 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Since we converted back to cpu_*_data_ra, we do not need to do this ourselves. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/sve_helper.c | 38 -------------------------------------- 1 file changed, 38 deletions(-) diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c index 655bc9476f..aad2c8c237 100644 --- a/target/arm/sve_helper.c +++ b/target/arm/sve_helper.c @@ -4133,12 +4133,6 @@ static intptr_t max_for_page(target_ulong base, intp= tr_t mem_off, return MIN(split, mem_max - mem_off) + mem_off; } =20 -#ifndef CONFIG_USER_ONLY -/* These are normally defined only for CONFIG_USER_ONLY in */ -static inline void set_helper_retaddr(uintptr_t ra) { } -static inline void clear_helper_retaddr(void) { } -#endif - /* * The result of tlb_vaddr_to_host for user-only is just g2h(x), * which is always non-null. Elide the useless test. @@ -4180,7 +4174,6 @@ static void sve_ld1_r(CPUARMState *env, void *vg, con= st target_ulong addr, return; } mem_off =3D reg_off >> diffsz; - set_helper_retaddr(retaddr); =20 /* * If the (remaining) load is entirely within a single page, then: @@ -4195,7 +4188,6 @@ static void sve_ld1_r(CPUARMState *env, void *vg, con= st target_ulong addr, if (test_host_page(host)) { mem_off =3D host_fn(vd, vg, host - mem_off, mem_off, mem_max); tcg_debug_assert(mem_off =3D=3D mem_max); - clear_helper_retaddr(); /* After having taken any fault, zero leading inactive element= s. */ swap_memzero(vd, reg_off); return; @@ -4246,7 +4238,6 @@ static void sve_ld1_r(CPUARMState *env, void *vg, con= st target_ulong addr, } #endif =20 - clear_helper_retaddr(); memcpy(vd, &scratch, reg_max); } =20 @@ -4306,7 +4297,6 @@ static void sve_ld2_r(CPUARMState *env, void *vg, tar= get_ulong addr, intptr_t i, oprsz =3D simd_oprsz(desc); ARMVectorReg scratch[2] =3D { }; =20 - set_helper_retaddr(ra); for (i =3D 0; i < oprsz; ) { uint16_t pg =3D *(uint16_t *)(vg + H1_2(i >> 3)); do { @@ -4318,7 +4308,6 @@ static void sve_ld2_r(CPUARMState *env, void *vg, tar= get_ulong addr, addr +=3D 2 * size; } while (i & 15); } - clear_helper_retaddr(); =20 /* Wait until all exceptions have been raised to write back. */ memcpy(&env->vfp.zregs[rd], &scratch[0], oprsz); @@ -4333,7 +4322,6 @@ static void sve_ld3_r(CPUARMState *env, void *vg, tar= get_ulong addr, intptr_t i, oprsz =3D simd_oprsz(desc); ARMVectorReg scratch[3] =3D { }; =20 - set_helper_retaddr(ra); for (i =3D 0; i < oprsz; ) { uint16_t pg =3D *(uint16_t *)(vg + H1_2(i >> 3)); do { @@ -4346,7 +4334,6 @@ static void sve_ld3_r(CPUARMState *env, void *vg, tar= get_ulong addr, addr +=3D 3 * size; } while (i & 15); } - clear_helper_retaddr(); =20 /* Wait until all exceptions have been raised to write back. */ memcpy(&env->vfp.zregs[rd], &scratch[0], oprsz); @@ -4362,7 +4349,6 @@ static void sve_ld4_r(CPUARMState *env, void *vg, tar= get_ulong addr, intptr_t i, oprsz =3D simd_oprsz(desc); ARMVectorReg scratch[4] =3D { }; =20 - set_helper_retaddr(ra); for (i =3D 0; i < oprsz; ) { uint16_t pg =3D *(uint16_t *)(vg + H1_2(i >> 3)); do { @@ -4376,7 +4362,6 @@ static void sve_ld4_r(CPUARMState *env, void *vg, tar= get_ulong addr, addr +=3D 4 * size; } while (i & 15); } - clear_helper_retaddr(); =20 /* Wait until all exceptions have been raised to write back. */ memcpy(&env->vfp.zregs[rd], &scratch[0], oprsz); @@ -4483,7 +4468,6 @@ static void sve_ldff1_r(CPUARMState *env, void *vg, c= onst target_ulong addr, return; } mem_off =3D reg_off >> diffsz; - set_helper_retaddr(retaddr); =20 /* * If the (remaining) load is entirely within a single page, then: @@ -4498,7 +4482,6 @@ static void sve_ldff1_r(CPUARMState *env, void *vg, c= onst target_ulong addr, if (test_host_page(host)) { mem_off =3D host_fn(vd, vg, host - mem_off, mem_off, mem_max); tcg_debug_assert(mem_off =3D=3D mem_max); - clear_helper_retaddr(); /* After any fault, zero any leading inactive elements. */ swap_memzero(vd, reg_off); return; @@ -4541,7 +4524,6 @@ static void sve_ldff1_r(CPUARMState *env, void *vg, c= onst target_ulong addr, } #endif =20 - clear_helper_retaddr(); record_fault(env, reg_off, reg_max); } =20 @@ -4687,7 +4669,6 @@ static void sve_st1_r(CPUARMState *env, void *vg, tar= get_ulong addr, intptr_t i, oprsz =3D simd_oprsz(desc); void *vd =3D &env->vfp.zregs[rd]; =20 - set_helper_retaddr(ra); for (i =3D 0; i < oprsz; ) { uint16_t pg =3D *(uint16_t *)(vg + H1_2(i >> 3)); do { @@ -4698,7 +4679,6 @@ static void sve_st1_r(CPUARMState *env, void *vg, tar= get_ulong addr, addr +=3D msize; } while (i & 15); } - clear_helper_retaddr(); } =20 static void sve_st2_r(CPUARMState *env, void *vg, target_ulong addr, @@ -4711,7 +4691,6 @@ static void sve_st2_r(CPUARMState *env, void *vg, tar= get_ulong addr, void *d1 =3D &env->vfp.zregs[rd]; void *d2 =3D &env->vfp.zregs[(rd + 1) & 31]; =20 - set_helper_retaddr(ra); for (i =3D 0; i < oprsz; ) { uint16_t pg =3D *(uint16_t *)(vg + H1_2(i >> 3)); do { @@ -4723,7 +4702,6 @@ static void sve_st2_r(CPUARMState *env, void *vg, tar= get_ulong addr, addr +=3D 2 * msize; } while (i & 15); } - clear_helper_retaddr(); } =20 static void sve_st3_r(CPUARMState *env, void *vg, target_ulong addr, @@ -4737,7 +4715,6 @@ static void sve_st3_r(CPUARMState *env, void *vg, tar= get_ulong addr, void *d2 =3D &env->vfp.zregs[(rd + 1) & 31]; void *d3 =3D &env->vfp.zregs[(rd + 2) & 31]; =20 - set_helper_retaddr(ra); for (i =3D 0; i < oprsz; ) { uint16_t pg =3D *(uint16_t *)(vg + H1_2(i >> 3)); do { @@ -4750,7 +4727,6 @@ static void sve_st3_r(CPUARMState *env, void *vg, tar= get_ulong addr, addr +=3D 3 * msize; } while (i & 15); } - clear_helper_retaddr(); } =20 static void sve_st4_r(CPUARMState *env, void *vg, target_ulong addr, @@ -4765,7 +4741,6 @@ static void sve_st4_r(CPUARMState *env, void *vg, tar= get_ulong addr, void *d3 =3D &env->vfp.zregs[(rd + 2) & 31]; void *d4 =3D &env->vfp.zregs[(rd + 3) & 31]; =20 - set_helper_retaddr(ra); for (i =3D 0; i < oprsz; ) { uint16_t pg =3D *(uint16_t *)(vg + H1_2(i >> 3)); do { @@ -4779,7 +4754,6 @@ static void sve_st4_r(CPUARMState *env, void *vg, tar= get_ulong addr, addr +=3D 4 * msize; } while (i & 15); } - clear_helper_retaddr(); } =20 #define DO_STN_1(N, NAME, ESIZE) \ @@ -4875,7 +4849,6 @@ static void sve_ld1_zs(CPUARMState *env, void *vd, vo= id *vg, void *vm, intptr_t i, oprsz =3D simd_oprsz(desc); ARMVectorReg scratch =3D { }; =20 - set_helper_retaddr(ra); for (i =3D 0; i < oprsz; ) { uint16_t pg =3D *(uint16_t *)(vg + H1_2(i >> 3)); do { @@ -4886,7 +4859,6 @@ static void sve_ld1_zs(CPUARMState *env, void *vd, vo= id *vg, void *vm, i +=3D 4, pg >>=3D 4; } while (i & 15); } - clear_helper_retaddr(); =20 /* Wait until all exceptions have been raised to write back. */ memcpy(vd, &scratch, oprsz); @@ -4900,7 +4872,6 @@ static void sve_ld1_zd(CPUARMState *env, void *vd, vo= id *vg, void *vm, intptr_t i, oprsz =3D simd_oprsz(desc) / 8; ARMVectorReg scratch =3D { }; =20 - set_helper_retaddr(ra); for (i =3D 0; i < oprsz; i++) { uint8_t pg =3D *(uint8_t *)(vg + H1(i)); if (likely(pg & 1)) { @@ -4908,7 +4879,6 @@ static void sve_ld1_zd(CPUARMState *env, void *vd, vo= id *vg, void *vm, tlb_fn(env, &scratch, i * 8, base + (off << scale), ra); } } - clear_helper_retaddr(); =20 /* Wait until all exceptions have been raised to write back. */ memcpy(vd, &scratch, oprsz * 8); @@ -5080,13 +5050,11 @@ static inline void sve_ldff1_zs(CPUARMState *env, v= oid *vd, void *vg, void *vm, reg_off =3D find_next_active(vg, 0, reg_max, MO_32); if (likely(reg_off < reg_max)) { /* Perform one normal read, which will fault or not. */ - set_helper_retaddr(ra); addr =3D off_fn(vm, reg_off); addr =3D base + (addr << scale); tlb_fn(env, vd, reg_off, addr, ra); =20 /* The rest of the reads will be non-faulting. */ - clear_helper_retaddr(); } =20 /* After any fault, zero the leading predicated false elements. */ @@ -5122,13 +5090,11 @@ static inline void sve_ldff1_zd(CPUARMState *env, v= oid *vd, void *vg, void *vm, reg_off =3D find_next_active(vg, 0, reg_max, MO_64); if (likely(reg_off < reg_max)) { /* Perform one normal read, which will fault or not. */ - set_helper_retaddr(ra); addr =3D off_fn(vm, reg_off); addr =3D base + (addr << scale); tlb_fn(env, vd, reg_off, addr, ra); =20 /* The rest of the reads will be non-faulting. */ - clear_helper_retaddr(); } =20 /* After any fault, zero the leading predicated false elements. */ @@ -5240,7 +5206,6 @@ static void sve_st1_zs(CPUARMState *env, void *vd, vo= id *vg, void *vm, const int scale =3D extract32(desc, SIMD_DATA_SHIFT + MEMOPIDX_SHIFT, = 2); intptr_t i, oprsz =3D simd_oprsz(desc); =20 - set_helper_retaddr(ra); for (i =3D 0; i < oprsz; ) { uint16_t pg =3D *(uint16_t *)(vg + H1_2(i >> 3)); do { @@ -5251,7 +5216,6 @@ static void sve_st1_zs(CPUARMState *env, void *vd, vo= id *vg, void *vm, i +=3D 4, pg >>=3D 4; } while (i & 15); } - clear_helper_retaddr(); } =20 static void sve_st1_zd(CPUARMState *env, void *vd, void *vg, void *vm, @@ -5261,7 +5225,6 @@ static void sve_st1_zd(CPUARMState *env, void *vd, vo= id *vg, void *vm, const int scale =3D extract32(desc, SIMD_DATA_SHIFT + MEMOPIDX_SHIFT, = 2); intptr_t i, oprsz =3D simd_oprsz(desc) / 8; =20 - set_helper_retaddr(ra); for (i =3D 0; i < oprsz; i++) { uint8_t pg =3D *(uint8_t *)(vg + H1(i)); if (likely(pg & 1)) { @@ -5269,7 +5232,6 @@ static void sve_st1_zd(CPUARMState *env, void *vd, vo= id *vg, void *vm, tlb_fn(env, vd, i * 8, base + (off << scale), ra); } } - clear_helper_retaddr(); } =20 #define DO_ST1_ZPZ_S(MEM, OFS) \ --=20 2.20.1