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[174.21.149.226]) by smtp.gmail.com with ESMTPSA id j5sm243514pfh.58.2020.04.30.09.28.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Apr 2020 09:28:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=4tSyrjuk3Om51Zcagt3t6yh4FkYKfOOT3yWLv6tJ2Vs=; b=lRytBLdHoJENE73egrty/xfy33fiJkqQRxA1qlwzv4pwf/ATDMFu2uxhF7hTQqkEv6 rToeiJGDVgWuRjFteCaHjFpqQWj4ep6MTy0iaZlKrt1woLJOSoPrg1kFU0KYH5j6BZxv O3p+V6qXVPD6MwVxQXV8iv1GIT5+4Vst/bE85XiO+qVEPZ3VPmmAnuEI/rkrO3lCFEDy sXgamO25mmnOfWvU7sFZEDFS1BTaL0CROXCU/qc8DOHCmSStSoka7Kgu5hoV27bjD7Um rKz4nB9x5zO/yk7fPF58Q3XduLfvaVEwF644bmub2fsCgpogvBnPelU1t/aoKKhxqUJu T0qw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4tSyrjuk3Om51Zcagt3t6yh4FkYKfOOT3yWLv6tJ2Vs=; b=rg7dRGxQv0SpF1T6QK0aiWw0QrGo6TGFzJ8Td1y2udbFIAKcMynE4SfG1ed3gJq3Kh DgcanVeYRHyAOmCcqZGmFhBeVCKQ/ltsZ8kwUAFUKWmZpWrVc2UTSvXmGWTqLghqNhRO FLpog1avUumctQRJGgGJWexj4NAZ5OPIxnYezbnZHvnSOb/7alteEIDhBe7vsGO+GcwI wLTLBNOIqw3p3IG4hC+BZaNNnfg3J1XDmsJjNNUhjtlMkPJAi1JgwsqRfcqxblSa1Nc2 iSTxY/vzvPILpEDqzUIbsGIC5wCfj5HCvX+D7CP0ttjPMZGcW7VfZbxuSfhjPo6egJWx ETJw== X-Gm-Message-State: AGi0PuZgDirN8W+E6nkPRX6YKSIg5XzJivzrF3uGa5xr16hz9duJtHNH nnOlIhd46qtfnXjH1TwwCW0i/2XZ7j0= X-Google-Smtp-Source: APiQypJHuIMjRTCKLhQ6XeKpzUAMJ5YWzqXJ5y9yJ4UIGpX8wH9zy9czFYPYAmHqz9aDXrAZXtunDg== X-Received: by 2002:a17:902:9697:: with SMTP id n23mr4482672plp.150.1588264110686; Thu, 30 Apr 2020 09:28:30 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 11/18] target/arm: Handle watchpoints in sve_ld1_r Date: Thu, 30 Apr 2020 09:28:06 -0700 Message-Id: <20200430162813.17671-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200430162813.17671-1-richard.henderson@linaro.org> References: <20200430162813.17671-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::643; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x643.google.com X-detected-operating-system: by eggs.gnu.org: Error: [-] PROGRAM ABORT : Malformed IPv6 address (bad octet value). Location : parse_addr6(), p0f-client.c:67 X-Received-From: 2607:f8b0:4864:20::643 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Handle all of the watchpoints for active elements all at once, before we've modified the vector register. This removes the TLB_WATCHPOINT bit from page[].flags, which means that we can use the normal fast path via RAM. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/sve_helper.c | 72 ++++++++++++++++++++++++++++++++++++++++- 1 file changed, 71 insertions(+), 1 deletion(-) diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c index 6bae342a17..7992a569b0 100644 --- a/target/arm/sve_helper.c +++ b/target/arm/sve_helper.c @@ -4371,6 +4371,70 @@ static bool sve_cont_ldst_pages(SVEContLdSt *info, S= VEContFault fault, return have_work; } =20 +static void sve_cont_ldst_watchpoints(SVEContLdSt *info, CPUARMState *env, + uint64_t *vg, target_ulong addr, + int esize, int msize, int wp_access, + uintptr_t retaddr) +{ +#ifndef CONFIG_USER_ONLY + intptr_t mem_off, reg_off, reg_last; + int flags0 =3D info->page[0].flags; + int flags1 =3D info->page[1].flags; + + if (likely(!((flags0 | flags1) & TLB_WATCHPOINT))) { + return; + } + + /* Indicate that watchpoints are handled. */ + info->page[0].flags =3D flags0 & ~TLB_WATCHPOINT; + info->page[1].flags =3D flags1 & ~TLB_WATCHPOINT; + + if (flags0 & TLB_WATCHPOINT) { + mem_off =3D info->mem_off_first[0]; + reg_off =3D info->reg_off_first[0]; + reg_last =3D info->reg_off_last[0]; + + while (reg_off <=3D reg_last) { + uint64_t pg =3D vg[reg_off >> 6]; + do { + if ((pg >> (reg_off & 63)) & 1) { + cpu_check_watchpoint(env_cpu(env), addr + mem_off, + msize, info->page[0].attrs, + wp_access, retaddr); + } + reg_off +=3D esize; + mem_off +=3D msize; + } while (reg_off <=3D reg_last && (reg_off & 63)); + } + } + + mem_off =3D info->mem_off_split; + if (mem_off >=3D 0) { + cpu_check_watchpoint(env_cpu(env), addr + mem_off, msize, + info->page[0].attrs, wp_access, retaddr); + } + + mem_off =3D info->mem_off_first[1]; + if ((flags1 & TLB_WATCHPOINT) && mem_off >=3D 0) { + reg_off =3D info->reg_off_first[1]; + reg_last =3D info->reg_off_last[1]; + + do { + uint64_t pg =3D vg[reg_off >> 6]; + do { + if ((pg >> (reg_off & 63)) & 1) { + cpu_check_watchpoint(env_cpu(env), addr + mem_off, + msize, info->page[1].attrs, + wp_access, retaddr); + } + reg_off +=3D esize; + mem_off +=3D msize; + } while (reg_off & 63); + } while (reg_off <=3D reg_last); + } +#endif +} + /* * The result of tlb_vaddr_to_host for user-only is just g2h(x), * which is always non-null. Elide the useless test. @@ -4412,13 +4476,19 @@ void sve_ld1_r(CPUARMState *env, uint64_t *vg, cons= t target_ulong addr, /* Probe the page(s). Exit with exception for any invalid page. */ sve_cont_ldst_pages(&info, FAULT_ALL, env, addr, MMU_DATA_LOAD, retadd= r); =20 + /* Handle watchpoints for all active elements. */ + sve_cont_ldst_watchpoints(&info, env, vg, addr, 1 << esz, 1 << msz, + BP_MEM_READ, retaddr); + + /* TODO: MTE check. */ + flags =3D info.page[0].flags | info.page[1].flags; if (unlikely(flags !=3D 0)) { #ifdef CONFIG_USER_ONLY g_assert_not_reached(); #else /* - * At least one page includes MMIO (or watchpoints). + * At least one page includes MMIO. * Any bus operation can fail with cpu_transaction_failed, * which for ARM will raise SyncExternal. Perform the load * into scratch memory to preserve register state until the end. --=20 2.20.1