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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id j22sm491518wre.84.2020.04.30.04.52.17 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Apr 2020 04:52:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=VZsHlwetQydlsAkMRlAw7EDxgaTnzCyVqrqpBTTMf/c=; b=JtVAIYRtFhqDdwotVAXgWuqjjVQWXK3S7kHnqDR9nNUI6oOBPSaWl17TG1FYklyeo/ BC0zpEKuS2H4GlutoLkbBP/be4g0db1+f6amIL3jeqng/fSm1R20siIVQqYTZaH7GZ8N cYFIn+mDOHjygCyzPa/C2Tb9rtJHi1MQJwAtHA4r5R0Jsohs0wWatfp1kIZ4R1eom2kB XULSySDN/D4PhE2IyXfLUp8VQXzHipOsQtTcCIqV+ZaMwjUDe5qURU85ZgZICO83onif jjHcgnUUHHDJIdqE43aRjaVaMx1b5DOUgHGm6Hm0ARDNGzzdBv2VUOpU7eHZmO1mVzBk DT/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=VZsHlwetQydlsAkMRlAw7EDxgaTnzCyVqrqpBTTMf/c=; b=i5v0vqOM7zYHiBmObEtKlXGo+ZPVS0ubU6gUP3IXfEvlaMukxU+RUM5vAFxSFNf7BT OsKPCarQVwQfWIX1A2iUqMikiRa5luHYhaZTUl7j+rnii+Gch0fiLfSUlbtxJT0YSUeu ob0fGs1zh0THY6LkgHBNy5AEbXzdR/gK0aclV/0aEtqdgFZfiNErSRF12SmmtgezLT7U K4ZeP50bOnd64PaecowcSBsE2BJKk1ZDBQnIuKBIktumDk9A78ZlFZLNJcfdzQ7yAmm7 evrRTWELqak0QROBLGW6MYLZ3wkDpa/ky3paDlWjR1P1COKuya2SIw2zXMXgIq/a/H5x jqAw== X-Gm-Message-State: AGi0PuZRxlUbWi6acaMIfbF7dK3padmF4JbQTMEwHyvq/DyBcdCDiI+2 WZTUrF3TKOFGw3JwewsFmSLKWX8RCe/TsQ== X-Google-Smtp-Source: APiQypJIn/2iluGTKXSAEhXjRZA47Wid20MRNxvPsEa9SI/yrqdPjO1s6MjS9c2o6MSY6YmND2VA5g== X-Received: by 2002:a7b:c0d5:: with SMTP id s21mr2569473wmh.107.1588247538758; Thu, 30 Apr 2020 04:52:18 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 31/31] hw/arm: xlnx-zcu102: Disable unsupported FDT firmware nodes Date: Thu, 30 Apr 2020 12:51:42 +0100 Message-Id: <20200430115142.13430-32-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200430115142.13430-1-peter.maydell@linaro.org> References: <20200430115142.13430-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::342; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x342.google.com X-detected-operating-system: by eggs.gnu.org: Error: [-] PROGRAM ABORT : Malformed IPv6 address (bad octet value). Location : parse_addr6(), p0f-client.c:67 X-Received-From: 2a00:1450:4864:20::342 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: "Edgar E. Iglesias" Disable unsupported FDT firmware nodes if a user passes us a DTB with nodes enabled that the machine cannot support due to lack of EL3 or EL2 support. Reviewed-by: Alistair Francis Signed-off-by: Edgar E. Iglesias Message-id: 20200423121114.4274-5-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell --- hw/arm/xlnx-zcu102.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c index 4eb117c755a..a798e228b79 100644 --- a/hw/arm/xlnx-zcu102.c +++ b/hw/arm/xlnx-zcu102.c @@ -23,6 +23,7 @@ #include "qemu/error-report.h" #include "qemu/log.h" #include "sysemu/qtest.h" +#include "sysemu/device_tree.h" =20 typedef struct XlnxZCU102 { MachineState parent_obj; @@ -68,6 +69,34 @@ static void zcu102_set_virt(Object *obj, bool value, Err= or **errp) s->virt =3D value; } =20 +static void zcu102_modify_dtb(const struct arm_boot_info *binfo, void *fdt) +{ + XlnxZCU102 *s =3D container_of(binfo, XlnxZCU102, binfo); + bool method_is_hvc; + char **node_path; + const char *r; + int prop_len; + int i; + + /* If EL3 is enabled, we keep all firmware nodes active. */ + if (!s->secure) { + node_path =3D qemu_fdt_node_path(fdt, NULL, "xlnx,zynqmp-firmware", + &error_fatal); + + for (i =3D 0; node_path && node_path[i]; i++) { + r =3D qemu_fdt_getprop(fdt, node_path[i], "method", &prop_len,= NULL); + method_is_hvc =3D r && !strcmp("hvc", r); + + /* Allow HVC based firmware if EL2 is enabled. */ + if (method_is_hvc && s->virt) { + continue; + } + qemu_fdt_setprop_string(fdt, node_path[i], "status", "disabled= "); + } + g_strfreev(node_path); + } +} + static void xlnx_zcu102_init(MachineState *machine) { XlnxZCU102 *s =3D ZCU102_MACHINE(machine); @@ -169,6 +198,7 @@ static void xlnx_zcu102_init(MachineState *machine) =20 s->binfo.ram_size =3D ram_size; s->binfo.loader_start =3D 0; + s->binfo.modify_dtb =3D zcu102_modify_dtb; arm_load_kernel(s->soc.boot_cpu_ptr, machine, &s->binfo); } =20 --=20 2.20.1