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Date: Mon, 27 Apr 2020 18:21:48 +0300 Message-Id: <20200427152148.283771-1-andrew@daynix.com> X-Mailer: git-send-email 2.24.1 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=2a00:1450:4864:20::144; envelope-from=andrew@daynix.com; helo=mail-lf1-x144.google.com X-detected-operating-system: by eggs.gnu.org: Error: [-] PROGRAM ABORT : Malformed IPv6 address (bad octet value). Location : parse_addr6(), p0f-client.c:67 X-Received-From: 2a00:1450:4864:20::144 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jasowang@redhat.com, dmitry.fleytman@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @daynix-com.20150623.gappssmtp.com) From: Andrew Melnychenko Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=3D1707441 Added ICR clearing if there is IMS bit - according to the note by section 13.3.27 of the 8257X developers manual. Signed-off-by: Andrew Melnychenko --- hw/net/e1000e_core.c | 9 +++++++++ hw/net/trace-events | 1 + 2 files changed, 10 insertions(+) diff --git a/hw/net/e1000e_core.c b/hw/net/e1000e_core.c index d5676871fa..8878b7ef00 100644 --- a/hw/net/e1000e_core.c +++ b/hw/net/e1000e_core.c @@ -2624,6 +2624,15 @@ e1000e_mac_icr_read(E1000ECore *core, int index) e1000e_clear_ims_bits(core, core->mac[IAM]); } =20 + /* + * PCIe* GbE Controllers Open Source Software Developer=E2=80=99s Manu= al + * 13.3.27 Interrupt Cause Read Register + */ + if (core->mac[ICR] & core->mac[IMS]) { + trace_e1000e_irq_icr_clear_icr_bit_ims(core->mac[ICR], core->mac[I= MS]); + core->mac[ICR] =3D 0; + } + trace_e1000e_irq_icr_read_exit(core->mac[ICR]); e1000e_update_interrupt_state(core); return ret; diff --git a/hw/net/trace-events b/hw/net/trace-events index e18f883cfd..46e40fcfa9 100644 --- a/hw/net/trace-events +++ b/hw/net/trace-events @@ -237,6 +237,7 @@ e1000e_irq_icr_read_entry(uint32_t icr) "Starting ICR r= ead. Current ICR: 0x%x" e1000e_irq_icr_read_exit(uint32_t icr) "Ending ICR read. Current ICR: 0x%x" e1000e_irq_icr_clear_zero_ims(void) "Clearing ICR on read due to zero IMS" e1000e_irq_icr_clear_iame(void) "Clearing ICR on read due to IAME" +e1000e_irq_icr_clear_icr_bit_ims(uint32_t icr, uint32_t ims) "Clearing ICR= on read due corresponding IMS bit: 0x%x & 0x%x" e1000e_irq_iam_clear_eiame(uint32_t iam, uint32_t cause) "Clearing IMS due= to EIAME, IAM: 0x%X, cause: 0x%X" e1000e_irq_icr_clear_eiac(uint32_t icr, uint32_t eiac) "Clearing ICR bits = due to EIAC, ICR: 0x%X, EIAC: 0x%X" e1000e_irq_ims_clear_set_imc(uint32_t val) "Clearing IMS bits due to IMC w= rite 0x%x" --=20 2.24.1