From nobody Tue Feb 10 19:49:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1587632832; cv=none; d=zohomail.com; s=zohoarc; b=Qd63n4ZqL3R/v1v2ZrrOWOikJe+68MfkpAqgEIJRGsXZNZr7y/3z4YTlF9g9FVl5/TVLe/MwMPNvQZwG9vde0YsH5xGuaSYSIubLYqF6dyuGPqLjQdx5tdllKpSxH4aZfNMDNT1QjNsqANh3RnIJdDF+wNY1USoGCIHYV9TIUR0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1587632832; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; bh=gQPourwy+wV4VFITxOhJ666uE3wNjxV0i241sx+iekM=; b=TZFjqrSl/U+wmvzvH4zAPAUwA2ejsEx5EdSVu8cyR/sWUifI4/tdkm9G8J+vUj+858l7r/zdfZoSvU4PuWGBAZEQYTAgeDwKbqc1BSqCbxXtZoyT4+6bbYZPJMaZdWinCUqcPSzgMbD8XgzaRHBtvgYj7s8ry8zQvefX8+AtD9k= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1587632832356446.7069457800591; Thu, 23 Apr 2020 02:07:12 -0700 (PDT) Received: from localhost ([::1]:39332 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jRXp9-0008Ev-3c for importer@patchew.org; Thu, 23 Apr 2020 05:07:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36132) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jRXjr-00010h-Hm for qemu-devel@nongnu.org; Thu, 23 Apr 2020 05:01:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.90_1) (envelope-from ) id 1jRXjb-0001DS-HX for qemu-devel@nongnu.org; Thu, 23 Apr 2020 05:01:43 -0400 Received: from xavier.telenet-ops.be ([2a02:1800:120:4::f00:14]:36680) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jRXja-0001BW-2D for qemu-devel@nongnu.org; Thu, 23 Apr 2020 05:01:26 -0400 Received: from ramsan ([IPv6:2a02:1810:ac12:ed60:89cc:efc7:85ce:4669]) by xavier.telenet-ops.be with bizsmtp id W91L2200P1RvcFS0191LFD; Thu, 23 Apr 2020 11:01:21 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan with esmtp (Exim 4.90_1) (envelope-from ) id 1jRXjU-0006k9-Al; Thu, 23 Apr 2020 11:01:20 +0200 Received: from geert by rox.of.borg with local (Exim 4.90_1) (envelope-from ) id 1jRXjU-0002vW-9V; Thu, 23 Apr 2020 11:01:20 +0200 From: Geert Uytterhoeven To: Peter Maydell , Paolo Bonzini , Alexander Graf , Linus Walleij , Bartosz Golaszewski , Magnus Damm Subject: [PATCH QEMU v2 2/5] ARM: PL061: Extract pl061_create_fdt() Date: Thu, 23 Apr 2020 11:01:15 +0200 Message-Id: <20200423090118.11199-3-geert+renesas@glider.be> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200423090118.11199-1-geert+renesas@glider.be> References: <20200423090118.11199-1-geert+renesas@glider.be> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=2a02:1800:120:4::f00:14; envelope-from=geert@linux-m68k.org; helo=xavier.telenet-ops.be X-detected-operating-system: by eggs.gnu.org: Error: [-] PROGRAM ABORT : Malformed IPv6 address (bad octet value). Location : parse_addr6(), p0f-client.c:67 X-Received-From: 2a02:1800:120:4::f00:14 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org, Geert Uytterhoeven Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Move the code to create the DT node for the PL061 GPIO controller from hw/arm/virt.c to the PL061 driver, so it can be reused. While at it, make the created node comply with the PL061 Device Tree bindings: - Use generic node name "gpio" instead of "pl061", - Add missing "#interrupt-cells" and "interrupt-controller" properties. Signed-off-by: Geert Uytterhoeven --- v2: - New. --- hw/arm/virt.c | 20 +++----------------- hw/gpio/pl061.c | 42 +++++++++++++++++++++++++++++++++++++++++ include/hw/gpio/pl061.h | 7 +++++++ 3 files changed, 52 insertions(+), 17 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 7dc96abf72cf2b9a..c88c8850fbe00bdb 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -40,6 +40,7 @@ #include "hw/arm/primecell.h" #include "hw/arm/virt.h" #include "hw/block/flash.h" +#include "hw/gpio/pl061.h" #include "hw/vfio/vfio-calxeda-xgmac.h" #include "hw/vfio/vfio-amd-xgbe.h" #include "hw/display/ramfb.h" @@ -807,30 +808,16 @@ static void virt_powerdown_req(Notifier *n, void *opa= que) =20 static void create_gpio(const VirtMachineState *vms) { - char *nodename; DeviceState *pl061_dev; hwaddr base =3D vms->memmap[VIRT_GPIO].base; hwaddr size =3D vms->memmap[VIRT_GPIO].size; int irq =3D vms->irqmap[VIRT_GPIO]; - const char compat[] =3D "arm,pl061\0arm,primecell"; =20 pl061_dev =3D sysbus_create_simple("pl061", base, qdev_get_gpio_in(vms->gic, irq)); =20 - uint32_t phandle =3D qemu_fdt_alloc_phandle(vms->fdt); - nodename =3D g_strdup_printf("/pl061@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", - 2, base, 2, size); - qemu_fdt_setprop(vms->fdt, nodename, "compatible", compat, sizeof(comp= at)); - qemu_fdt_setprop_cell(vms->fdt, nodename, "#gpio-cells", 2); - qemu_fdt_setprop(vms->fdt, nodename, "gpio-controller", NULL, 0); - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupts", - GIC_FDT_IRQ_TYPE_SPI, irq, - GIC_FDT_IRQ_FLAGS_LEVEL_HI); - qemu_fdt_setprop_cell(vms->fdt, nodename, "clocks", vms->clock_phandle= ); - qemu_fdt_setprop_string(vms->fdt, nodename, "clock-names", "apb_pclk"); - qemu_fdt_setprop_cell(vms->fdt, nodename, "phandle", phandle); + uint32_t phandle =3D pl061_create_fdt(vms->fdt, "", 2, base, size, irq, + vms->clock_phandle); =20 gpio_key_dev =3D sysbus_create_simple("gpio-key", -1, qdev_get_gpio_in(pl061_dev, 3)); @@ -846,7 +833,6 @@ static void create_gpio(const VirtMachineState *vms) KEY_POWER); qemu_fdt_setprop_cells(vms->fdt, "/gpio-keys/poweroff", "gpios", phandle, 3, 0); - g_free(nodename); } =20 static void create_virtio_devices(const VirtMachineState *vms) diff --git a/hw/gpio/pl061.c b/hw/gpio/pl061.c index e776c09e474216ef..74ba733a8a5e8ca5 100644 --- a/hw/gpio/pl061.c +++ b/hw/gpio/pl061.c @@ -9,12 +9,14 @@ */ =20 #include "qemu/osdep.h" +#include "hw/arm/fdt.h" #include "hw/gpio/pl061.h" #include "hw/irq.h" #include "hw/sysbus.h" #include "migration/vmstate.h" #include "qemu/log.h" #include "qemu/module.h" +#include "sysemu/device_tree.h" =20 //#define DEBUG_PL061 1 =20 @@ -397,3 +399,43 @@ static void pl061_register_types(void) } =20 type_init(pl061_register_types) + +/* + * pl061_create_fdt: Create a DT node for a PL061 GPIO controller + * @fdt: device tree blob + * @parent: name of the parent node + * @n_cells: value of #address-cells and #size-cells + * @base: base address of the controller's register block + * @size: size of the controller's register block + * @irq: interrupt number + * @clock: phandle of the apb-pclk clock + * + * Return value: a phandle referring to the created DT node. + * + * See the DT Binding Documentation in the Linux kernel source tree: + * Documentation/devicetree/bindings/gpio/pl061-gpio.yaml + */ +uint32_t pl061_create_fdt(void *fdt, const char *parent, unsigned int n_ce= lls, + hwaddr base, hwaddr size, int irq, uint32_t cloc= k) +{ + char *nodename =3D g_strdup_printf("%s/gpio@%" PRIx64, parent, base); + static const char compat[] =3D "arm,pl061\0arm,primecell"; + uint32_t phandle =3D qemu_fdt_alloc_phandle(fdt); + + qemu_fdt_add_subnode(fdt, nodename); + qemu_fdt_setprop_sized_cells(fdt, nodename, "reg", n_cells, base, n_ce= lls, + size); + qemu_fdt_setprop(fdt, nodename, "compatible", compat, sizeof(compat)); + qemu_fdt_setprop_cell(fdt, nodename, "#gpio-cells", 2); + qemu_fdt_setprop(fdt, nodename, "gpio-controller", NULL, 0); + qemu_fdt_setprop_cell(fdt, nodename, "#interrupt-cells", 2); + qemu_fdt_setprop(fdt, nodename, "interrupt-controller", NULL, 0); + qemu_fdt_setprop_cells(fdt, nodename, "interrupts", GIC_FDT_IRQ_TYPE_S= PI, + irq, GIC_FDT_IRQ_FLAGS_LEVEL_HI); + qemu_fdt_setprop_cell(fdt, nodename, "clocks", clock); + qemu_fdt_setprop_string(fdt, nodename, "clock-names", "apb_pclk"); + qemu_fdt_setprop_cell(fdt, nodename, "phandle", phandle); + g_free(nodename); + + return phandle; +} diff --git a/include/hw/gpio/pl061.h b/include/hw/gpio/pl061.h index 78cc40c52679dc4e..f98c6e24e0e68662 100644 --- a/include/hw/gpio/pl061.h +++ b/include/hw/gpio/pl061.h @@ -11,6 +11,13 @@ #ifndef PL061_GPIO_H #define PL061_GPIO_H =20 +#include + +#include "exec/hwaddr.h" + #define TYPE_PL061 "pl061" =20 +uint32_t pl061_create_fdt(void *fdt, const char *parent, unsigned int n_ce= lls, + hwaddr addr, hwaddr size, int irq, uint32_t cloc= k); + #endif /* PL061_GPIO_H */ --=20 2.17.1