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[174.21.149.226]) by smtp.gmail.com with ESMTPSA id f99sm5636467pjg.22.2020.04.18.09.28.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Apr 2020 09:28:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:mime-version :content-transfer-encoding; bh=NursXVv/HRRUgUycsc5QQiTW037ba/6j60CDRbihF7Q=; b=XT2xetT/y+v6QI8mKKRFQiQ7k1Vjojb/Fbp1dCu4CPqRv1PTAZ71ihJyLwKxyaAitO 42xV6uyOSA9IcamrCn4ftPkmshoksp9xVcEAiHD3iMFBW5160N5XjfcLVA3A4gMg21eq c91zS9g4nSocJ/8uIvoP4Q0oNntDAjEhf5opPRSzbPPKMKsMM5yCYk8K+SnE87+s50Jd CkauYoJGbEkeD45HklZoOAFQp5qd/q/B2JYzIt567vESSNU0XXhMxjg0HIjUM7OIf3eM 1ulPQsQ+p/fbnBR5ZVil2q/MXG3yzTz/Facz6WgU/E3f82Y74D+xRsd8E5xQDuGRyY7x kaxg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:mime-version :content-transfer-encoding; bh=NursXVv/HRRUgUycsc5QQiTW037ba/6j60CDRbihF7Q=; b=qMIL8htKQQsSEkS/1T+MLBADXe+9QuYfz2WfHaI1jth+8nUfT5ZNCL8z96RBWBIclB wYhRlsxT66u5ZQuH8qpnn8AFwF+uNDlWQYhdT1QeAToG0i2jlMhFaCfuKhoeHNMkEzJs qtfhsBR0Yieep8YzP+Jk7vVeiY9FNgen7xUP8kBXyDRtnTSuVAC1/I2ILR3JvImkDtIg XtmQA6SuXTKhfDls4j8DH886aljXoubgUqkQTOUJSOhRb8FSeXmt7CzbLPtpt+bJ+aqB o3vPcXQARX3ribhSim1NPTJczlvOEc4W9V+RhUa5LWgW54aj1Q2u8oF5a5S2RRhkAvRO xyVg== X-Gm-Message-State: AGi0PubxQiSLnSWV/teP46gZ4VUl9uiV4mpr2UNdlfuTkn8pViPrJhZM m2yWjLJ0OtMu9GM0+ZaeR5cHdivVLag= X-Google-Smtp-Source: APiQypIWXZOwArNjmvAoB0wVsXRP53mQSam9Bc8EHQr9XUmwiFzp3ARWIAW2lgEIboR7yeNpexzePg== X-Received: by 2002:aa7:9e10:: with SMTP id y16mr7057253pfq.236.1587227335550; Sat, 18 Apr 2020 09:28:55 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH] tcg: Add load_dest parameter to GVecGen2 Date: Sat, 18 Apr 2020 09:28:53 -0700 Message-Id: <20200418162853.4779-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::436 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" We have this same parameter for GVecGen2i, GVecGen3, and GVecGen3i. This will make some SVE2 insns easier to parameterize. Signed-off-by: Richard Henderson --- include/tcg/tcg-op-gvec.h | 2 ++ tcg/tcg-op-gvec.c | 45 ++++++++++++++++++++++++++++----------- 2 files changed, 34 insertions(+), 13 deletions(-) diff --git a/include/tcg/tcg-op-gvec.h b/include/tcg/tcg-op-gvec.h index d89f91f40e..cea6497341 100644 --- a/include/tcg/tcg-op-gvec.h +++ b/include/tcg/tcg-op-gvec.h @@ -109,6 +109,8 @@ typedef struct { uint8_t vece; /* Prefer i64 to v64. */ bool prefer_i64; + /* Load dest as a 2nd source operand. */ + bool load_dest; } GVecGen2; =20 typedef struct { diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c index 43cac1a0bf..049a55e700 100644 --- a/tcg/tcg-op-gvec.c +++ b/tcg/tcg-op-gvec.c @@ -663,17 +663,22 @@ static void expand_clr(uint32_t dofs, uint32_t maxsz) =20 /* Expand OPSZ bytes worth of two-operand operations using i32 elements. = */ static void expand_2_i32(uint32_t dofs, uint32_t aofs, uint32_t oprsz, - void (*fni)(TCGv_i32, TCGv_i32)) + bool load_dest, void (*fni)(TCGv_i32, TCGv_i32)) { TCGv_i32 t0 =3D tcg_temp_new_i32(); + TCGv_i32 t1 =3D tcg_temp_new_i32(); uint32_t i; =20 for (i =3D 0; i < oprsz; i +=3D 4) { tcg_gen_ld_i32(t0, cpu_env, aofs + i); - fni(t0, t0); - tcg_gen_st_i32(t0, cpu_env, dofs + i); + if (load_dest) { + tcg_gen_ld_i32(t1, cpu_env, dofs + i); + } + fni(t1, t0); + tcg_gen_st_i32(t1, cpu_env, dofs + i); } tcg_temp_free_i32(t0); + tcg_temp_free_i32(t1); } =20 static void expand_2i_i32(uint32_t dofs, uint32_t aofs, uint32_t oprsz, @@ -793,17 +798,22 @@ static void expand_4_i32(uint32_t dofs, uint32_t aofs= , uint32_t bofs, =20 /* Expand OPSZ bytes worth of two-operand operations using i64 elements. = */ static void expand_2_i64(uint32_t dofs, uint32_t aofs, uint32_t oprsz, - void (*fni)(TCGv_i64, TCGv_i64)) + bool load_dest, void (*fni)(TCGv_i64, TCGv_i64)) { TCGv_i64 t0 =3D tcg_temp_new_i64(); + TCGv_i64 t1 =3D tcg_temp_new_i64(); uint32_t i; =20 for (i =3D 0; i < oprsz; i +=3D 8) { tcg_gen_ld_i64(t0, cpu_env, aofs + i); - fni(t0, t0); - tcg_gen_st_i64(t0, cpu_env, dofs + i); + if (load_dest) { + tcg_gen_ld_i64(t1, cpu_env, dofs + i); + } + fni(t1, t0); + tcg_gen_st_i64(t1, cpu_env, dofs + i); } tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); } =20 static void expand_2i_i64(uint32_t dofs, uint32_t aofs, uint32_t oprsz, @@ -924,17 +934,23 @@ static void expand_4_i64(uint32_t dofs, uint32_t aofs= , uint32_t bofs, /* Expand OPSZ bytes worth of two-operand operations using host vectors. = */ static void expand_2_vec(unsigned vece, uint32_t dofs, uint32_t aofs, uint32_t oprsz, uint32_t tysz, TCGType type, + bool load_dest, void (*fni)(unsigned, TCGv_vec, TCGv_vec)) { TCGv_vec t0 =3D tcg_temp_new_vec(type); + TCGv_vec t1 =3D tcg_temp_new_vec(type); uint32_t i; =20 for (i =3D 0; i < oprsz; i +=3D tysz) { tcg_gen_ld_vec(t0, cpu_env, aofs + i); - fni(vece, t0, t0); - tcg_gen_st_vec(t0, cpu_env, dofs + i); + if (load_dest) { + tcg_gen_ld_vec(t1, cpu_env, dofs + i); + } + fni(vece, t1, t0); + tcg_gen_st_vec(t1, cpu_env, dofs + i); } tcg_temp_free_vec(t0); + tcg_temp_free_vec(t1); } =20 /* Expand OPSZ bytes worth of two-vector operands and an immediate operand @@ -1088,7 +1104,8 @@ void tcg_gen_gvec_2(uint32_t dofs, uint32_t aofs, * that e.g. size =3D=3D 80 would be expanded with 2x32 + 1x16. */ some =3D QEMU_ALIGN_DOWN(oprsz, 32); - expand_2_vec(g->vece, dofs, aofs, some, 32, TCG_TYPE_V256, g->fniv= ); + expand_2_vec(g->vece, dofs, aofs, some, 32, TCG_TYPE_V256, + g->load_dest, g->fniv); if (some =3D=3D oprsz) { break; } @@ -1098,17 +1115,19 @@ void tcg_gen_gvec_2(uint32_t dofs, uint32_t aofs, maxsz -=3D some; /* fallthru */ case TCG_TYPE_V128: - expand_2_vec(g->vece, dofs, aofs, oprsz, 16, TCG_TYPE_V128, g->fni= v); + expand_2_vec(g->vece, dofs, aofs, oprsz, 16, TCG_TYPE_V128, + g->load_dest, g->fniv); break; case TCG_TYPE_V64: - expand_2_vec(g->vece, dofs, aofs, oprsz, 8, TCG_TYPE_V64, g->fniv); + expand_2_vec(g->vece, dofs, aofs, oprsz, 8, TCG_TYPE_V64, + g->load_dest, g->fniv); break; =20 case 0: if (g->fni8 && check_size_impl(oprsz, 8)) { - expand_2_i64(dofs, aofs, oprsz, g->fni8); + expand_2_i64(dofs, aofs, oprsz, g->load_dest, g->fni8); } else if (g->fni4 && check_size_impl(oprsz, 4)) { - expand_2_i32(dofs, aofs, oprsz, g->fni4); + expand_2_i32(dofs, aofs, oprsz, g->load_dest, g->fni4); } else { assert(g->fno !=3D NULL); tcg_gen_gvec_2_ool(dofs, aofs, oprsz, maxsz, g->data, g->fno); --=20 2.20.1