From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com ARC-Seal: i=1; a=rsa-sha256; t=1585766548; cv=none; d=zohomail.com; s=zohoarc; b=STj64aga0ogYI/uwe2KogK2VLsWDVfnEZ2+kFLlqVdlYC6CsxBLulRvEEZaTPsuUItAlykiY2aHwI5nDFbqxXX+hmn/sKFoDH+tPILsxS92N0h/fg2QBi5D2L8y/AN01t97xFda3qQPAYpMj2ZcV6D5J/kAzNBa60ft5PMgjvR8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1585766548; h=Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:To; bh=ley8y3OuFZ/k94juwyyq7OTs9bcwvfLPvQ4YE5LgMRI=; b=SfLKO7qckVB/oYb2qvIsEyUNIec1XftcxXRdcmuc/ZVVVKTKRnzOeS/9dp6j1AqB35+eW27TScXbmXFvHVOaQGHlPlb2p7kUxkjEKal38KS6F7d05vDuyK24YjC1sDQBTpBBUA02P8FtSsP/27gxq4/ajYTKg6rn0DnD8cDCrcQ= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1585766548580751.0010861141978; Wed, 1 Apr 2020 11:42:28 -0700 (PDT) Received: from localhost ([::1]:35890 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jJiJn-000075-13 for importer@patchew.org; Wed, 01 Apr 2020 14:42:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55277) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jJiJ9-000857-Du for qemu-devel@nongnu.org; Wed, 01 Apr 2020 14:41:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jJiJ8-0004Be-BA for qemu-devel@nongnu.org; Wed, 01 Apr 2020 14:41:47 -0400 Received: from mga06.intel.com ([134.134.136.31]:41020) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1jJiJ8-00045a-3z; Wed, 01 Apr 2020 14:41:46 -0400 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2020 11:41:37 -0700 Received: from unknown (HELO localhost.ch.intel.com) ([10.2.28.117]) by fmsmga001.fm.intel.com with ESMTP; 01 Apr 2020 11:41:36 -0700 IronPort-SDR: Xh/Sb8/XtERS8ugcg7UdlqOgESQK1c1OszWK+lQoS1ahTjzKIdf1JR4whFzZierzjTVeiv/fb9 mGfKO4klSU3Q== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False IronPort-SDR: xvyFNyhD1Xz8ISKGBcbGPD9bNwDL4zCSEzadfFRYgvgmHWgPiuQXRsXBJRAM+k+0++bKLXmtO9 GMwtDab5xTKg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,332,1580803200"; d="scan'208";a="359943800" From: Andrzej Jakowski To: kbusch@kernel.org, kwolf@redhat.com, mreitz@redhat.com Subject: [PATCH v1] nvme: indicate CMB support through controller capabilities register Date: Wed, 1 Apr 2020 11:42:19 -0700 Message-Id: <20200401184219.14911-1-andrzej.jakowski@linux.intel.com> X-Mailer: git-send-email 2.21.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 134.134.136.31 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrzej Jakowski , qemu-devel@nongnu.org, qemu-block@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" This patch sets CMBS bit in controller capabilities register when user configures NVMe driver with CMB support, so capabilites are correctly repor= ted to guest OS. Signed-off-by: Andrzej Jakowski Reviewed-by: Klaus Jensen --- hw/block/nvme.c | 2 ++ include/block/nvme.h | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/hw/block/nvme.c b/hw/block/nvme.c index d28335cbf3..986803398f 100644 --- a/hw/block/nvme.c +++ b/hw/block/nvme.c @@ -1393,6 +1393,8 @@ static void nvme_realize(PCIDevice *pci_dev, Error **= errp) n->bar.intmc =3D n->bar.intms =3D 0; =20 if (n->cmb_size_mb) { + /* Contoller capabilities */ + NVME_CAP_SET_CMBS(n->bar.cap, 1); =20 NVME_CMBLOC_SET_BIR(n->bar.cmbloc, 2); NVME_CMBLOC_SET_OFST(n->bar.cmbloc, 0); diff --git a/include/block/nvme.h b/include/block/nvme.h index 8fb941c653..561891b140 100644 --- a/include/block/nvme.h +++ b/include/block/nvme.h @@ -27,6 +27,7 @@ enum NvmeCapShift { CAP_CSS_SHIFT =3D 37, CAP_MPSMIN_SHIFT =3D 48, CAP_MPSMAX_SHIFT =3D 52, + CAP_CMB_SHIFT =3D 57, }; =20 enum NvmeCapMask { @@ -39,6 +40,7 @@ enum NvmeCapMask { CAP_CSS_MASK =3D 0xff, CAP_MPSMIN_MASK =3D 0xf, CAP_MPSMAX_MASK =3D 0xf, + CAP_CMB_MASK =3D 0x1, }; =20 #define NVME_CAP_MQES(cap) (((cap) >> CAP_MQES_SHIFT) & CAP_MQES_MASK) @@ -69,6 +71,8 @@ enum NvmeCapMask { << CAP_MPSMIN_S= HIFT) #define NVME_CAP_SET_MPSMAX(cap, val) (cap |=3D (uint64_t)(val & CAP_MPSMA= X_MASK)\ << CAP_MPSMAX_= SHIFT) +#define NVME_CAP_SET_CMBS(cap, val) (cap |=3D (uint64_t)(val & CAP_CMB_MAS= K)\ + << CAP_CMB_SHI= FT) =20 enum NvmeCcShift { CC_EN_SHIFT =3D 0, --=20 2.21.1