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X-Received-From: 2607:f8b0:4864:20::743 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, richard.henderson@linaro.org, Aleksandar Markovic , "Emilio G. Cota" , peter.puhov@linaro.org, alex.bennee@linaro.org, Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Emilio G. Cota" Cc: Aurelien Jarno Cc: Aleksandar Markovic Reviewed-by: Richard Henderson Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- target/mips/cpu.c | 7 ++++--- target/mips/kvm.c | 2 +- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index e86cd06548..761d8aaa54 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -56,13 +56,14 @@ static bool mips_cpu_has_work(CPUState *cs) MIPSCPU *cpu =3D MIPS_CPU(cs); CPUMIPSState *env =3D &cpu->env; bool has_work =3D false; + uint32_t interrupt_request =3D cpu_interrupt_request(cs); =20 /* * Prior to MIPS Release 6 it is implementation dependent if non-enabl= ed * interrupts wake-up the CPU, however most of the implementations only * check for interrupts that can be taken. */ - if ((cs->interrupt_request & CPU_INTERRUPT_HARD) && + if ((interrupt_request & CPU_INTERRUPT_HARD) && cpu_mips_hw_interrupts_pending(env)) { if (cpu_mips_hw_interrupts_enabled(env) || (env->insn_flags & ISA_MIPS32R6)) { @@ -76,7 +77,7 @@ static bool mips_cpu_has_work(CPUState *cs) * The QEMU model will issue an _WAKE request whenever the CPUs * should be woken up. */ - if (cs->interrupt_request & CPU_INTERRUPT_WAKE) { + if (interrupt_request & CPU_INTERRUPT_WAKE) { has_work =3D true; } =20 @@ -86,7 +87,7 @@ static bool mips_cpu_has_work(CPUState *cs) } /* MIPS Release 6 has the ability to halt the CPU. */ if (env->CP0_Config5 & (1 << CP0C5_VP)) { - if (cs->interrupt_request & CPU_INTERRUPT_WAKE) { + if (interrupt_request & CPU_INTERRUPT_WAKE) { has_work =3D true; } if (!mips_vp_active(env)) { diff --git a/target/mips/kvm.c b/target/mips/kvm.c index 2b7d680547..e9b7a9f2ad 100644 --- a/target/mips/kvm.c +++ b/target/mips/kvm.c @@ -141,7 +141,7 @@ void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run) =20 qemu_mutex_lock_iothread(); =20 - if ((cs->interrupt_request & CPU_INTERRUPT_HARD) && + if ((cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD) && cpu_mips_io_interrupts_pending(cpu)) { intr.cpu =3D -1; intr.irq =3D 2; --=20 2.17.1