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X-Received-From: 2607:f8b0:4864:20::841 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, "Emilio G. Cota" , alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Emilio G. Cota" Reviewed-by: Richard Henderson Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- target/i386/whpx-all.c | 41 ++++++++++++++++++++++++----------------- 1 file changed, 24 insertions(+), 17 deletions(-) diff --git a/target/i386/whpx-all.c b/target/i386/whpx-all.c index d5beb4a5e2..cb424f04a3 100644 --- a/target/i386/whpx-all.c +++ b/target/i386/whpx-all.c @@ -752,12 +752,14 @@ static int whpx_handle_portio(CPUState *cpu, static int whpx_handle_halt(CPUState *cpu) { struct CPUX86State *env =3D (CPUArchState *)(cpu->env_ptr); + uint32_t interrupt_request; int ret =3D 0; =20 qemu_mutex_lock_iothread(); - if (!((cpu->interrupt_request & CPU_INTERRUPT_HARD) && + interrupt_request =3D cpu_interrupt_request(cpu); + if (!((interrupt_request & CPU_INTERRUPT_HARD) && (env->eflags & IF_MASK)) && - !(cpu->interrupt_request & CPU_INTERRUPT_NMI)) { + !(interrupt_request & CPU_INTERRUPT_NMI)) { cpu->exception_index =3D EXCP_HLT; cpu_halted_set(cpu, true); ret =3D 1; @@ -775,6 +777,7 @@ static void whpx_vcpu_pre_run(CPUState *cpu) struct CPUX86State *env =3D (CPUArchState *)(cpu->env_ptr); X86CPU *x86_cpu =3D X86_CPU(cpu); int irq; + uint32_t interrupt_request; uint8_t tpr; WHV_X64_PENDING_INTERRUPTION_REGISTER new_int; UINT32 reg_count =3D 0; @@ -786,17 +789,19 @@ static void whpx_vcpu_pre_run(CPUState *cpu) =20 qemu_mutex_lock_iothread(); =20 + interrupt_request =3D cpu_interrupt_request(cpu); + /* Inject NMI */ if (!vcpu->interruption_pending && - cpu->interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_SMI)) { - if (cpu->interrupt_request & CPU_INTERRUPT_NMI) { + interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_SMI)) { + if (interrupt_request & CPU_INTERRUPT_NMI) { cpu_reset_interrupt(cpu, CPU_INTERRUPT_NMI); vcpu->interruptable =3D false; new_int.InterruptionType =3D WHvX64PendingNmi; new_int.InterruptionPending =3D 1; new_int.InterruptionVector =3D 2; } - if (cpu->interrupt_request & CPU_INTERRUPT_SMI) { + if (interrupt_request & CPU_INTERRUPT_SMI) { cpu_reset_interrupt(cpu, CPU_INTERRUPT_SMI); } } @@ -805,12 +810,12 @@ static void whpx_vcpu_pre_run(CPUState *cpu) * Force the VCPU out of its inner loop to process any INIT requests or * commit pending TPR access. */ - if (cpu->interrupt_request & (CPU_INTERRUPT_INIT | CPU_INTERRUPT_TPR))= { - if ((cpu->interrupt_request & CPU_INTERRUPT_INIT) && + if (interrupt_request & (CPU_INTERRUPT_INIT | CPU_INTERRUPT_TPR)) { + if ((interrupt_request & CPU_INTERRUPT_INIT) && !(env->hflags & HF_SMM_MASK)) { cpu->exit_request =3D 1; } - if (cpu->interrupt_request & CPU_INTERRUPT_TPR) { + if (interrupt_request & CPU_INTERRUPT_TPR) { cpu->exit_request =3D 1; } } @@ -819,7 +824,7 @@ static void whpx_vcpu_pre_run(CPUState *cpu) if (!vcpu->interruption_pending && vcpu->interruptable && (env->eflags & IF_MASK)) { assert(!new_int.InterruptionPending); - if (cpu->interrupt_request & CPU_INTERRUPT_HARD) { + if (interrupt_request & CPU_INTERRUPT_HARD) { cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD); irq =3D cpu_get_pic_interrupt(env); if (irq >=3D 0) { @@ -849,7 +854,7 @@ static void whpx_vcpu_pre_run(CPUState *cpu) =20 /* Update the state of the interrupt delivery notification */ if (!vcpu->window_registered && - cpu->interrupt_request & CPU_INTERRUPT_HARD) { + cpu_interrupt_request(cpu) & CPU_INTERRUPT_HARD) { reg_values[reg_count].DeliverabilityNotifications.InterruptNotific= ation =3D 1; vcpu->window_registered =3D 1; @@ -902,31 +907,33 @@ static void whpx_vcpu_process_async_events(CPUState *= cpu) struct CPUX86State *env =3D (CPUArchState *)(cpu->env_ptr); X86CPU *x86_cpu =3D X86_CPU(cpu); struct whpx_vcpu *vcpu =3D get_whpx_vcpu(cpu); + uint32_t interrupt_request; =20 - if ((cpu->interrupt_request & CPU_INTERRUPT_INIT) && + if ((cpu_interrupt_request(cpu) & CPU_INTERRUPT_INIT) && !(env->hflags & HF_SMM_MASK)) { whpx_cpu_synchronize_state(cpu); do_cpu_init(x86_cpu); vcpu->interruptable =3D true; } =20 - if (cpu->interrupt_request & CPU_INTERRUPT_POLL) { + if (cpu_interrupt_request(cpu) & CPU_INTERRUPT_POLL) { cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); apic_poll_irq(x86_cpu->apic_state); } =20 - if (((cpu->interrupt_request & CPU_INTERRUPT_HARD) && + interrupt_request =3D cpu_interrupt_request(cpu); + if (((interrupt_request & CPU_INTERRUPT_HARD) && (env->eflags & IF_MASK)) || - (cpu->interrupt_request & CPU_INTERRUPT_NMI)) { + (interrupt_request & CPU_INTERRUPT_NMI)) { cpu_halted_set(cpu, false); } =20 - if (cpu->interrupt_request & CPU_INTERRUPT_SIPI) { + if (interrupt_request & CPU_INTERRUPT_SIPI) { whpx_cpu_synchronize_state(cpu); do_cpu_sipi(x86_cpu); } =20 - if (cpu->interrupt_request & CPU_INTERRUPT_TPR) { + if (cpu_interrupt_request(cpu) & CPU_INTERRUPT_TPR) { cpu_reset_interrupt(cpu, CPU_INTERRUPT_TPR); whpx_cpu_synchronize_state(cpu); apic_handle_tpr_access_report(x86_cpu->apic_state, env->eip, @@ -1413,7 +1420,7 @@ static void whpx_memory_init(void) =20 static void whpx_handle_interrupt(CPUState *cpu, int mask) { - cpu->interrupt_request |=3D mask; + cpu_interrupt_request_or(cpu, mask); =20 if (!qemu_cpu_is_self(cpu)) { qemu_cpu_kick(cpu); --=20 2.17.1