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Thu, 26 Mar 2020 12:37:48 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v8 12/74] m68k: convert to helper_cpu_halted_set Date: Thu, 26 Mar 2020 15:30:54 -0400 Message-Id: <20200326193156.4322-13-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200326193156.4322-1-robert.foley@linaro.org> References: <20200326193156.4322-1-robert.foley@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::741 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, richard.henderson@linaro.org, Laurent Vivier , "Emilio G. Cota" , peter.puhov@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Cc: Laurent Vivier Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Laurent Vivier Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- target/m68k/translate.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 0f80888203..16a64e4776 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -44,7 +44,6 @@ #undef DEFO32 #undef DEFO64 =20 -static TCGv_i32 cpu_halted; static TCGv_i32 cpu_exception_index; =20 static char cpu_reg_names[2 * 8 * 3 + 5 * 4]; @@ -80,9 +79,6 @@ void m68k_tcg_init(void) #undef DEFO32 #undef DEFO64 =20 - cpu_halted =3D tcg_global_mem_new_i32(cpu_env, - -offsetof(M68kCPU, env) + - offsetof(CPUState, halted), "HALTE= D"); cpu_exception_index =3D tcg_global_mem_new_i32(cpu_env, -offsetof(M68kCPU, env) + offsetof(CPUState, except= ion_index), @@ -4698,6 +4694,7 @@ DISAS_INSN(halt) DISAS_INSN(stop) { uint16_t ext; + TCGv_i32 tmp; =20 if (IS_USER(s)) { gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); @@ -4707,7 +4704,9 @@ DISAS_INSN(stop) ext =3D read_im16(env, s); =20 gen_set_sr_im(s, ext, 0); - tcg_gen_movi_i32(cpu_halted, 1); + tmp =3D tcg_const_i32(1); + gen_helper_cpu_halted_set(cpu_env, tmp); + tcg_temp_free_i32(tmp); gen_exception(s, s->pc, EXCP_HLT); } =20 --=20 2.17.1