From nobody Fri Nov 14 03:48:36 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1584494598; cv=none; d=zohomail.com; s=zohoarc; b=HUrIkCyAWi8Qi6OyvqpCiB8WD+E4iY1hLObzuCEIVmUJ1D7k825rq0hxrcWb95JhE/20WBZEQ8reIgtC6Va8vwQF/12xcA9krRCfoBMYbO5ASgEB4EgNWDLPAmFLPu4E0FjbaT0C87lN9x3/KLtK/REfW6gBD0/U8pcg1X0ln2Q= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1584494598; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=ee1lMh7e2gW2tg/Gbem+6EUMfUGQDqgf65E4cU6r3Zg=; b=HN3vRz67Bs7x67Y0dWkvAAYs+rD2vpWGAyzSROMtJDSBjIsyM5oovyUrTVYmDYeEvT6kywdLhGLK+RDXQwJlcw9w7AFAzedfLZ0B8ZIO3s7w0PquzwANRG1FdWOG4iZpyOEX/AQ1rXggToZn8HbT7Ke0n4eqljsoKBEebnqHt/A= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1584494598086322.57432704912014; Tue, 17 Mar 2020 18:23:18 -0700 (PDT) Received: from localhost ([::1]:44032 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jENQS-0002bJ-Vr for importer@patchew.org; Tue, 17 Mar 2020 21:23:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34452) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jENLc-0004KR-IX for qemu-devel@nongnu.org; Tue, 17 Mar 2020 21:18:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jENLa-0001rB-EE for qemu-devel@nongnu.org; Tue, 17 Mar 2020 21:18:16 -0400 Received: from us-smtp-delivery-74.mimecast.com ([63.128.21.74]:41812) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1jENLa-0001mV-12 for qemu-devel@nongnu.org; Tue, 17 Mar 2020 21:18:14 -0400 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-344-oGGpmKNBOVm7n3DiBs4Njg-1; Tue, 17 Mar 2020 21:18:10 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id D028E18A5502; Wed, 18 Mar 2020 01:18:08 +0000 (UTC) Received: from localhost (ovpn-118-148.rdu2.redhat.com [10.10.118.148]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3F8E419C58; Wed, 18 Mar 2020 01:18:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1584494293; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ee1lMh7e2gW2tg/Gbem+6EUMfUGQDqgf65E4cU6r3Zg=; b=dDYJ3VYdS44n1z7AEL3tRw5ZQTA3EjPuKG48PhLACgknE2EJa1m/rDvsw3Lqajb+uMTdUR DkSGkqzf3AFh/z4dxvdN/I6zcGUhwJqclr6TnBJxwJzcrNpEY79SyBVWiZcFYy6rqiwBc7 FRT6HioCtMNwY8M1/DJfaFOPog15bMw= X-MC-Unique: oGGpmKNBOVm7n3DiBs4Njg-1 From: Eduardo Habkost To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 08/13] hw/i386: Introduce X86CPUTopoInfo to contain topology info Date: Tue, 17 Mar 2020 21:17:43 -0400 Message-Id: <20200318011748.2104336-9-ehabkost@redhat.com> In-Reply-To: <20200318011748.2104336-1-ehabkost@redhat.com> References: <20200318011748.2104336-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 63.128.21.74 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Babu Moger , Eduardo Habkost , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: Babu Moger This is an effort to re-arrange few data structure for better readability. 1. Add X86CPUTopoInfo which will have all the topology informations required to build the cpu topology. There is no functional changes. 2. Introduce init_topo_info to initialize X86CPUTopoInfo members from X86MachineState. 3. Update x86 unit tests for new calling convention with parameter X86CPUTo= poInfo There is no functional changes. Signed-off-by: Babu Moger Message-Id: <158396717251.58170.4499717831243474938.stgit@naples-babu.amd.c= om> --- hw/i386/pc.c | 12 +++++------ hw/i386/x86.c | 32 +++++++++++++++++++++------- include/hw/i386/topology.h | 38 ++++++++++++++++++++------------- include/hw/i386/x86.h | 3 +++ tests/test-x86-cpuid.c | 43 +++++++++++++++++++++----------------- 5 files changed, 81 insertions(+), 47 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index f52e84b2ba..662abb549d 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1513,6 +1513,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_d= ev, X86MachineState *x86ms =3D X86_MACHINE(pcms); unsigned int smp_cores =3D ms->smp.cores; unsigned int smp_threads =3D ms->smp.threads; + X86CPUTopoInfo topo_info; =20 if(!object_dynamic_cast(OBJECT(cpu), ms->cpu_type)) { error_setg(errp, "Invalid CPU type, expected cpu type: '%s'", @@ -1520,6 +1521,8 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_d= ev, return; } =20 + init_topo_info(&topo_info, x86ms); + env->nr_dies =3D x86ms->smp_dies; =20 /* @@ -1575,16 +1578,14 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug= _dev, topo_ids.die_id =3D cpu->die_id; topo_ids.core_id =3D cpu->core_id; topo_ids.smt_id =3D cpu->thread_id; - cpu->apic_id =3D apicid_from_topo_ids(x86ms->smp_dies, smp_cores, - smp_threads, &topo_ids); + cpu->apic_id =3D apicid_from_topo_ids(&topo_info, &topo_ids); } =20 cpu_slot =3D pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, &idx); if (!cpu_slot) { MachineState *ms =3D MACHINE(pcms); =20 - x86_topo_ids_from_apicid(cpu->apic_id, x86ms->smp_dies, - smp_cores, smp_threads, &topo_ids); + x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); error_setg(errp, "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with" " APIC ID %" PRIu32 ", valid index range 0:%d", @@ -1605,8 +1606,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_d= ev, /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizef= n() * once -smp refactoring is complete and there will be CPU private * CPUState::nr_cores and CPUState::nr_threads fields instead of globa= ls */ - x86_topo_ids_from_apicid(cpu->apic_id, x86ms->smp_dies, - smp_cores, smp_threads, &topo_ids); + x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); if (cpu->socket_id !=3D -1 && cpu->socket_id !=3D topo_ids.pkg_id) { error_setg(errp, "property socket-id: %u doesn't match set apic-id= :" " 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id, diff --git a/hw/i386/x86.c b/hw/i386/x86.c index c6ee5aac8c..b7d94e8dfe 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -57,6 +57,16 @@ /* Physical Address of PVH entry point read from kernel ELF NOTE */ static size_t pvh_start_addr; =20 +inline void init_topo_info(X86CPUTopoInfo *topo_info, + const X86MachineState *x86ms) +{ + MachineState *ms =3D MACHINE(x86ms); + + topo_info->dies_per_pkg =3D x86ms->smp_dies; + topo_info->cores_per_die =3D ms->smp.cores; + topo_info->threads_per_core =3D ms->smp.threads; +} + /* * Calculates initial APIC ID for a specific CPU index * @@ -68,13 +78,14 @@ static size_t pvh_start_addr; uint32_t x86_cpu_apic_id_from_index(X86MachineState *x86ms, unsigned int cpu_index) { - MachineState *ms =3D MACHINE(x86ms); X86MachineClass *x86mc =3D X86_MACHINE_GET_CLASS(x86ms); + X86CPUTopoInfo topo_info; uint32_t correct_id; static bool warned; =20 - correct_id =3D x86_apicid_from_cpu_idx(x86ms->smp_dies, ms->smp.cores, - ms->smp.threads, cpu_index); + init_topo_info(&topo_info, x86ms); + + correct_id =3D x86_apicid_from_cpu_idx(&topo_info, cpu_index); if (x86mc->compat_apic_id_mode) { if (cpu_index !=3D correct_id && !warned && !qtest_enabled()) { error_report("APIC IDs set in compatibility mode, " @@ -145,19 +156,22 @@ int64_t x86_get_default_cpu_node_id(const MachineStat= e *ms, int idx) { X86CPUTopoIDs topo_ids; X86MachineState *x86ms =3D X86_MACHINE(ms); + X86CPUTopoInfo topo_info; + + init_topo_info(&topo_info, x86ms); =20 assert(idx < ms->possible_cpus->len); x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id, - x86ms->smp_dies, ms->smp.cores, - ms->smp.threads, &topo_ids); + &topo_info, &topo_ids); return topo_ids.pkg_id % ms->numa_state->num_nodes; } =20 const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms) { X86MachineState *x86ms =3D X86_MACHINE(ms); - int i; unsigned int max_cpus =3D ms->smp.max_cpus; + X86CPUTopoInfo topo_info; + int i; =20 if (ms->possible_cpus) { /* @@ -171,6 +185,9 @@ const CPUArchIdList *x86_possible_cpu_arch_ids(MachineS= tate *ms) ms->possible_cpus =3D g_malloc0(sizeof(CPUArchIdList) + sizeof(CPUArchId) * max_cpus); ms->possible_cpus->len =3D max_cpus; + + init_topo_info(&topo_info, x86ms); + for (i =3D 0; i < ms->possible_cpus->len; i++) { X86CPUTopoIDs topo_ids; =20 @@ -179,8 +196,7 @@ const CPUArchIdList *x86_possible_cpu_arch_ids(MachineS= tate *ms) ms->possible_cpus->cpus[i].arch_id =3D x86_cpu_apic_id_from_index(x86ms, i); x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id, - x86ms->smp_dies, ms->smp.cores, - ms->smp.threads, &topo_ids); + &topo_info, &topo_ids); ms->possible_cpus->cpus[i].props.has_socket_id =3D true; ms->possible_cpus->cpus[i].props.socket_id =3D topo_ids.pkg_id; if (x86ms->smp_dies > 1) { diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h index 52def68610..7ea507f376 100644 --- a/include/hw/i386/topology.h +++ b/include/hw/i386/topology.h @@ -52,6 +52,12 @@ typedef struct X86CPUTopoIDs { unsigned smt_id; } X86CPUTopoIDs; =20 +typedef struct X86CPUTopoInfo { + unsigned dies_per_pkg; + unsigned cores_per_die; + unsigned threads_per_core; +} X86CPUTopoInfo; + /* Return the bit width needed for 'count' IDs */ static unsigned apicid_bitwidth_for_count(unsigned count) @@ -119,11 +125,13 @@ static inline unsigned apicid_pkg_offset(unsigned nr_= dies, * * The caller must make sure core_id < nr_cores and smt_id < nr_threads. */ -static inline apic_id_t apicid_from_topo_ids(unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads, +static inline apic_id_t apicid_from_topo_ids(X86CPUTopoInfo *topo_info, const X86CPUTopoIDs *topo_ids) { + unsigned nr_dies =3D topo_info->dies_per_pkg; + unsigned nr_cores =3D topo_info->cores_per_die; + unsigned nr_threads =3D topo_info->threads_per_core; + return (topo_ids->pkg_id << apicid_pkg_offset(nr_dies, nr_cores, nr_threads)) | (topo_ids->die_id << @@ -136,12 +144,14 @@ static inline apic_id_t apicid_from_topo_ids(unsigned= nr_dies, /* Calculate thread/core/package IDs for a specific topology, * based on (contiguous) CPU index */ -static inline void x86_topo_ids_from_idx(unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads, +static inline void x86_topo_ids_from_idx(X86CPUTopoInfo *topo_info, unsigned cpu_index, X86CPUTopoIDs *topo_ids) { + unsigned nr_dies =3D topo_info->dies_per_pkg; + unsigned nr_cores =3D topo_info->cores_per_die; + unsigned nr_threads =3D topo_info->threads_per_core; + topo_ids->pkg_id =3D cpu_index / (nr_dies * nr_cores * nr_threads); topo_ids->die_id =3D cpu_index / (nr_cores * nr_threads) % nr_dies; topo_ids->core_id =3D cpu_index / nr_threads % nr_cores; @@ -152,11 +162,13 @@ static inline void x86_topo_ids_from_idx(unsigned nr_= dies, * based on APIC ID */ static inline void x86_topo_ids_from_apicid(apic_id_t apicid, - unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads, + X86CPUTopoInfo *topo_info, X86CPUTopoIDs *topo_ids) { + unsigned nr_dies =3D topo_info->dies_per_pkg; + unsigned nr_cores =3D topo_info->cores_per_die; + unsigned nr_threads =3D topo_info->threads_per_core; + topo_ids->smt_id =3D apicid & ~(0xFFFFFFFFUL << apicid_smt_width(nr_dies, nr_cores, nr_threa= ds)); topo_ids->core_id =3D @@ -173,14 +185,12 @@ static inline void x86_topo_ids_from_apicid(apic_id_t= apicid, * * 'cpu_index' is a sequential, contiguous ID for the CPU. */ -static inline apic_id_t x86_apicid_from_cpu_idx(unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads, +static inline apic_id_t x86_apicid_from_cpu_idx(X86CPUTopoInfo *topo_info, unsigned cpu_index) { X86CPUTopoIDs topo_ids; - x86_topo_ids_from_idx(nr_dies, nr_cores, nr_threads, cpu_index, &topo_= ids); - return apicid_from_topo_ids(nr_dies, nr_cores, nr_threads, &topo_ids); + x86_topo_ids_from_idx(topo_info, cpu_index, &topo_ids); + return apicid_from_topo_ids(topo_info, &topo_ids); } =20 #endif /* HW_I386_TOPOLOGY_H */ diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h index 41fe37b8a3..22babcb3bb 100644 --- a/include/hw/i386/x86.h +++ b/include/hw/i386/x86.h @@ -21,6 +21,7 @@ #include "exec/hwaddr.h" #include "qemu/notify.h" =20 +#include "hw/i386/topology.h" #include "hw/boards.h" #include "hw/nmi.h" #include "hw/isa/isa.h" @@ -82,6 +83,8 @@ typedef struct { #define X86_MACHINE_CLASS(class) \ OBJECT_CLASS_CHECK(X86MachineClass, class, TYPE_X86_MACHINE) =20 +void init_topo_info(X86CPUTopoInfo *topo_info, const X86MachineState *x86m= s); + uint32_t x86_cpu_apic_id_from_index(X86MachineState *pcms, unsigned int cpu_index); =20 diff --git a/tests/test-x86-cpuid.c b/tests/test-x86-cpuid.c index 1942287f33..66b953113b 100644 --- a/tests/test-x86-cpuid.c +++ b/tests/test-x86-cpuid.c @@ -28,15 +28,18 @@ =20 static void test_topo_bits(void) { + X86CPUTopoInfo topo_info =3D {0}; + /* simple tests for 1 thread per core, 1 core per die, 1 die per packa= ge */ g_assert_cmpuint(apicid_smt_width(1, 1, 1), =3D=3D, 0); g_assert_cmpuint(apicid_core_width(1, 1, 1), =3D=3D, 0); g_assert_cmpuint(apicid_die_width(1, 1, 1), =3D=3D, 0); =20 - g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 1, 1, 0), =3D=3D, 0); - g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 1, 1, 1), =3D=3D, 1); - g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 1, 1, 2), =3D=3D, 2); - g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 1, 1, 3), =3D=3D, 3); + topo_info =3D (X86CPUTopoInfo) {1, 1, 1}; + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 0), =3D=3D, 0); + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 1), =3D=3D, 1); + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 2), =3D=3D, 2); + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 3), =3D=3D, 3); =20 =20 /* Test field width calculation for multiple values @@ -71,36 +74,38 @@ static void test_topo_bits(void) g_assert_cmpuint(apicid_die_offset(1, 6, 3), =3D=3D, 5); g_assert_cmpuint(apicid_pkg_offset(1, 6, 3), =3D=3D, 5); =20 - g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 0), =3D=3D, 0); - g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 1), =3D=3D, 1); - g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 2), =3D=3D, 2); + topo_info =3D (X86CPUTopoInfo) {1, 6, 3}; + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 0), =3D=3D, 0); + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 1), =3D=3D, 1); + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 2), =3D=3D, 2); =20 - g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 1 * 3 + 0), =3D=3D, + topo_info =3D (X86CPUTopoInfo) {1, 6, 3}; + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 1 * 3 + 0), =3D= =3D, (1 << 2) | 0); - g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 1 * 3 + 1), =3D=3D, + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 1 * 3 + 1), =3D= =3D, (1 << 2) | 1); - g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 1 * 3 + 2), =3D=3D, + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 1 * 3 + 2), =3D= =3D, (1 << 2) | 2); =20 - g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 2 * 3 + 0), =3D=3D, + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 2 * 3 + 0), =3D= =3D, (2 << 2) | 0); - g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 2 * 3 + 1), =3D=3D, + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 2 * 3 + 1), =3D= =3D, (2 << 2) | 1); - g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 2 * 3 + 2), =3D=3D, + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 2 * 3 + 2), =3D= =3D, (2 << 2) | 2); =20 - g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 5 * 3 + 0), =3D=3D, + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 5 * 3 + 0), =3D= =3D, (5 << 2) | 0); - g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 5 * 3 + 1), =3D=3D, + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 5 * 3 + 1), =3D= =3D, (5 << 2) | 1); - g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 5 * 3 + 2), =3D=3D, + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 5 * 3 + 2), =3D= =3D, (5 << 2) | 2); =20 - g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 1 * 6 * 3 + 0 * 3 + 0), =3D=3D, (1 << 5)); - g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 1 * 6 * 3 + 1 * 3 + 1), =3D=3D, (1 << 5) | (1 << 2) |= 1); - g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 3 * 6 * 3 + 5 * 3 + 2), =3D=3D, (3 << 5) | (5 << 2) |= 2); } =20 --=20 2.24.1