From nobody Sun May 5 09:23:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1584175034; cv=none; d=zohomail.com; s=zohoarc; b=b59NK32Us+Wc6B29978k3nsqvnIuWvcLNBIKKOvLhOc5oPQeXJyVkGq1xpGmRZ/bCOuq+5bZ3KYbaDvU7Exl5/nEh9utYbVNAdTivZPp1JnmbqOsjrrIgFy2ypM9RWuBf9vmEqxSIsx4SWogNjd9IEn61SIYbaq6y4SVgIp6Kg8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1584175034; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=M17FF7MzmnF1KYWy2wxRRADhK8UeJMkjTc3of6kea6E=; b=Q77Niz2QA2OsqBJXHp1b+1/f0RUO+BNrB1+fBLfhkv+n60On0cDZHoYDAAx89L4hJ+wPHCdpV5p7KZ/P3IjdPcEAcSjWaLEHvlBh6qU8hQtO/PU0qji8UPogTBB8Q+QmKGCPFCj9O42eYBgaJDE7JUel4aGb7qEmToONAQgKf7k= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1584175034958964.0679392343551; Sat, 14 Mar 2020 01:37:14 -0700 (PDT) Received: from localhost ([::1]:42504 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jD2ID-000819-UC for importer@patchew.org; Sat, 14 Mar 2020 04:37:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54511) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jD2HC-0006cv-7v for qemu-devel@nongnu.org; Sat, 14 Mar 2020 04:36:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jD2HA-0004Xp-Si for qemu-devel@nongnu.org; Sat, 14 Mar 2020 04:36:10 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:3722 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1jD2HA-0003wo-GT; Sat, 14 Mar 2020 04:36:08 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id EBE393BC5AB3469B3A53; Sat, 14 Mar 2020 16:35:57 +0800 (CST) Received: from localhost.huawei.com (10.175.104.216) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.487.0; Sat, 14 Mar 2020 16:35:51 +0800 From: Pan Nengyuan To: Subject: [PATCH v5 1/4] s390x: fix memleaks in cpu_finalize Date: Sat, 14 Mar 2020 16:47:27 +0800 Message-ID: <20200314084730.25876-2-pannengyuan@huawei.com> X-Mailer: git-send-email 2.18.2 In-Reply-To: <20200314084730.25876-1-pannengyuan@huawei.com> References: <20200314084730.25876-1-pannengyuan@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.104.216] X-CFilter-Loop: Reflected Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 45.249.212.191 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, zhang.zhanghailiang@huawei.com, David Hildenbrand , Cornelia Huck , Pan Nengyuan , qemu-s390x@nongnu.org, euler.robot@huawei.com, Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" This patch fix memleaks when we call tests/qtest/cpu-plug-test on s390x. Th= e leak stack is as follow: Direct leak of 48 byte(s) in 1 object(s) allocated from: #0 0x7fb43c7cd970 in __interceptor_calloc (/lib64/libasan.so.5+0xef970) #1 0x7fb43be2149d in g_malloc0 (/lib64/libglib-2.0.so.0+0x5249d) #2 0x558ba96da716 in timer_new_full /mnt/sdb/qemu-new/qemu/include/qemu= /timer.h:530 #3 0x558ba96da716 in timer_new /mnt/sdb/qemu-new/qemu/include/qemu/time= r.h:551 #4 0x558ba96da716 in timer_new_ns /mnt/sdb/qemu-new/qemu/include/qemu/t= imer.h:569 #5 0x558ba96da716 in s390_cpu_initfn /mnt/sdb/qemu-new/qemu/target/s390= x/cpu.c:285 #6 0x558ba9c969ab in object_init_with_type /mnt/sdb/qemu-new/qemu/qom/o= bject.c:372 #7 0x558ba9c9eb5f in object_initialize_with_type /mnt/sdb/qemu-new/qemu= /qom/object.c:516 #8 0x558ba9c9f053 in object_new_with_type /mnt/sdb/qemu-new/qemu/qom/ob= ject.c:684 #9 0x558ba967ede6 in s390x_new_cpu /mnt/sdb/qemu-new/qemu/hw/s390x/s390= -virtio-ccw.c:64 #10 0x558ba99764b3 in hmp_cpu_add /mnt/sdb/qemu-new/qemu/hw/core/machin= e-hmp-cmds.c:57 #11 0x558ba9b1c27f in handle_hmp_command /mnt/sdb/qemu-new/qemu/monitor= /hmp.c:1082 #12 0x558ba96c1b02 in qmp_human_monitor_command /mnt/sdb/qemu-new/qemu/= monitor/misc.c:142 Reported-by: Euler Robot Signed-off-by: Pan Nengyuan Tested-by: Mark Cave-Ayland --- Cc: Richard Henderson Cc: David Hildenbrand Cc: Cornelia Huck Cc: qemu-s390x@nongnu.org --- v2->v1: - Similarly to other cleanups, move timer_new into realize(Suggested by Phi= lippe Mathieu-Daud=C3=A9) v3->v2: - Also do the timer_free in unrealize, it seems balanced. v4->v3: - Also do timer_free on the error path in realize() and fix some coding sty= le. - Use device_class_set_parent_unrealize to declare unrealize. v5->v4: - remove timer_del on the error path of realize(), it's redundant. (Suggest= ed by David Hildenbrand) - Simply use errp instead a temporary variable. (Suggested by David Hildenb= rand) --- target/s390x/cpu-qom.h | 1 + target/s390x/cpu.c | 30 ++++++++++++++++++++++++++---- 2 files changed, 27 insertions(+), 4 deletions(-) diff --git a/target/s390x/cpu-qom.h b/target/s390x/cpu-qom.h index dbe5346ec9..af9ffed0d8 100644 --- a/target/s390x/cpu-qom.h +++ b/target/s390x/cpu-qom.h @@ -61,6 +61,7 @@ typedef struct S390CPUClass { const char *desc; =20 DeviceRealize parent_realize; + DeviceUnrealize parent_unrealize; void (*parent_reset)(CPUState *cpu); void (*load_normal)(CPUState *cpu); void (*reset)(CPUState *cpu, cpu_reset_type type); diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index cf84d307c6..8ce38bf399 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -182,6 +182,12 @@ static void s390_cpu_realizefn(DeviceState *dev, Error= **errp) #if !defined(CONFIG_USER_ONLY) MachineState *ms =3D MACHINE(qdev_get_machine()); unsigned int max_cpus =3D ms->smp.max_cpus; + + cpu->env.tod_timer =3D + timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_tod_timer, cpu); + cpu->env.cpu_timer =3D + timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_cpu_timer, cpu); + if (cpu->env.core_id >=3D max_cpus) { error_setg(&err, "Unable to add CPU with core-id: %" PRIu32 ", maximum core-id: %d", cpu->env.core_id, @@ -224,9 +230,27 @@ static void s390_cpu_realizefn(DeviceState *dev, Error= **errp) =20 scc->parent_realize(dev, &err); out: + timer_free(cpu->env.tod_timer); + timer_free(cpu->env.cpu_timer); error_propagate(errp, err); } =20 +static void s390_cpu_unrealizefn(DeviceState *dev, Error **errp) +{ + S390CPUClass *scc =3D S390_CPU_GET_CLASS(dev); + +#if !defined(CONFIG_USER_ONLY) + S390CPU *cpu =3D S390_CPU(dev); + + timer_del(cpu->env.tod_timer); + timer_del(cpu->env.cpu_timer); + timer_free(cpu->env.tod_timer); + timer_free(cpu->env.cpu_timer); +#endif + + scc->parent_unrealize(dev, errp); +} + static GuestPanicInformation *s390_cpu_get_crash_info(CPUState *cs) { GuestPanicInformation *panic_info; @@ -279,10 +303,6 @@ static void s390_cpu_initfn(Object *obj) s390_cpu_get_crash_info_qom, NULL, NULL, NULL, NUL= L); s390_cpu_model_register_props(obj); #if !defined(CONFIG_USER_ONLY) - cpu->env.tod_timer =3D - timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_tod_timer, cpu); - cpu->env.cpu_timer =3D - timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_cpu_timer, cpu); s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu); #endif } @@ -453,6 +473,8 @@ static void s390_cpu_class_init(ObjectClass *oc, void *= data) =20 device_class_set_parent_realize(dc, s390_cpu_realizefn, &scc->parent_realize); + device_class_set_parent_unrealize(dc, s390_cpu_unrealizefn, + &scc->parent_unrealize); device_class_set_props(dc, s390x_cpu_properties); dc->user_creatable =3D true; =20 --=20 2.18.2 From nobody Sun May 5 09:23:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; 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Sat, 14 Mar 2020 16:35:53 +0800 From: Pan Nengyuan To: Subject: [PATCH v5 2/4] mac_via: fix incorrect creation of mos6522 device in mac_via Date: Sat, 14 Mar 2020 16:47:28 +0800 Message-ID: <20200314084730.25876-3-pannengyuan@huawei.com> X-Mailer: git-send-email 2.18.2 In-Reply-To: <20200314084730.25876-1-pannengyuan@huawei.com> References: <20200314084730.25876-1-pannengyuan@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.104.216] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 45.249.212.35 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, zhang.zhanghailiang@huawei.com, Pan Nengyuan , Mark Cave-Ayland , Laurent Vivier , euler.robot@huawei.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This patch fix a bug in mac_via where it failed to actually realize devices= it was using. And move the init codes which inits the mos6522 objects and properties on t= hem from realize() into init(). However, we keep qdev_set_parent_bus in realize(), otherwise i= t will cause device-introspect-test test fail. Then do the realize mos6522 device in the= mac_vir_realize. Signed-off-by: Pan Nengyuan Tested-by: Mark Cave-Ayland --- Cc: Laurent Vivier Cc: Mark Cave-Ayland --- v4->v3: - split v3 into two patches, this patch fix incorrect creation of mos6522, = move inits and props from realize into init. v5->v4: - remove redundant code. - As discussion in https://patchwork.kernel.org/patch/11421229/, we still k= eep=20 qdev_set_parent_bus in realize(). --- hw/misc/mac_via.c | 40 +++++++++++++++++++++++++++------------- 1 file changed, 27 insertions(+), 13 deletions(-) diff --git a/hw/misc/mac_via.c b/hw/misc/mac_via.c index b7d0012794..d208f0b18a 100644 --- a/hw/misc/mac_via.c +++ b/hw/misc/mac_via.c @@ -868,24 +868,24 @@ static void mac_via_reset(DeviceState *dev) static void mac_via_realize(DeviceState *dev, Error **errp) { MacVIAState *m =3D MAC_VIA(dev); - MOS6522State *ms; struct tm tm; int ret; + Error *err =3D NULL; =20 - /* Init VIAs 1 and 2 */ - sysbus_init_child_obj(OBJECT(dev), "via1", &m->mos6522_via1, - sizeof(m->mos6522_via1), TYPE_MOS6522_Q800_VIA1); + qdev_set_parent_bus(DEVICE(&m->mos6522_via1), sysbus_get_default()); + qdev_set_parent_bus(DEVICE(&m->mos6522_via2), sysbus_get_default()); =20 - sysbus_init_child_obj(OBJECT(dev), "via2", &m->mos6522_via2, - sizeof(m->mos6522_via2), TYPE_MOS6522_Q800_VIA2); + object_property_set_bool(OBJECT(&m->mos6522_via1), true, "realized", &= err); + if (err !=3D NULL) { + error_propagate(errp, err); + return; + } =20 - /* Pass through mos6522 output IRQs */ - ms =3D MOS6522(&m->mos6522_via1); - object_property_add_alias(OBJECT(dev), "irq[0]", OBJECT(ms), - SYSBUS_DEVICE_GPIO_IRQ "[0]", &error_abort); - ms =3D MOS6522(&m->mos6522_via2); - object_property_add_alias(OBJECT(dev), "irq[1]", OBJECT(ms), - SYSBUS_DEVICE_GPIO_IRQ "[0]", &error_abort); + object_property_set_bool(OBJECT(&m->mos6522_via2), true, "realized", &= err); + if (err !=3D NULL) { + error_propagate(errp, err); + return; + } =20 /* Pass through mos6522 input IRQs */ qdev_pass_gpios(DEVICE(&m->mos6522_via1), dev, "via1-irq"); @@ -948,6 +948,20 @@ static void mac_via_init(Object *obj) /* ADB */ qbus_create_inplace((BusState *)&m->adb_bus, sizeof(m->adb_bus), TYPE_ADB_BUS, DEVICE(obj), "adb.0"); + + /* Init VIAs 1 and 2 */ + object_initialize_child(OBJECT(m), "via1", &m->mos6522_via1, + sizeof(m->mos6522_via1), TYPE_MOS6522_Q800_VIA= 1, + &error_abort, NULL); + object_initialize_child(OBJECT(m), "via2", &m->mos6522_via2, + sizeof(m->mos6522_via2), TYPE_MOS6522_Q800_VIA= 2, + &error_abort, NULL); + + /* Pass through mos6522 output IRQs */ + object_property_add_alias(OBJECT(m), "irq[0]", OBJECT(&m->mos6522_via1= ), + SYSBUS_DEVICE_GPIO_IRQ "[0]", &error_abort); + object_property_add_alias(OBJECT(m), "irq[1]", OBJECT(&m->mos6522_via2= ), + SYSBUS_DEVICE_GPIO_IRQ "[0]", &error_abort); } =20 static void postload_update_cb(void *opaque, int running, RunState state) --=20 2.18.2 From nobody Sun May 5 09:23:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; 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Sat, 14 Mar 2020 16:35:54 +0800 From: Pan Nengyuan To: Subject: [PATCH v5 3/4] hw/misc/macio: fix incorrect creation of mos6522's subclasses Date: Sat, 14 Mar 2020 16:47:29 +0800 Message-ID: <20200314084730.25876-4-pannengyuan@huawei.com> X-Mailer: git-send-email 2.18.2 In-Reply-To: <20200314084730.25876-1-pannengyuan@huawei.com> References: <20200314084730.25876-1-pannengyuan@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.104.216] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 45.249.212.35 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, zhang.zhanghailiang@huawei.com, Pan Nengyuan , Mark Cave-Ayland , qemu-ppc@nongnu.org, euler.robot@huawei.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" There are two other places where we create mos6522's subclasses but forgot = to realize it. This patch do the realize in these places to fix that. Signed-off-by: Pan Nengyuan Tested-by: Mark Cave-Ayland --- Cc: Mark Cave-Ayland Cc: David Gibson Cc: qemu-ppc@nongnu.org --- v5: - Also fix incorrect creation of mos6522's subclasses on two other places. Not sure if there is a conversion plan, we still keep sysbus_init_child_o= bj in init() in this patch as it was. --- hw/misc/macio/cuda.c | 11 +++++++++-- hw/misc/macio/pmu.c | 11 +++++++++-- 2 files changed, 18 insertions(+), 4 deletions(-) diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index e0cc0aac5d..ee780a8288 100644 --- a/hw/misc/macio/cuda.c +++ b/hw/misc/macio/cuda.c @@ -36,6 +36,7 @@ #include "qemu/cutils.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qapi/error.h" #include "trace.h" =20 /* Bits in B data register: all active low */ @@ -524,11 +525,17 @@ static void cuda_realize(DeviceState *dev, Error **er= rp) CUDAState *s =3D CUDA(dev); SysBusDevice *sbd; MOS6522State *ms; - DeviceState *d; + DeviceState *d =3D DEVICE(&s->mos6522_cuda); struct tm tm; + Error *err =3D NULL; + + object_property_set_bool(OBJECT(d), true, "realized", &err); + if (err !=3D NULL) { + error_propagate(errp, err); + return; + } =20 /* Pass IRQ from 6522 */ - d =3D DEVICE(&s->mos6522_cuda); ms =3D MOS6522(d); sbd =3D SYS_BUS_DEVICE(s); sysbus_pass_irq(sbd, SYS_BUS_DEVICE(ms)); diff --git a/hw/misc/macio/pmu.c b/hw/misc/macio/pmu.c index b8466a4a3f..ae55992288 100644 --- a/hw/misc/macio/pmu.c +++ b/hw/misc/macio/pmu.c @@ -43,6 +43,7 @@ #include "qemu/cutils.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qapi/error.h" #include "trace.h" =20 =20 @@ -741,11 +742,17 @@ static void pmu_realize(DeviceState *dev, Error **err= p) PMUState *s =3D VIA_PMU(dev); SysBusDevice *sbd; MOS6522State *ms; - DeviceState *d; + DeviceState *d =3D DEVICE(&s->mos6522_pmu);; struct tm tm; + Error *err =3D NULL; + + object_property_set_bool(OBJECT(d), true, "realized", &err); + if (err !=3D NULL) { + error_propagate(errp, err); + return; + } =20 /* Pass IRQ from 6522 */ - d =3D DEVICE(&s->mos6522_pmu); ms =3D MOS6522(d); sbd =3D SYS_BUS_DEVICE(s); sysbus_pass_irq(sbd, SYS_BUS_DEVICE(ms)); --=20 2.18.2 From nobody Sun May 5 09:23:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1584175035503330.81732658756255; Sat, 14 Mar 2020 01:37:15 -0700 (PDT) Received: from localhost ([::1]:42502 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jD2IE-00080O-2G for importer@patchew.org; Sat, 14 Mar 2020 04:37:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54518) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jD2HC-0006cw-IO for qemu-devel@nongnu.org; Sat, 14 Mar 2020 04:36:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jD2HB-0004Zy-9V for qemu-devel@nongnu.org; Sat, 14 Mar 2020 04:36:10 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:53344 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1jD2HA-0004M1-Tw; Sat, 14 Mar 2020 04:36:09 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 0D3BC9AEFBC28A105EB2; Sat, 14 Mar 2020 16:36:03 +0800 (CST) Received: from localhost.huawei.com (10.175.104.216) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.487.0; Sat, 14 Mar 2020 16:35:56 +0800 From: Pan Nengyuan To: Subject: [PATCH v5 4/4] hw/misc/mos6522: move timer_new from init() into realize() to avoid memleaks Date: Sat, 14 Mar 2020 16:47:30 +0800 Message-ID: <20200314084730.25876-5-pannengyuan@huawei.com> X-Mailer: git-send-email 2.18.2 In-Reply-To: <20200314084730.25876-1-pannengyuan@huawei.com> References: <20200314084730.25876-1-pannengyuan@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.104.216] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 45.249.212.35 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, zhang.zhanghailiang@huawei.com, Pan Nengyuan , Mark Cave-Ayland , Laurent Vivier , qemu-ppc@nongnu.org, euler.robot@huawei.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" There are some memleaks when we call 'device_list_properties'. This patch move timer_new from init into realize to fix it. Reported-by: Euler Robot Signed-off-by: Pan Nengyuan Tested-by: Mark Cave-Ayland --- Cc: Laurent Vivier Cc: Mark Cave-Ayland Cc: David Gibson Cc: qemu-ppc@nongnu.org --- v2->v1: - no changes in this patch. v3->v2: - remove null check in reset, and add calls to mos6522_realize() in mac_via= _realize to make this move to be valid. v4->v3: - split patch into two, this patch fix the memleaks. v5->v4: - No change in this patch. But add [patch 3/4] to fix SEGVs during make che= ck-qtest-ppc64 if apply this patch. This patch also depend to another fix [patch 2/4]. --- hw/misc/mos6522.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c index 19e154b870..c1cd154a84 100644 --- a/hw/misc/mos6522.c +++ b/hw/misc/mos6522.c @@ -485,6 +485,11 @@ static void mos6522_init(Object *obj) for (i =3D 0; i < ARRAY_SIZE(s->timers); i++) { s->timers[i].index =3D i; } +} + +static void mos6522_realize(DeviceState *dev, Error **errp) +{ + MOS6522State *s =3D MOS6522(dev); =20 s->timers[0].timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, mos6522_timer1= , s); s->timers[1].timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, mos6522_timer2= , s); @@ -502,6 +507,7 @@ static void mos6522_class_init(ObjectClass *oc, void *d= ata) =20 dc->reset =3D mos6522_reset; dc->vmsd =3D &vmstate_mos6522; + dc->realize =3D mos6522_realize; device_class_set_props(dc, mos6522_properties); mdc->parent_reset =3D dc->reset; mdc->set_sr_int =3D mos6522_set_sr_int; --=20 2.18.2