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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 05/36] aspeed/smc: Add some tracing
Date: Thu, 12 Mar 2020 16:44:28 +0000
Message-Id: <20200312164459.25924-6-peter.maydell@linaro.org>
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From: C=C3=A9dric Le Goater <clg@kaod.org>
Signed-off-by: C=C3=A9dric Le Goater <clg@kaod.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Philippe Mathieu-Daud=C3=A9 <philmd@redhat.com>
Message-id: 20200206112645.21275-2-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
Makefile.objs | 1 +
hw/ssi/aspeed_smc.c | 17 +++++++++++++++++
hw/ssi/trace-events | 9 +++++++++
3 files changed, 27 insertions(+)
create mode 100644 hw/ssi/trace-events
diff --git a/Makefile.objs b/Makefile.objs
index 40d3a1696cb..a7c967633ac 100644
--- a/Makefile.objs
+++ b/Makefile.objs
@@ -175,6 +175,7 @@ trace-events-subdirs +=3D hw/scsi
trace-events-subdirs +=3D hw/sd
trace-events-subdirs +=3D hw/sparc
trace-events-subdirs +=3D hw/sparc64
+trace-events-subdirs +=3D hw/ssi
trace-events-subdirs +=3D hw/timer
trace-events-subdirs +=3D hw/tpm
trace-events-subdirs +=3D hw/usb
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index 23c8d2f0624..e5621bf728c 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -31,6 +31,7 @@
#include "qapi/error.h"
#include "exec/address-spaces.h"
#include "qemu/units.h"
+#include "trace.h"
=20
#include "hw/irq.h"
#include "hw/qdev-properties.h"
@@ -513,6 +514,8 @@ static void aspeed_smc_flash_set_segment(AspeedSMCState=
*s, int cs,
=20
s->ctrl->reg_to_segment(s, new, &seg);
=20
+ trace_aspeed_smc_flash_set_segment(cs, new, seg.addr, seg.addr + seg.s=
ize);
+
/* The start address of CS0 is read-only */
if (cs =3D=3D 0 && seg.addr !=3D s->ctrl->flash_window_base) {
qemu_log_mask(LOG_GUEST_ERROR,
@@ -753,6 +756,8 @@ static uint64_t aspeed_smc_flash_read(void *opaque, hwa=
ddr addr, unsigned size)
__func__, aspeed_smc_flash_mode(fl));
}
=20
+ trace_aspeed_smc_flash_read(fl->id, addr, size, ret,
+ aspeed_smc_flash_mode(fl));
return ret;
}
=20
@@ -808,6 +813,9 @@ static bool aspeed_smc_do_snoop(AspeedSMCFlash *fl, ui=
nt64_t data,
AspeedSMCState *s =3D fl->controller;
uint8_t addr_width =3D aspeed_smc_flash_is_4byte(fl) ? 4 : 3;
=20
+ trace_aspeed_smc_do_snoop(fl->id, s->snoop_index, s->snoop_dummies,
+ (uint8_t) data & 0xff);
+
if (s->snoop_index =3D=3D SNOOP_OFF) {
return false; /* Do nothing */
=20
@@ -858,6 +866,9 @@ static void aspeed_smc_flash_write(void *opaque, hwaddr=
addr, uint64_t data,
AspeedSMCState *s =3D fl->controller;
int i;
=20
+ trace_aspeed_smc_flash_write(fl->id, addr, size, data,
+ aspeed_smc_flash_mode(fl));
+
if (!aspeed_smc_is_writable(fl)) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: flash is not writable at 0x%"
HWADDR_PRIx "\n", __func__, addr);
@@ -972,6 +983,9 @@ static uint64_t aspeed_smc_read(void *opaque, hwaddr ad=
dr, unsigned int size)
(s->ctrl->has_dma && addr =3D=3D R_DMA_CHECKSUM) ||
(addr >=3D R_SEG_ADDR0 && addr < R_SEG_ADDR0 + s->ctrl->max_slaves=
) ||
(addr >=3D s->r_ctrl0 && addr < s->r_ctrl0 + s->ctrl->max_slaves))=
{
+
+ trace_aspeed_smc_read(addr, size, s->regs[addr]);
+
return s->regs[addr];
} else {
qemu_log_mask(LOG_UNIMP, "%s: not implemented: 0x%" HWADDR_PRIx "\=
n",
@@ -1091,6 +1105,7 @@ static void aspeed_smc_dma_checksum(AspeedSMCState *s)
__func__, s->regs[R_DMA_FLASH_ADDR]);
return;
}
+ trace_aspeed_smc_dma_checksum(s->regs[R_DMA_FLASH_ADDR], data);
=20
/*
* When the DMA is on-going, the DMA registers are updated
@@ -1225,6 +1240,8 @@ static void aspeed_smc_write(void *opaque, hwaddr add=
r, uint64_t data,
=20
addr >>=3D 2;
=20
+ trace_aspeed_smc_write(addr, size, data);
+
if (addr =3D=3D s->r_conf ||
(addr >=3D s->r_timings &&
addr < s->r_timings + s->ctrl->nregs_timings) ||
diff --git a/hw/ssi/trace-events b/hw/ssi/trace-events
new file mode 100644
index 00000000000..ffe531a500a
--- /dev/null
+++ b/hw/ssi/trace-events
@@ -0,0 +1,9 @@
+# aspeed_smc.c
+
+aspeed_smc_flash_set_segment(int cs, uint64_t reg, uint64_t start, uint64_=
t end) "CS%d segreg=3D0x%"PRIx64" [ 0x%"PRIx64" - 0x%"PRIx64" ]"
+aspeed_smc_flash_read(int cs, uint64_t addr, uint32_t size, uint64_t data=
, int mode) "CS%d @0x%" PRIx64 " size %u: 0x%" PRIx64" mode:%d"
+aspeed_smc_do_snoop(int cs, int index, int dummies, int data) "CS%d index:=
0x%x dummies:%d data:0x%x"
+aspeed_smc_flash_write(int cs, uint64_t addr, uint32_t size, uint64_t dat=
a, int mode) "CS%d @0x%" PRIx64 " size %u: 0x%" PRIx64" mode:%d"
+aspeed_smc_read(uint64_t addr, uint32_t size, uint64_t data) "@0x%" PRIx6=
4 " size %u: 0x%" PRIx64
+aspeed_smc_dma_checksum(uint32_t addr, uint32_t data) "0x%08x: 0x%08x"
+aspeed_smc_write(uint64_t addr, uint32_t size, uint64_t data) "@0x%" PRIx=
64 " size %u: 0x%" PRIx64
--=20
2.20.1