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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 18/36] hw/arm/allwinner: add Security Identifier device
Date: Thu, 12 Mar 2020 16:44:41 +0000
Message-Id: <20200312164459.25924-19-peter.maydell@linaro.org>
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From: Niek Linnenbank <nieklinnenbank@gmail.com>
The Security Identifier device found in various Allwinner System on Chip
designs gives applications a per-board unique identifier. This commit
adds support for the Allwinner Security Identifier using a 128-bit
UUID value as input.
Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com>
Reviewed-by: Alex Benn=C3=A9e <alex.bennee@linaro.org>
Message-id: 20200311221854.30370-8-nieklinnenbank@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/misc/Makefile.objs | 1 +
include/hw/arm/allwinner-h3.h | 3 +
include/hw/misc/allwinner-sid.h | 60 ++++++++++++
hw/arm/allwinner-h3.c | 11 ++-
hw/arm/orangepi.c | 8 ++
hw/misc/allwinner-sid.c | 168 ++++++++++++++++++++++++++++++++
hw/misc/trace-events | 4 +
7 files changed, 254 insertions(+), 1 deletion(-)
create mode 100644 include/hw/misc/allwinner-sid.h
create mode 100644 hw/misc/allwinner-sid.c
diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index f3788a59036..daa734036eb 100644
--- a/hw/misc/Makefile.objs
+++ b/hw/misc/Makefile.objs
@@ -31,6 +31,7 @@ common-obj-$(CONFIG_IVSHMEM_DEVICE) +=3D ivshmem.o
common-obj-$(CONFIG_ALLWINNER_H3) +=3D allwinner-h3-ccu.o
obj-$(CONFIG_ALLWINNER_H3) +=3D allwinner-cpucfg.o
common-obj-$(CONFIG_ALLWINNER_H3) +=3D allwinner-h3-sysctrl.o
+common-obj-$(CONFIG_ALLWINNER_H3) +=3D allwinner-sid.o
common-obj-$(CONFIG_REALVIEW) +=3D arm_sysctl.o
common-obj-$(CONFIG_NSERIES) +=3D cbus.o
common-obj-$(CONFIG_ECCMEMCTL) +=3D eccmemctl.o
diff --git a/include/hw/arm/allwinner-h3.h b/include/hw/arm/allwinner-h3.h
index dc729176ab3..85416d9d64d 100644
--- a/include/hw/arm/allwinner-h3.h
+++ b/include/hw/arm/allwinner-h3.h
@@ -42,6 +42,7 @@
#include "hw/misc/allwinner-h3-ccu.h"
#include "hw/misc/allwinner-cpucfg.h"
#include "hw/misc/allwinner-h3-sysctrl.h"
+#include "hw/misc/allwinner-sid.h"
#include "target/arm/cpu.h"
=20
/**
@@ -59,6 +60,7 @@ enum {
AW_H3_SRAM_A2,
AW_H3_SRAM_C,
AW_H3_SYSCTRL,
+ AW_H3_SID,
AW_H3_EHCI0,
AW_H3_OHCI0,
AW_H3_EHCI1,
@@ -114,6 +116,7 @@ typedef struct AwH3State {
AwH3ClockCtlState ccu;
AwCpuCfgState cpucfg;
AwH3SysCtrlState sysctrl;
+ AwSidState sid;
GICState gic;
MemoryRegion sram_a1;
MemoryRegion sram_a2;
diff --git a/include/hw/misc/allwinner-sid.h b/include/hw/misc/allwinner-si=
d.h
new file mode 100644
index 00000000000..4c1fa4762b9
--- /dev/null
+++ b/include/hw/misc/allwinner-sid.h
@@ -0,0 +1,60 @@
+/*
+ * Allwinner Security ID emulation
+ *
+ * Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef HW_MISC_ALLWINNER_SID_H
+#define HW_MISC_ALLWINNER_SID_H
+
+#include "qom/object.h"
+#include "hw/sysbus.h"
+#include "qemu/uuid.h"
+
+/**
+ * Object model
+ * @{
+ */
+
+#define TYPE_AW_SID "allwinner-sid"
+#define AW_SID(obj) \
+ OBJECT_CHECK(AwSidState, (obj), TYPE_AW_SID)
+
+/** @} */
+
+/**
+ * Allwinner Security ID object instance state
+ */
+typedef struct AwSidState {
+ /*< private >*/
+ SysBusDevice parent_obj;
+ /*< public >*/
+
+ /** Maps I/O registers in physical memory */
+ MemoryRegion iomem;
+
+ /** Control register defines how and what to read */
+ uint32_t control;
+
+ /** RdKey register contains the data retrieved by the device */
+ uint32_t rdkey;
+
+ /** Stores the emulated device identifier */
+ QemuUUID identifier;
+
+} AwSidState;
+
+#endif /* HW_MISC_ALLWINNER_SID_H */
diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c
index b9a5597f2a2..deeea63f5f3 100644
--- a/hw/arm/allwinner-h3.c
+++ b/hw/arm/allwinner-h3.c
@@ -38,6 +38,7 @@ const hwaddr allwinner_h3_memmap[] =3D {
[AW_H3_SRAM_A2] =3D 0x00044000,
[AW_H3_SRAM_C] =3D 0x00010000,
[AW_H3_SYSCTRL] =3D 0x01c00000,
+ [AW_H3_SID] =3D 0x01c14000,
[AW_H3_EHCI0] =3D 0x01c1a000,
[AW_H3_OHCI0] =3D 0x01c1a400,
[AW_H3_EHCI1] =3D 0x01c1b000,
@@ -78,7 +79,6 @@ struct AwH3Unimplemented {
{ "mmc0", 0x01c0f000, 4 * KiB },
{ "mmc1", 0x01c10000, 4 * KiB },
{ "mmc2", 0x01c11000, 4 * KiB },
- { "sid", 0x01c14000, 1 * KiB },
{ "crypto", 0x01c15000, 4 * KiB },
{ "msgbox", 0x01c17000, 4 * KiB },
{ "spinlock", 0x01c18000, 4 * KiB },
@@ -198,6 +198,11 @@ static void allwinner_h3_init(Object *obj)
=20
sysbus_init_child_obj(obj, "cpucfg", &s->cpucfg, sizeof(s->cpucfg),
TYPE_AW_CPUCFG);
+
+ sysbus_init_child_obj(obj, "sid", &s->sid, sizeof(s->sid),
+ TYPE_AW_SID);
+ object_property_add_alias(obj, "identifier", OBJECT(&s->sid),
+ "identifier", &error_abort);
}
=20
static void allwinner_h3_realize(DeviceState *dev, Error **errp)
@@ -315,6 +320,10 @@ static void allwinner_h3_realize(DeviceState *dev, Err=
or **errp)
qdev_init_nofail(DEVICE(&s->cpucfg));
sysbus_mmio_map(SYS_BUS_DEVICE(&s->cpucfg), 0, s->memmap[AW_H3_CPUCFG]=
);
=20
+ /* Security Identifier */
+ qdev_init_nofail(DEVICE(&s->sid));
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->sid), 0, s->memmap[AW_H3_SID]);
+
/* Universal Serial Bus */
sysbus_create_simple(TYPE_AW_H3_EHCI, s->memmap[AW_H3_EHCI0],
qdev_get_gpio_in(DEVICE(&s->gic),
diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c
index 3fcec1944e8..4047c4c3863 100644
--- a/hw/arm/orangepi.c
+++ b/hw/arm/orangepi.c
@@ -65,6 +65,14 @@ static void orangepi_init(MachineState *machine)
object_property_set_int(OBJECT(h3), 24 * 1000 * 1000, "clk1-freq",
&error_abort);
=20
+ /* Setup SID properties. Currently using a default fixed SID identifie=
r. */
+ if (qemu_uuid_is_null(&h3->sid.identifier)) {
+ qdev_prop_set_string(DEVICE(h3), "identifier",
+ "02c00081-1111-2222-3333-000044556677");
+ } else if (ldl_be_p(&h3->sid.identifier.data[0]) !=3D 0x02c00081) {
+ warn_report("Security Identifier value does not include H3 prefix"=
);
+ }
+
/* Mark H3 object realized */
object_property_set_bool(OBJECT(h3), true, "realized", &error_abort);
=20
diff --git a/hw/misc/allwinner-sid.c b/hw/misc/allwinner-sid.c
new file mode 100644
index 00000000000..196380c33a4
--- /dev/null
+++ b/hw/misc/allwinner-sid.c
@@ -0,0 +1,168 @@
+/*
+ * Allwinner Security ID emulation
+ *
+ * Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/units.h"
+#include "hw/sysbus.h"
+#include "migration/vmstate.h"
+#include "qemu/log.h"
+#include "qemu/module.h"
+#include "qemu/guest-random.h"
+#include "qapi/error.h"
+#include "hw/qdev-properties.h"
+#include "hw/misc/allwinner-sid.h"
+#include "trace.h"
+
+/* SID register offsets */
+enum {
+ REG_PRCTL =3D 0x40, /* Control */
+ REG_RDKEY =3D 0x60, /* Read Key */
+};
+
+/* SID register flags */
+enum {
+ REG_PRCTL_WRITE =3D 0x0002, /* Unknown write flag */
+ REG_PRCTL_OP_LOCK =3D 0xAC00, /* Lock operation */
+};
+
+static uint64_t allwinner_sid_read(void *opaque, hwaddr offset,
+ unsigned size)
+{
+ const AwSidState *s =3D AW_SID(opaque);
+ uint64_t val =3D 0;
+
+ switch (offset) {
+ case REG_PRCTL: /* Control */
+ val =3D s->control;
+ break;
+ case REG_RDKEY: /* Read Key */
+ val =3D s->rdkey;
+ break;
+ default:
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: out-of-bounds offset 0x%04x\n",
+ __func__, (uint32_t)offset);
+ return 0;
+ }
+
+ trace_allwinner_sid_read(offset, val, size);
+
+ return val;
+}
+
+static void allwinner_sid_write(void *opaque, hwaddr offset,
+ uint64_t val, unsigned size)
+{
+ AwSidState *s =3D AW_SID(opaque);
+
+ trace_allwinner_sid_write(offset, val, size);
+
+ switch (offset) {
+ case REG_PRCTL: /* Control */
+ s->control =3D val;
+
+ if ((s->control & REG_PRCTL_OP_LOCK) &&
+ (s->control & REG_PRCTL_WRITE)) {
+ uint32_t id =3D s->control >> 16;
+
+ if (id <=3D sizeof(QemuUUID) - sizeof(s->rdkey)) {
+ s->rdkey =3D ldl_be_p(&s->identifier.data[id]);
+ }
+ }
+ s->control &=3D ~REG_PRCTL_WRITE;
+ break;
+ case REG_RDKEY: /* Read Key */
+ break;
+ default:
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: out-of-bounds offset 0x%04x\n",
+ __func__, (uint32_t)offset);
+ break;
+ }
+}
+
+static const MemoryRegionOps allwinner_sid_ops =3D {
+ .read =3D allwinner_sid_read,
+ .write =3D allwinner_sid_write,
+ .endianness =3D DEVICE_NATIVE_ENDIAN,
+ .valid =3D {
+ .min_access_size =3D 4,
+ .max_access_size =3D 4,
+ },
+ .impl.min_access_size =3D 4,
+};
+
+static void allwinner_sid_reset(DeviceState *dev)
+{
+ AwSidState *s =3D AW_SID(dev);
+
+ /* Set default values for registers */
+ s->control =3D 0;
+ s->rdkey =3D 0;
+}
+
+static void allwinner_sid_init(Object *obj)
+{
+ SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj);
+ AwSidState *s =3D AW_SID(obj);
+
+ /* Memory mapping */
+ memory_region_init_io(&s->iomem, OBJECT(s), &allwinner_sid_ops, s,
+ TYPE_AW_SID, 1 * KiB);
+ sysbus_init_mmio(sbd, &s->iomem);
+}
+
+static Property allwinner_sid_properties[] =3D {
+ DEFINE_PROP_UUID_NODEFAULT("identifier", AwSidState, identifier),
+ DEFINE_PROP_END_OF_LIST()
+};
+
+static const VMStateDescription allwinner_sid_vmstate =3D {
+ .name =3D "allwinner-sid",
+ .version_id =3D 1,
+ .minimum_version_id =3D 1,
+ .fields =3D (VMStateField[]) {
+ VMSTATE_UINT32(control, AwSidState),
+ VMSTATE_UINT32(rdkey, AwSidState),
+ VMSTATE_UINT8_ARRAY_V(identifier.data, AwSidState, sizeof(QemuUUID=
), 1),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static void allwinner_sid_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc =3D DEVICE_CLASS(klass);
+
+ dc->reset =3D allwinner_sid_reset;
+ dc->vmsd =3D &allwinner_sid_vmstate;
+ device_class_set_props(dc, allwinner_sid_properties);
+}
+
+static const TypeInfo allwinner_sid_info =3D {
+ .name =3D TYPE_AW_SID,
+ .parent =3D TYPE_SYS_BUS_DEVICE,
+ .instance_init =3D allwinner_sid_init,
+ .instance_size =3D sizeof(AwSidState),
+ .class_init =3D allwinner_sid_class_init,
+};
+
+static void allwinner_sid_register(void)
+{
+ type_register_static(&allwinner_sid_info);
+}
+
+type_init(allwinner_sid_register)
diff --git a/hw/misc/trace-events b/hw/misc/trace-events
index ede1650672e..4f38328d9c3 100644
--- a/hw/misc/trace-events
+++ b/hw/misc/trace-events
@@ -5,6 +5,10 @@ allwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_=
addr) "id %u, reset_ad
allwinner_cpucfg_read(uint64_t offset, uint64_t data, unsigned size) "offs=
et 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
allwinner_cpucfg_write(uint64_t offset, uint64_t data, unsigned size) "off=
set 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
=20
+# allwinner-sid.c
+allwinner_sid_read(uint64_t offset, uint64_t data, unsigned size) "offset =
0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
+allwinner_sid_write(uint64_t offset, uint64_t data, unsigned size) "offset=
0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
+
# eccmemctl.c
ecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x"
ecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x"
--=20
2.20.1