From nobody Fri Nov 14 00:50:20 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1583756326; cv=none; d=zohomail.com; s=zohoarc; b=IKoDvIbLV3tfso/fNnbgKbXZsG+83hCRG656y6ClrbOvpSF2mqg9O5s6ncDfks0YDBfCeGQh+FD4rQDYFQChXHtYQhHF312qA983new74iwjb6MYqIdFi3eGVBu1MSxiXHuLmGwqRPsGZVf64mB/tojfPWXDnyMjym5K2d66l9I= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1583756326; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Ld+VA19cDluMTpRV/aEShc8H5kbn2t5ozBtLKfdwpto=; b=er9GyZ67gBJrEitg8sp8y6pBnasRhhKBwR6R5qIim/R9CTeuAjWWuD64ZxSG/4mYin+LkqOYlZ9ZAO42T5Pjht6qxxhndALbZ+YPkvjqtv0tRyKIraF0TW6ShYmHHO/5CImtyboDaqER61ePvcXD1/xyKXGAt1C8DJM5i50veWM= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1583756326135823.5283363625487; Mon, 9 Mar 2020 05:18:46 -0700 (PDT) Received: from localhost ([::1]:42058 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jBHMr-0006s4-0O for importer@patchew.org; Mon, 09 Mar 2020 08:18:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56100) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jBHJN-00014D-F5 for qemu-devel@nongnu.org; Mon, 09 Mar 2020 08:15:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jBHJM-0002QP-BP for qemu-devel@nongnu.org; Mon, 09 Mar 2020 08:15:09 -0400 Received: from smtp2200-217.mail.aliyun.com ([121.197.200.217]:42016) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1jBHJM-0002N4-03; Mon, 09 Mar 2020 08:15:08 -0400 Received: from L-PF1D6DP4-1208.hz.ali.com(mailfrom:zhiwei_liu@c-sky.com fp:SMTPD_---.GyaeXy8_1583756101) by smtp.aliyun-inc.com(10.147.41.199); Mon, 09 Mar 2020 20:15:02 +0800 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.07504124|-1; CH=blue; DM=||false|; DS=CONTINUE|ham_alarm|0.0122184-0.000164815-0.987617; FP=13170635624411961626|3|1|9|0|-1|-1|-1; HT=e02c03295; MF=zhiwei_liu@c-sky.com; NM=1; PH=DS; RN=11; RT=11; SR=0; TI=SMTPD_---.GyaeXy8_1583756101; From: LIU Zhiwei To: richard.henderson@linaro.org, alistair23@gmail.com, chihmin.chao@sifive.com, palmer@dabbelt.com Subject: [PATCH v3 02/60] target/riscv: implementation-defined constant parameters Date: Mon, 9 Mar 2020 20:13:59 +0800 Message-Id: <20200309121457.13719-3-zhiwei_liu@c-sky.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200309121457.13719-1-zhiwei_liu@c-sky.com> References: <20200309121457.13719-1-zhiwei_liu@c-sky.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 121.197.200.217 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: guoren@linux.alibaba.com, qemu-riscv@nongnu.org, qemu-devel@nongnu.org, wxy194768@alibaba-inc.com, wenmeng_zhang@c-sky.com, Alistair Francis , LIU Zhiwei Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" vlen is the vector register length in bits. elen is the max element size in bits. vext_spec is the vector specification version, default value is v0.7.1. Signed-off-by: LIU Zhiwei Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson --- target/riscv/cpu.c | 7 +++++++ target/riscv/cpu.h | 5 +++++ 2 files changed, 12 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index c0b7023100..6e4135583d 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -106,6 +106,11 @@ static void set_priv_version(CPURISCVState *env, int p= riv_ver) env->priv_ver =3D priv_ver; } =20 +static void set_vext_version(CPURISCVState *env, int vext_ver) +{ + env->vext_ver =3D vext_ver; +} + static void set_feature(CPURISCVState *env, int feature) { env->features |=3D (1ULL << feature); @@ -364,6 +369,7 @@ static void riscv_cpu_realize(DeviceState *dev, Error *= *errp) CPURISCVState *env =3D &cpu->env; RISCVCPUClass *mcc =3D RISCV_CPU_GET_CLASS(dev); int priv_version =3D PRIV_VERSION_1_11_0; + int vext_version =3D VEXT_VERSION_0_07_1; target_ulong target_misa =3D 0; Error *local_err =3D NULL; =20 @@ -389,6 +395,7 @@ static void riscv_cpu_realize(DeviceState *dev, Error *= *errp) } =20 set_priv_version(env, priv_version); + set_vext_version(env, vext_version); set_resetvec(env, DEFAULT_RSTVEC); =20 if (cpu->cfg.mmu) { diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 0c1f7bdd8b..603715f849 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -84,6 +84,8 @@ enum { #define PRIV_VERSION_1_10_0 0x00011000 #define PRIV_VERSION_1_11_0 0x00011100 =20 +#define VEXT_VERSION_0_07_1 0x00000701 + #define TRANSLATE_PMP_FAIL 2 #define TRANSLATE_FAIL 1 #define TRANSLATE_SUCCESS 0 @@ -119,6 +121,7 @@ struct CPURISCVState { target_ulong guest_phys_fault_addr; =20 target_ulong priv_ver; + target_ulong vext_ver; target_ulong misa; target_ulong misa_mask; =20 @@ -281,6 +284,8 @@ typedef struct RISCVCPU { =20 char *priv_spec; char *user_spec; + uint16_t vlen; + uint16_t elen; bool mmu; bool pmp; } cfg; --=20 2.23.0