From nobody Fri Dec 19 20:23:02 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1583426848; cv=none; d=zohomail.com; s=zohoarc; b=Fces2Mj4BjhDtE/JITMdwlKaBF80QyjoGyv+Bzfg6CblTE2H8XMZ+zDqL9txrJ3Gj5TcQEet/CWXU1nIObVamRS0M9MmeAoqmSnH1ezHZSdw4UKSOEfJ22a3qdTi2IrX0p3JjPzv/p9+HoWat3CEZZdkYOmY49RPX2ksulVjjgM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1583426848; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=pEDdmn2Qq48osMBcaNiYHbcE7nHfPyLhG+0XvX+TSYQ=; b=lvaW2smFtYubPG0LEHv46yz9Gdb8z/LnJeUUIIFjgiMUsIbUknFhyTl7k2kxvu70A8OwUs0BL47Ekar0mgG9Qe7i9AAC6p8Na+QEatvdOgFgt65cGX4anPX9w0TRB+wDkOTxqpQ008BvZWA47qUbk3tIQ3IrcWBB2u0KOgDu/fU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1583426848846361.77115901430625; Thu, 5 Mar 2020 08:47:28 -0800 (PST) Received: from localhost ([::1]:52788 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j9teh-0004B2-Jm for importer@patchew.org; Thu, 05 Mar 2020 11:47:27 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59566) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j9tPS-0003vY-49 for qemu-devel@nongnu.org; Thu, 05 Mar 2020 11:31:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j9tPQ-0002t4-TV for qemu-devel@nongnu.org; Thu, 05 Mar 2020 11:31:42 -0500 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]:54866) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j9tPQ-0002sW-Lg for qemu-devel@nongnu.org; Thu, 05 Mar 2020 11:31:40 -0500 Received: by mail-wm1-x32e.google.com with SMTP id i9so7050169wml.4 for ; Thu, 05 Mar 2020 08:31:40 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id w22sm10310729wmk.34.2020.03.05.08.31.38 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Mar 2020 08:31:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=pEDdmn2Qq48osMBcaNiYHbcE7nHfPyLhG+0XvX+TSYQ=; b=NTSvjoyN+5ZnlpaZvXZRHXXcMArsjBoDse2c9zEL7eNCM0OYeQL+lTaNK3M4l2LYSi WYN8BAP6SB0t43FaCBX/9s5qtDdRC535ZtGgGEZhxCMEwS/OdZomPcBLofeVZRQykHPr FliEgH30MsEUK9QpGflAbD/4A4B4bYYrsr3nlOS5uZR73G5ih/d23nGQ98HEJtuCnxer u0DUkyG4yR1/eYDR1jYs2fp7sRt+RSQdrr/SuU8GY5U5ZKnzE+5u5pBhifcd0lBQjVJ2 Mxkb0BmHz6Wd/TddzV+dcFXHpZSoVrft8q6C+qBAJ1dTqD6TANx0nLo1/YfJwV3FK5yg 8XEA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pEDdmn2Qq48osMBcaNiYHbcE7nHfPyLhG+0XvX+TSYQ=; b=pnbHx0Es/zA+3C7lo7Hn1vlSXo3rlIlo1OrWxFWJ7BtIGAXwhnMo9fwxJaKaZtwDHu JKWPG4BFxG8qnUgm71iKalpAmi1a/uppo/El7unjMtIsB7VGxY/x9KM5IpOCCKOh0AxK 1jEfHdi5z//1sx8xgLbd+Z0EPf3wR2KWJZFm90NkDaEmDNteFNwYQNTgy58m49DCRBeX BsSUjIjttQiCz5qvFOnnWvXJwer101ZCJA5Ok5jmqZdG4ySu+DOxqTYqfF2KGpbt1FbV XoJp3IHYa1dLdAjFH2gOJ4f9RrOuuv3LBX5RXugw/j5Lygn01QsWBxRRYOnABEUe/L2D CpXQ== X-Gm-Message-State: ANhLgQ1p71KcMaziZLfiS5+ecAojy3Xxh502uyuR9svY8eS9u+F+j7q+ 0JqzUolzJpfL5quvtNuDGUiNGJkn0vSdCQ== X-Google-Smtp-Source: ADFU+vuPgYRJYdkfz+6KBPtjt8Ke7+1XtVxlSZSi6wqgyR9c+itHkBg/3UvhFVuBQ402nkopLPs1nA== X-Received: by 2002:a1c:804a:: with SMTP id b71mr10012755wmd.132.1583425899358; Thu, 05 Mar 2020 08:31:39 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 34/37] target/arm: Apply TBI to ESR_ELx in helper_exception_return Date: Thu, 5 Mar 2020 16:30:57 +0000 Message-Id: <20200305163100.22912-35-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200305163100.22912-1-peter.maydell@linaro.org> References: <20200305163100.22912-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32e X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Richard Henderson We missed this case within AArch64.ExceptionReturn. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-id: 20200302175829.2183-5-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/helper-a64.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c index 509ae930698..123ce50e7a8 100644 --- a/target/arm/helper-a64.c +++ b/target/arm/helper-a64.c @@ -1031,6 +1031,8 @@ void HELPER(exception_return)(CPUARMState *env, uint6= 4_t new_pc) "AArch32 EL%d PC 0x%" PRIx32 "\n", cur_el, new_el, env->regs[15]); } else { + int tbii; + env->aarch64 =3D 1; spsr &=3D aarch64_pstate_valid_mask(&env_archcpu(env)->isar); pstate_write(env, spsr); @@ -1038,8 +1040,27 @@ void HELPER(exception_return)(CPUARMState *env, uint= 64_t new_pc) env->pstate &=3D ~PSTATE_SS; } aarch64_restore_sp(env, new_el); - env->pc =3D new_pc; helper_rebuild_hflags_a64(env, new_el); + + /* + * Apply TBI to the exception return address. We had to delay this + * until after we selected the new EL, so that we could select the + * correct TBI+TBID bits. This is made easier by waiting until af= ter + * the hflags rebuild, since we can pull the composite TBII field + * from there. + */ + tbii =3D FIELD_EX32(env->hflags, TBFLAG_A64, TBII); + if ((tbii >> extract64(new_pc, 55, 1)) & 1) { + /* TBI is enabled. */ + int core_mmu_idx =3D cpu_mmu_index(env, false); + if (regime_has_2_ranges(core_to_aa64_mmu_idx(core_mmu_idx))) { + new_pc =3D sextract64(new_pc, 0, 56); + } else { + new_pc =3D extract64(new_pc, 0, 56); + } + } + env->pc =3D new_pc; + qemu_log_mask(CPU_LOG_INT, "Exception return from AArch64 EL%d to " "AArch64 EL%d PC 0x%" PRIx64 "\n", cur_el, new_el, env->pc); --=20 2.20.1