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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id d63sm4867576wmd.44.2020.03.03.09.49.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Mar 2020 09:49:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YrErCxdPD0FB72C1AvkhsFUhJwKacmb/G8K5xzzB0Es=; b=VH9HZj4kdw+98MsTFuffbD0riDElu6ZAEL7Z1/aF/roWyIv3rj1tpjftPAqTrXCfTq DxK0YlbpYLBfFkHFpYbklmxMiRVZJ3jpO5krV4iLqOIIWBryyG1wGP3xonegd41lxjCa oRsci3/RemWGFmUFb8HHDqVgk10br8axwsQWgommwmrObGWaIivqrB1Ti3JqJKIJjP7T fWIAR1bl9MAyte+VGoZY7LJqA/jfq3VjQSoNRjGiVnqcOKSxWYkxlwzLsdMrsuxUs8m1 DREmdgGH3I7fwFnwslPaPx0w4it+1B3CcFlZB0P0kBho0V1dHyDra3X5tswy5BBVmFX0 zvWw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YrErCxdPD0FB72C1AvkhsFUhJwKacmb/G8K5xzzB0Es=; b=DKSzlJQVT+8CcNa0V9v/4YN3h8lrou8Cq35XGJ7/3nVD2inSaGKyQTCI7oBBf9dzHH wpXj5kdzyjEu/gFBrpbXQ5MAVqlamQ12tQ0FNOlGv5pkWydAN+K5PN2TfBwr4svYocal /ZCJ1O2GqfLaE+jGMpobes48wftqk9KlymPJ21Ogj8glBUVhU2UlgY/7gRUxzoI8Q3Dy vvkQSwaYRL+HTOTtM3EXTiRwtoEQiepG1oOliYxXd4K5zaGht7FzTqmyv2PjndbSF9IM SlyWQwvhd7vcBX8V5anjDiOKDBjs4gywm4aVsRKIgnvVK+6/rzl+N4UEkDk/65/5yC1W eVKA== X-Gm-Message-State: ANhLgQ3T8TlIh9gwg4KetmAvDVjOAiELFvVKh3Cmz9HvZ9FHmUzckOSJ b3H1h2i1E4RA8OetqMXFk04Ikst/y9mppA== X-Google-Smtp-Source: ADFU+vscjtQjsVWZFCrRJ5DUhLjyQhn1uhDTZlxVGenumY2Ltc9aZ7uanQvxC2muyO/FVMMNcQiA2A== X-Received: by 2002:a05:600c:552:: with SMTP id k18mr5507694wmc.171.1583257795766; Tue, 03 Mar 2020 09:49:55 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 3/4] target/arm: Recalculate hflags correctly after writes to CONTROL Date: Tue, 3 Mar 2020 17:49:49 +0000 Message-Id: <20200303174950.3298-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200303174950.3298-1-peter.maydell@linaro.org> References: <20200303174950.3298-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::344 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" A write to the CONTROL register can change our current EL (by writing to the nPRIV bit). That means that we can't assume that s->current_el is still valid in trans_MSR_v7m() when we try to rebuild the hflags. Add a new helper rebuild_hflags_m32_newel() which, like the existing rebuild_hflags_a32_newel(), recalculates the current EL from scratch, and use it in trans_MSR_v7m(). This fixes an assertion about an hflags mismatch when the guest changes privilege by writing to CONTROL. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/helper.h | 1 + target/arm/helper.c | 12 ++++++++++++ target/arm/translate.c | 7 +++---- 3 files changed, 16 insertions(+), 4 deletions(-) diff --git a/target/arm/helper.h b/target/arm/helper.h index fcbf5041213..a63fd5dfb73 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -90,6 +90,7 @@ DEF_HELPER_4(msr_banked, void, env, i32, i32, i32) DEF_HELPER_2(get_user_reg, i32, env, i32) DEF_HELPER_3(set_user_reg, void, env, i32, i32) =20 +DEF_HELPER_FLAGS_1(rebuild_hflags_m32_newel, TCG_CALL_NO_RWG, void, env) DEF_HELPER_FLAGS_2(rebuild_hflags_m32, TCG_CALL_NO_RWG, void, env, int) DEF_HELPER_FLAGS_1(rebuild_hflags_a32_newel, TCG_CALL_NO_RWG, void, env) DEF_HELPER_FLAGS_2(rebuild_hflags_a32, TCG_CALL_NO_RWG, void, env, int) diff --git a/target/arm/helper.c b/target/arm/helper.c index 6be9ffa09ef..2eec812b80b 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -12325,6 +12325,18 @@ void arm_rebuild_hflags(CPUARMState *env) env->hflags =3D rebuild_hflags_internal(env); } =20 +/* + * If we have triggered a EL state change we can't rely on the + * translator having passed it to us, we need to recompute. + */ +void HELPER(rebuild_hflags_m32_newel)(CPUARMState *env) +{ + int el =3D arm_current_el(env); + int fp_el =3D fp_exception_el(env, el); + ARMMMUIdx mmu_idx =3D arm_mmu_idx_el(env, el); + env->hflags =3D rebuild_hflags_m32(env, fp_el, mmu_idx); +} + void HELPER(rebuild_hflags_m32)(CPUARMState *env, int el) { int fp_el =3D fp_exception_el(env, el); diff --git a/target/arm/translate.c b/target/arm/translate.c index 7f0154194cf..4715ca0d2ad 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -8551,7 +8551,7 @@ static bool trans_MRS_v7m(DisasContext *s, arg_MRS_v7= m *a) =20 static bool trans_MSR_v7m(DisasContext *s, arg_MSR_v7m *a) { - TCGv_i32 addr, reg, el; + TCGv_i32 addr, reg; =20 if (!arm_dc_feature(s, ARM_FEATURE_M)) { return false; @@ -8561,9 +8561,8 @@ static bool trans_MSR_v7m(DisasContext *s, arg_MSR_v7= m *a) gen_helper_v7m_msr(cpu_env, addr, reg); tcg_temp_free_i32(addr); tcg_temp_free_i32(reg); - el =3D tcg_const_i32(s->current_el); - gen_helper_rebuild_hflags_m32(cpu_env, el); - tcg_temp_free_i32(el); + /* If we wrote to CONTROL, the EL might have changed */ + gen_helper_rebuild_hflags_m32_newel(cpu_env); gen_lookup_tb(s); return true; } --=20 2.20.1