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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 6/8] accel/tcg: remove link between guest ram and TCG cache
size
Date: Fri, 28 Feb 2020 18:43:45 -0800
Message-Id: <20200229024347.22826-7-richard.henderson@linaro.org>
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Cc: peter.maydell@linaro.org, Niek Linnenbank <nieklinnenbank@gmail.com>,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@redhat.com>,
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From: Alex Benn=C3=A9e <alex.bennee@linaro.org>
Basing the TB cache size on the ram_size was always a little heuristic
and was broken by a1b18df9a4 which caused ram_size not to be fully
realised at the time we initialise the TCG translation cache.
The current DEFAULT_CODE_GEN_BUFFER_SIZE may still be a little small
but follow-up patches will address that.
Fixes: a1b18df9a4
Cc: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Alex Benn=C3=A9e <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daud=C3=A9 <philmd@redhat.com>
Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com>
Message-Id: <20200228192415.19867-3-alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/translate-all.c | 8 --------
1 file changed, 8 deletions(-)
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 238b0e575b..5b66af783b 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -938,15 +938,7 @@ static inline size_t size_code_gen_buffer(size_t tb_si=
ze)
{
/* Size the buffer. */
if (tb_size =3D=3D 0) {
-#ifdef USE_STATIC_CODE_GEN_BUFFER
tb_size =3D DEFAULT_CODE_GEN_BUFFER_SIZE;
-#else
- /* ??? Needs adjustments. */
- /* ??? If we relax the requirement that CONFIG_USER_ONLY use the
- static buffer, we could size this on RESERVED_VA, on the text
- segment size of the executable, or continue to use the default.=
*/
- tb_size =3D (unsigned long)(ram_size / 4);
-#endif
}
if (tb_size < MIN_CODE_GEN_BUFFER_SIZE) {
tb_size =3D MIN_CODE_GEN_BUFFER_SIZE;
--=20
2.20.1