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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id c9sm13335214wrq.44.2020.02.28.08.39.18 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Feb 2020 08:39:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=9eBbOH0iWuMB9GEnPRYXejUJxzdgvoce0O5T0LTK50c=; b=vjaRrWkXCn/6xIFIZqWZ9vmo176BfKUwna2HsJnX5ctBNlYEcnuvNESEjEe2BkFILl wgxV8MdTm8054TpkKhmgBAf7WKoUp5zmAtb553tDN7gM8zAFou1DG6thQiqhHHUtTuLF NgkLE6kjGw0yfek887/ionU7N1NkN1G3oZ92dPGvZ8dBJvrFSf+R2rCk5k0D1bA18x9c MEdES4sMGPireYNO7+DxK7zmVBKNPA9OLtbhXluRan5lCCkaV8qNcrrqTcK4JaI4mapw JrBPFNy+F41kR5iQQL7uc+aJxGKR4CRUS8KSXH/1SRqnYOPNNTBjKS88E2sk8ZDYfB8j DWcg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9eBbOH0iWuMB9GEnPRYXejUJxzdgvoce0O5T0LTK50c=; b=l2NGK59FkTahJX4TpD8rI+YE6H3M1pm3wcbu1fxQGGdrE54evfgbnyDcETP249/eK+ EFTTWXKhiRL+ig+hx9lCL2ZQ3j/9d8DXUAbp9Rx5taeKBiSwJ1/96b+5HAyxhzJw+/AW MeZKVBbxC1/DnwenjJlwPt4UDL1mlQKaJOw5+U5Utaf02S2d+Iz484SCXUZbAWJZKxQn EYra0KJY9Ib2YGFfMHaw16EEJfQxB/iFklgkknBsKWdhP04A5nfaIhfYcUxqPIAbhLGS m6RpC5kgzB+YVUWN3PYkHuHnzylG/m3w0Sk0unH69TpK3763+Vm3yxkTxrMTggBsgDEr FsiQ== X-Gm-Message-State: APjAAAW9kht9cK3Fag/kJfYQaHz4/BlqxkrWWSpW92umUVMPcBmnUfsw xeLI7oDPqxD2UGK4/SVqiqA+z/1wkchGDg== X-Google-Smtp-Source: APXvYqy+HaQZtC+M6A7ZKd592/T/7G2eP+lMgXh+J0NCw/kFlt/YlXtePH9KPF7y4BOnuWLoeRIYyA== X-Received: by 2002:a1c:3b89:: with SMTP id i131mr3926263wma.171.1582907959828; Fri, 28 Feb 2020 08:39:19 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 33/33] hw/intc/arm_gic_kvm: Don't assume kernel can provide a GICv2 Date: Fri, 28 Feb 2020 16:38:40 +0000 Message-Id: <20200228163840.23585-34-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200228163840.23585-1-peter.maydell@linaro.org> References: <20200228163840.23585-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::343 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) In our KVM GICv2 realize function, we try to cope with old kernels that don't provide the device control API (KVM_CAP_DEVICE_CTRL): we try to use the device control, and if that fails we fall back to assuming that the kernel has the old style KVM_CREATE_IRQCHIP and that it will provide a GICv2. This doesn't cater for the possibility of a kernel and hardware which only provide a GICv3, which is very common now. On that setup we will abort() later on in kvm_arm_pmu_set_irq() when we try to wire up an interrupt to the GIC we failed to create: qemu-system-aarch64: PMU: KVM_SET_DEVICE_ATTR: Invalid argument qemu-system-aarch64: failed to set irq for PMU Aborted If the kernel advertises KVM_CAP_DEVICE_CTRL we should trust it if it says it can't create a GICv2, rather than assuming it has one. We can then produce a more helpful error message including a hint about the most probable reason for the failure. If the kernel doesn't advertise KVM_CAP_DEVICE_CTRL then it is truly ancient by this point but we might as well still fall back to a KVM_CREATE_IRQCHIP GICv2. With this patch then the user misconfiguration which previously caused an abort now prints: qemu-system-aarch64: Initialization of device kvm-arm-gic failed: error cre= ating in-kernel VGIC: No such device Perhaps the host CPU does not support GICv2? Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Andrew Jones Tested-by: Andrew Jones Message-id: 20200225182435.1131-1-peter.maydell@linaro.org --- hw/intc/arm_gic_kvm.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c index 9deb15e7e69..d7df423a7a3 100644 --- a/hw/intc/arm_gic_kvm.c +++ b/hw/intc/arm_gic_kvm.c @@ -551,7 +551,16 @@ static void kvm_arm_gic_realize(DeviceState *dev, Erro= r **errp) KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true, &error_abort); } + } else if (kvm_check_extension(kvm_state, KVM_CAP_DEVICE_CTRL)) { + error_setg_errno(errp, -ret, "error creating in-kernel VGIC"); + error_append_hint(errp, + "Perhaps the host CPU does not support GICv2?\n"= ); } else if (ret !=3D -ENODEV && ret !=3D -ENOTSUP) { + /* + * Very ancient kernel without KVM_CAP_DEVICE_CTRL: assume that + * ENODEV or ENOTSUP mean "can't create GICv2 with KVM_CREATE_DEVI= CE", + * and that we will get a GICv2 via KVM_CREATE_IRQCHIP. + */ error_setg_errno(errp, -ret, "error creating in-kernel VGIC"); return; } --=20 2.20.1