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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id c9sm13335214wrq.44.2020.02.28.08.38.43 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Feb 2020 08:38:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=ImwM0adJI+zaYU2PeeesY4R3AUrKvYPOwthqhAld2eU=; b=H8DF+2NVEkZCjeVj3Vs1x0iHvSTeXkAaauvyJUTuUYTZ6JmH6ZHNc+3TtibiVxV2wq w3qh4zeIOneWJS6P8t9nlLzSYO01Zm6Z8H3fa7xy/RHeH4Bc/bqHf6JcCeDf1RxIL1jC PWx3JFmfNdESJ+8CeHwnWYZeYYsS04MsiIvRbhFv8AYj3TGSQh7e82L8odH6a2wWPs9K wjsEE50ZV8/zhaVdPo0G053btWPs0eshipl9jmSLfd0I2YsisYwvgHgYoZu8xHHKOm0L lGbciB7WWjfDw6BLEfP8MUji2iDj8yCKId7WqUlO6ipec9QD9Ea8wsLmHJaiWzsNR9yI z09A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ImwM0adJI+zaYU2PeeesY4R3AUrKvYPOwthqhAld2eU=; b=c/xtrA7Vd03lPUr0eoP3lAo73/ZJMB+4SVXsyKGP33YtudpwWA8i8NtW1BjvJp+LrO y5xojhoYK/nGthtoF32oT1zBPpGZaP9m5Du6wl6RE4IG9uJtpjZEDSlV0l1ztZFyJgRc Tb5qpB18z2HI6rEbvyVVocGC7irTrQes2FBy8Gn3b5KOxhWKSbN6UD0lFFe2seacKrhm x12FhCJ5gVY7WP5PE0X1ZaJGkBtWb5hMYzszRCZPZ+07DZP9dkJC62JPTnsKORztc5Nt Tiw1rikcOWWLpwfQ/x87LyOox2mW7/SP+XTBIjd8jHWVelzz0UnRMfe/YXOgI2XAPnbi 3DWA== X-Gm-Message-State: APjAAAVm7AxCOgseLSioehhXzdb0YDK7nSZJfPWE3/Cx/0WA70TDbY6k XIz+bLTC2LWGkX9iEnyAXstP4XWCflMCjw== X-Google-Smtp-Source: APXvYqw9rSepdizjwcMCjzGhcNoA8G2utvd2kBWWMjH2b6II5k5XUmL/Ap6hEWhmTgWK82+5VTwcAw== X-Received: by 2002:a1c:2504:: with SMTP id l4mr5768854wml.72.1582907923987; Fri, 28 Feb 2020 08:38:43 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 01/33] hw/arm: Use TYPE_PL011 to create serial port Date: Fri, 28 Feb 2020 16:38:08 +0000 Message-Id: <20200228163840.23585-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200228163840.23585-1-peter.maydell@linaro.org> References: <20200228163840.23585-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Gavin Shan This uses TYPE_PL011 when creating the serial port so that the code looks cleaner. Signed-off-by: Gavin Shan Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Message-id: 20200224222223.4128-1-gshan@redhat.com Signed-off-by: Peter Maydell --- hw/arm/sbsa-ref.c | 3 ++- hw/arm/virt.c | 3 ++- hw/arm/xlnx-versal.c | 3 ++- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 1cba9fc3021..8409ba853de 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -39,6 +39,7 @@ #include "hw/pci-host/gpex.h" #include "hw/qdev-properties.h" #include "hw/usb.h" +#include "hw/char/pl011.h" #include "net/net.h" =20 #define RAMLIMIT_GB 8192 @@ -409,7 +410,7 @@ static void create_uart(const SBSAMachineState *sms, in= t uart, { hwaddr base =3D sbsa_ref_memmap[uart].base; int irq =3D sbsa_ref_irqmap[uart]; - DeviceState *dev =3D qdev_create(NULL, "pl011"); + DeviceState *dev =3D qdev_create(NULL, TYPE_PL011); SysBusDevice *s =3D SYS_BUS_DEVICE(dev); =20 qdev_prop_set_chr(dev, "chardev", chr); diff --git a/hw/arm/virt.c b/hw/arm/virt.c index a8191a3e75e..856808599d2 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -74,6 +74,7 @@ #include "hw/mem/nvdimm.h" #include "hw/acpi/generic_event_device.h" #include "hw/virtio/virtio-iommu.h" +#include "hw/char/pl011.h" =20 #define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \ static void virt_##major##_##minor##_class_init(ObjectClass *oc, \ @@ -727,7 +728,7 @@ static void create_uart(const VirtMachineState *vms, in= t uart, int irq =3D vms->irqmap[uart]; const char compat[] =3D "arm,pl011\0arm,primecell"; const char clocknames[] =3D "uartclk\0apb_pclk"; - DeviceState *dev =3D qdev_create(NULL, "pl011"); + DeviceState *dev =3D qdev_create(NULL, TYPE_PL011); SysBusDevice *s =3D SYS_BUS_DEVICE(dev); =20 qdev_prop_set_chr(dev, "chardev", chr); diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index 1cf3daaf4f4..403fc7b8814 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -22,6 +22,7 @@ #include "hw/misc/unimp.h" #include "hw/intc/arm_gicv3_common.h" #include "hw/arm/xlnx-versal.h" +#include "hw/char/pl011.h" =20 #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72") #define GEM_REVISION 0x40070106 @@ -144,7 +145,7 @@ static void versal_create_uarts(Versal *s, qemu_irq *pi= c) DeviceState *dev; MemoryRegion *mr; =20 - dev =3D qdev_create(NULL, "pl011"); + dev =3D qdev_create(NULL, TYPE_PL011); s->lpd.iou.uart[i] =3D SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", serial_hd(i)); object_property_add_child(OBJECT(s), name, OBJECT(dev), &error_fat= al); --=20 2.20.1