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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id c9sm13335214wrq.44.2020.02.28.08.39.01 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Feb 2020 08:39:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=/fspnfbWHr/iEc26cj3LysOXZAm0hum7R0BOuileGqY=; b=Z3TDQLEnn2KAhrI5sZeL3qfZxJrRZhngXm27pLNarxuobTbmtUXL07LrnPuhATd2NB veibm57iaNXkRDrrmgneS+5t8DX15408H6sEQL36gzuR6cy93fc+rF9C33XGwtj3CB7X cOo4dH4XoT8iyMvL8ztOGh4QIT93CboIPICNxvJYP80i3PxRdYq4Gyaz4ObaXQOhRh2I 1UL/Lo7jU7kuuWapEaVdWvLKkGrL2YFT2gzUXRBgC9HQmFZZLPeI9+FortsYDWgdplui GWyZU2FKPYZ+JVRYTAQW4oPsWbQrogksSN6Yyl6pIaOxKrZHAYZM2jbSv/9O7hnigPy7 rlPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/fspnfbWHr/iEc26cj3LysOXZAm0hum7R0BOuileGqY=; b=XXFbWrOXQu8KiAjE+72jFX/acYTEw+3p+8oXlw1mlOn3IrfviKyuEL53tZeiq/mewI bjMGigx4XKdI1ZWorP1L0ZBtvhcSyPXgKYErUpi1GffgfXlvqqqCi6hKEtxtXc1HrhmE tc1mI3n7MSu+sPvzNA94aB2N6P29RGOdsa7lqLit1heirKT6hrO3y1jck1ZyXnzOXZDB QWT20uFAz0xcV4AnEbsxHB4LNVyiD3DmlUSXxDIysmj2Bf7pkGagLxCIJ+buQ7Iy1l4n Vz19kJFfb2PZ6Si37Oer7YuOwmgKkhX6qjI4hebftj5v48olfUVLH03lE7gidv3aYan4 CAQQ== X-Gm-Message-State: APjAAAWR9nbjJAhdqzYdbrlt0v5qCNXU4KL9L8kv2URwI2WKedpkaeLt tziGNLAFttY+Z65nqr0nKyZsNdzFUaj1+g== X-Google-Smtp-Source: APXvYqyIV/o92HQoNA1SwD3Fbi4Bmmp7bKwD0yiU6Q6KoSW/RJpweLxWxxdfI+xIE2FJ3F9qtPelAA== X-Received: by 2002:a1c:48c1:: with SMTP id v184mr5517173wma.5.1582907942412; Fri, 28 Feb 2020 08:39:02 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 17/33] target/arm: Move the vfp decodetree calls next to the base isa Date: Fri, 28 Feb 2020 16:38:24 +0000 Message-Id: <20200228163840.23585-18-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200228163840.23585-1-peter.maydell@linaro.org> References: <20200228163840.23585-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32d X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Richard Henderson Have the calls adjacent as an intermediate step toward actually merging the decodes. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-id: 20200224222232.13807-13-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate.c | 83 +++++++++++++++--------------------------- 1 file changed, 29 insertions(+), 54 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index 5b7cad1ea2d..6259064ea7c 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -2646,31 +2646,6 @@ static void gen_neon_dup_high16(TCGv_i32 var) tcg_temp_free_i32(tmp); } =20 -/* - * Disassemble a VFP instruction. Returns nonzero if an error occurred - * (ie. an undefined instruction). - */ -static int disas_vfp_insn(DisasContext *s, uint32_t insn) -{ - /* - * If the decodetree decoder handles this insn it will always - * emit code to either execute the insn or generate an appropriate - * exception; so we don't need to ever return non-zero to tell - * the calling code to emit an UNDEF exception. - */ - if (extract32(insn, 28, 4) =3D=3D 0xf) { - if (disas_vfp_uncond(s, insn)) { - return 0; - } - } else { - if (disas_vfp(s, insn)) { - return 0; - } - } - /* If the decodetree decoder didn't handle this insn, it must be UNDEF= */ - return 1; -} - static inline bool use_goto_tb(DisasContext *s, target_ulong dest) { #ifndef CONFIG_USER_ONLY @@ -10778,7 +10753,9 @@ static void disas_arm_insn(DisasContext *s, unsigne= d int insn) ARCH(5); =20 /* Unconditional instructions. */ - if (disas_a32_uncond(s, insn)) { + /* TODO: Perhaps merge these into one decodetree output file. */ + if (disas_a32_uncond(s, insn) || + disas_vfp_uncond(s, insn)) { return; } /* fall back to legacy decoder */ @@ -10805,13 +10782,6 @@ static void disas_arm_insn(DisasContext *s, unsign= ed int insn) } return; } - if ((insn & 0x0f000e10) =3D=3D 0x0e000a00) { - /* VFP. */ - if (disas_vfp_insn(s, insn)) { - goto illegal_op; - } - return; - } if ((insn & 0x0e000f00) =3D=3D 0x0c000100) { if (arm_dc_feature(s, ARM_FEATURE_IWMMXT)) { /* iWMMXt register transfer. */ @@ -10842,7 +10812,9 @@ static void disas_arm_insn(DisasContext *s, unsigne= d int insn) arm_skip_unless(s, cond); } =20 - if (disas_a32(s, insn)) { + /* TODO: Perhaps merge these into one decodetree output file. */ + if (disas_a32(s, insn) || + disas_vfp(s, insn)) { return; } /* fall back to legacy decoder */ @@ -10852,11 +10824,10 @@ static void disas_arm_insn(DisasContext *s, unsig= ned int insn) case 0xd: case 0xe: if (((insn >> 8) & 0xe) =3D=3D 10) { - /* VFP. */ - if (disas_vfp_insn(s, insn)) { - goto illegal_op; - } - } else if (disas_coproc_insn(s, insn)) { + /* VFP, but failed disas_vfp. */ + goto illegal_op; + } + if (disas_coproc_insn(s, insn)) { /* Coprocessor. */ goto illegal_op; } @@ -10945,7 +10916,14 @@ static void disas_thumb2_insn(DisasContext *s, uin= t32_t insn) ARCH(6T2); } =20 - if (disas_t32(s, insn)) { + /* + * TODO: Perhaps merge these into one decodetree output file. + * Note disas_vfp is written for a32 with cond field in the + * top nibble. The t32 encoding requires 0xe in the top nibble. + */ + if (disas_t32(s, insn) || + disas_vfp_uncond(s, insn) || + ((insn >> 28) =3D=3D 0xe && disas_vfp(s, insn))) { return; } /* fall back to legacy decoder */ @@ -10962,17 +10940,15 @@ static void disas_thumb2_insn(DisasContext *s, ui= nt32_t insn) goto illegal_op; /* op0 =3D 0b11 : unallocated */ } =20 - if (disas_vfp_insn(s, insn)) { - if (((insn >> 8) & 0xe) =3D=3D 10 && - dc_isar_feature(aa32_fpsp_v2, s)) { - /* FP, and the CPU supports it */ - goto illegal_op; - } else { - /* All other insns: NOCP */ - gen_exception_insn(s, s->pc_curr, EXCP_NOCP, - syn_uncategorized(), - default_exception_el(s)); - } + if (((insn >> 8) & 0xe) =3D=3D 10 && + dc_isar_feature(aa32_fpsp_v2, s)) { + /* FP, and the CPU supports it */ + goto illegal_op; + } else { + /* All other insns: NOCP */ + gen_exception_insn(s, s->pc_curr, EXCP_NOCP, + syn_uncategorized(), + default_exception_el(s)); } break; } @@ -10995,9 +10971,8 @@ static void disas_thumb2_insn(DisasContext *s, uint= 32_t insn) goto illegal_op; } } else if (((insn >> 8) & 0xe) =3D=3D 10) { - if (disas_vfp_insn(s, insn)) { - goto illegal_op; - } + /* VFP, but failed disas_vfp. */ + goto illegal_op; } else { if (insn & (1 << 28)) goto illegal_op; --=20 2.20.1