From nobody Thu Nov 13 22:09:57 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1582648773; cv=none; d=zohomail.com; s=zohoarc; b=CjlZ2taNmgcjUCuuzFoJ4F/Z338mqoPHbnMxx7vF0DMBE2sO2GhDfoveRqcfQg8LFjuFJ/tBkBZBf8G8mFq0TJZiRU1pXsGeMtMxI/9MwBxlhpH6c5kY/6WPdzUqb9zyjSODYQ2ydACeF4pFNJQJobDcdwXAyyOQHuRT6K6VHG4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582648773; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=9et6CYLVOWf/Jq5yLPuq4lJ1LvCdxG33mYzAAZM5hJw=; b=lZIGLjBqPJzl26sUHi1QVwkuvIKudwYFdhrJNoHObGbqlSnAcK3NvoR1iuy9mBhoLYZVE5dJj3wPdFN54NM/XSc/TTjD95duP9Y6nAQAIDPd6ewa3byMf/sN24+UoiDqvaCB4XjREtefySSBBf2kZ6UKXmwXV6RG7wEtHwM98cc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 158264877311482.08842302486983; Tue, 25 Feb 2020 08:39:33 -0800 (PST) Received: from localhost ([::1]:60110 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6dF5-0007RE-Up for importer@patchew.org; Tue, 25 Feb 2020 11:39:31 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:42795) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6dDm-00060O-D0 for qemu-devel@nongnu.org; Tue, 25 Feb 2020 11:38:13 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j6dDj-0004NZ-W1 for qemu-devel@nongnu.org; Tue, 25 Feb 2020 11:38:10 -0500 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]:33236) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j6dDj-0004Mu-Na for qemu-devel@nongnu.org; Tue, 25 Feb 2020 11:38:07 -0500 Received: by mail-wm1-x336.google.com with SMTP id m10so2593839wmc.0 for ; Tue, 25 Feb 2020 08:38:05 -0800 (PST) Received: from donizetti.lan ([2001:b07:6468:f312:3577:1cfe:d98a:5fb6]) by smtp.gmail.com with ESMTPSA id q6sm18171398wrf.67.2020.02.25.08.38.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Feb 2020 08:38:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9et6CYLVOWf/Jq5yLPuq4lJ1LvCdxG33mYzAAZM5hJw=; b=qYXF1pfMEWvE6DKJUCEcLx5uvzAMFVYm97etqvVLcOkTP5NzlaEnPVw80iJtYCii8Y hPOHP7niBwFTjj3LSAbpCCerHYgpGdWrPAbZwRoGKuCZjufiMs9Nld0VU4t0e5P3Vy0j z/n3jnxHHPI6GCUQ+lQ6oJiN8e+PD7v7xxLWvyRswYuCtJaUtZ3aapngutUAFLbnzakF 7DQ8Im2IUAGPW/w/2aADV1xn6nRzP5bhChXcM1rea39tk782Ua8LET0EX7CjYKwcaTp8 Y2U9PqwOPXqilSGYQIZmkBg+S22UqwbuBegeEBajQoLiEpCloifQGzNjGV7uJ0gnzO6T bCGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=9et6CYLVOWf/Jq5yLPuq4lJ1LvCdxG33mYzAAZM5hJw=; b=jZKF+LaJW7pRA3T3C0/Ck2GDYnoEG51wWGHj0bTsUXdX3cZCwS5yPF8zU4VhARWMAQ cTX84yUSMaXXTq0FNlt8bzaWU56kO6m+kVlEQVbf98fmycYq9AO1rKun1ztXp5W61voi 0OeXX8caxU/ONQWNMHNfSM108kbl8fQ2KouwxTSPCSutR2hgMuY51tqZzECJ1uKw7mzW RWNaBhecINE3kTVTt3JfvjFrCqbSQHQfo0Zo0XOL20cguiWT/CDsRHPdcrkBjHLDFX5s scdDh5nAGgkgVtlT9LBvoWRGe0cClyokolazaRKFhc6cIXFEPEJHEeGNK+JuvsFqIHs5 JBmA== X-Gm-Message-State: APjAAAWz3P1xLcS+EyZaceQQ6Wn3kD30QiCeNirzURSxS8DZAY4pN5Db qFFzxUIqMagne5hE5kTI0xvBqEX3 X-Google-Smtp-Source: APXvYqy6iCCTJRQG81tfnRDbvVaig906wEQl3eZZROf0WSGXCocNkUkako3ZtWqSav6J+cnxSNf16w== X-Received: by 2002:a05:600c:230d:: with SMTP id 13mr123264wmo.13.1582648681371; Tue, 25 Feb 2020 08:38:01 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PATCH 2/4] docs: system: split CPU models doc between MIPS and x86 parts Date: Tue, 25 Feb 2020 17:37:56 +0100 Message-Id: <20200225163758.12996-3-pbonzini@redhat.com> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200225163758.12996-1-pbonzini@redhat.com> References: <20200225163758.12996-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::336 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" The MIPS CPU models end up in the middle of the PC documentation. Move them to a separate file so that they can be placed in the right section. The man page still includes both x86 and MIPS content. Signed-off-by: Paolo Bonzini --- Makefile | 11 +- docs/system/cpu-models-mips.texi | 200 +++++++++++++++ .../cpu-models-x86.texi} | 232 ------------------ docs/system/qemu-cpu-models.texi | 28 +++ qemu-doc.texi | 8 +- 5 files changed, 238 insertions(+), 241 deletions(-) create mode 100644 docs/system/cpu-models-mips.texi rename docs/{qemu-cpu-models.texi =3D> system/cpu-models-x86.texi} (71%) create mode 100644 docs/system/qemu-cpu-models.texi diff --git a/Makefile b/Makefile index 15f8e53d05..1facf0ce18 100644 --- a/Makefile +++ b/Makefile @@ -354,7 +354,7 @@ endif DOCS+=3D$(MANUAL_BUILDDIR)/system/qemu-block-drivers.7 DOCS+=3Ddocs/interop/qemu-qmp-ref.html docs/interop/qemu-qmp-ref.txt docs/= interop/qemu-qmp-ref.7 DOCS+=3Ddocs/interop/qemu-ga-ref.html docs/interop/qemu-ga-ref.txt docs/in= terop/qemu-ga-ref.7 -DOCS+=3Ddocs/qemu-cpu-models.7 +DOCS+=3Ddocs/system/qemu-cpu-models.7 DOCS+=3D$(MANUAL_BUILDDIR)/index.html ifdef CONFIG_VIRTFS DOCS+=3D$(MANUAL_BUILDDIR)/interop/virtfs-proxy-helper.1 @@ -780,7 +780,7 @@ distclean: clean rm -f docs/interop/qemu-qmp-ref.txt docs/interop/qemu-ga-ref.txt rm -f docs/interop/qemu-qmp-ref.pdf docs/interop/qemu-ga-ref.pdf rm -f docs/interop/qemu-qmp-ref.html docs/interop/qemu-ga-ref.html - rm -f docs/qemu-cpu-models.7 + rm -f docs/system/qemu-cpu-models.7 rm -rf .doctrees $(call clean-manual,devel) $(call clean-manual,interop) @@ -857,7 +857,7 @@ ifdef CONFIG_POSIX $(INSTALL_DIR) "$(DESTDIR)$(mandir)/man7" $(INSTALL_DATA) docs/interop/qemu-qmp-ref.7 "$(DESTDIR)$(mandir)/man7" $(INSTALL_DATA) $(MANUAL_BUILDDIR)/system/qemu-block-drivers.7 "$(DESTDIR= )$(mandir)/man7" - $(INSTALL_DATA) docs/qemu-cpu-models.7 "$(DESTDIR)$(mandir)/man7" + $(INSTALL_DATA) docs/system/qemu-cpu-models.7 "$(DESTDIR)$(mandir)/man7" ifeq ($(CONFIG_TOOLS),y) $(INSTALL_DATA) $(MANUAL_BUILDDIR)/interop/qemu-img.1 "$(DESTDIR)$(mandir= )/man1" $(INSTALL_DIR) "$(DESTDIR)$(mandir)/man8" @@ -1098,7 +1098,7 @@ docs/interop/qemu-ga-qapi.texi: qga/qapi-generated/qg= a-qapi-doc.texi =20 qemu.1: qemu-doc.texi qemu-options.texi qemu-monitor.texi qemu-monitor-inf= o.texi qemu.1: qemu-option-trace.texi -docs/qemu-cpu-models.7: docs/qemu-cpu-models.texi +docs/system/qemu-cpu-models.7: docs/system/qemu-cpu-models.texi docs/syste= m/cpu-models-x86.texi docs/system/cpu-models-mips.texi =20 html: qemu-doc.html docs/interop/qemu-qmp-ref.html docs/interop/qemu-ga-re= f.html sphinxdocs info: qemu-doc.info docs/interop/qemu-qmp-ref.info docs/interop/qemu-ga-re= f.info @@ -1110,7 +1110,8 @@ qemu-doc.html qemu-doc.info qemu-doc.pdf qemu-doc.txt= : \ qemu-tech.texi qemu-option-trace.texi \ qemu-deprecated.texi qemu-monitor.texi \ qemu-monitor-info.texi \ - docs/qemu-cpu-models.texi docs/security.texi + docs/system/cpu-models-x86.texi docs/system/cpu-models-mips.texi \ + docs/security.texi =20 docs/interop/qemu-ga-ref.dvi docs/interop/qemu-ga-ref.html \ docs/interop/qemu-ga-ref.info docs/interop/qemu-ga-ref.pdf \ diff --git a/docs/system/cpu-models-mips.texi b/docs/system/cpu-models-mips= .texi new file mode 100644 index 0000000000..4cfa9118ed --- /dev/null +++ b/docs/system/cpu-models-mips.texi @@ -0,0 +1,200 @@ +@node recommendations_cpu_models_MIPS +@subsection Supported CPU model configurations on MIPS hosts + +QEMU supports variety of MIPS CPU models: + +@menu +* cpu_models_MIPS32:: Supported CPU models for MIPS32 hosts +* cpu_models_MIPS64:: Supported CPU models for MIPS64 hosts +* cpu_models_nanoMIPS:: Supported CPU models for nanoMIPS hosts +* preferred_cpu_models_MIPS:: Preferred CPU models for MIPS hosts +@end menu + +@node cpu_models_MIPS32 +@subsubsection Supported CPU models for MIPS32 hosts + +The following CPU models are supported for use on MIPS32 hosts. Administra= tors / +applications are recommended to use the CPU model that matches the generat= ion +of the host CPUs in use. In a deployment with a mixture of host CPU models +between machines, if live migration compatibility is required, use the new= est +CPU model that is compatible across all desired hosts. + +@table @option +@item @code{mips32r6-generic} + +MIPS32 Processor (Release 6, 2015) + + +@item @code{P5600} + +MIPS32 Processor (P5600, 2014) + + +@item @code{M14K} +@item @code{M14Kc} + +MIPS32 Processor (M14K, 2009) + + +@item @code{74Kf} + +MIPS32 Processor (74K, 2007) + + +@item @code{34Kf} + +MIPS32 Processor (34K, 2006) + + +@item @code{24Kc} +@item @code{24KEc} +@item @code{24Kf} + +MIPS32 Processor (24K, 2003) + + +@item @code{4Kc} +@item @code{4Km} +@item @code{4KEcR1} +@item @code{4KEmR1} +@item @code{4KEc} +@item @code{4KEm} + +MIPS32 Processor (4K, 1999) +@end table + +@node cpu_models_MIPS64 +@subsubsection Supported CPU models for MIPS64 hosts + +The following CPU models are supported for use on MIPS64 hosts. Administra= tors / +applications are recommended to use the CPU model that matches the generat= ion +of the host CPUs in use. In a deployment with a mixture of host CPU models +between machines, if live migration compatibility is required, use the new= est +CPU model that is compatible across all desired hosts. + +@table @option +@item @code{I6400} + +MIPS64 Processor (Release 6, 2014) + + +@item @code{Loongson-2F} + +MIPS64 Processor (Loongson 2, 2008) + + +@item @code{Loongson-2E} + +MIPS64 Processor (Loongson 2, 2006) + + +@item @code{mips64dspr2} + +MIPS64 Processor (Release 2, 2006) + + +@item @code{MIPS64R2-generic} +@item @code{5KEc} +@item @code{5KEf} + +MIPS64 Processor (Release 2, 2002) + + +@item @code{20Kc} + +MIPS64 Processor (20K, 2000) + + +@item @code{5Kc} +@item @code{5Kf} + +MIPS64 Processor (5K, 1999) + + +@item @code{VR5432} + +MIPS64 Processor (VR, 1998) + + +@item @code{R4000} + +MIPS64 Processor (MIPS III, 1991) +@end table + +@node cpu_models_nanoMIPS +@subsubsection Supported CPU models for nanoMIPS hosts + +The following CPU models are supported for use on nanoMIPS hosts. Administ= rators / +applications are recommended to use the CPU model that matches the generat= ion +of the host CPUs in use. In a deployment with a mixture of host CPU models +between machines, if live migration compatibility is required, use the new= est +CPU model that is compatible across all desired hosts. + +@table @option +@item @code{I7200} + +MIPS I7200 (nanoMIPS, 2018) + +@end table + +@node preferred_cpu_models_MIPS +@subsubsection Preferred CPU models for MIPS hosts + +The following CPU models are preferred for use on different MIPS hosts: + +@table @option +@item @code{MIPS III} +R4000 + +@item @code{MIPS32R2} +34Kf + +@item @code{MIPS64R6} +I6400 + +@item @code{nanoMIPS} +I7200 +@end table + +@node cpu_model_syntax_apps +@subsection Syntax for configuring CPU models + +The example below illustrate the approach to configuring the various +CPU models / features in QEMU and libvirt + +@menu +* cpu_model_syntax_qemu:: QEMU command line +* cpu_model_syntax_libvirt:: Libvirt guest XML +@end menu + +@node cpu_model_syntax_qemu +@subsubsection QEMU command line + +@table @option + +@item Host passthrough + +@example + $ @value{qemu_system_x86} -cpu host +@end example + +With feature customization: + +@example + $ @value{qemu_system_x86} -cpu host,-vmx,... +@end example + +@item Named CPU models + +@example + $ @value{qemu_system_x86} -cpu Westmere +@end example + +With feature customization: + +@example + $ @value{qemu_system_x86} -cpu Westmere,+pcid,... +@end example + +@end table + diff --git a/docs/qemu-cpu-models.texi b/docs/system/cpu-models-x86.texi similarity index 71% rename from docs/qemu-cpu-models.texi rename to docs/system/cpu-models-x86.texi index f88a1def0d..9d832da0d3 100644 --- a/docs/qemu-cpu-models.texi +++ b/docs/system/cpu-models-x86.texi @@ -1,17 +1,3 @@ -@c man begin SYNOPSIS -QEMU / KVM CPU model configuration -@c man end - -@set qemu_system_x86 qemu-system-x86_64 - -@c man begin DESCRIPTION - -@menu -* recommendations_cpu_models_x86:: Recommendations for KVM CPU model conf= iguration on x86 hosts -* recommendations_cpu_models_MIPS:: Supported CPU model configurations on = MIPS hosts -* cpu_model_syntax_apps:: Syntax for configuring CPU models -@end menu - QEMU / KVM virtualization supports two ways to configure CPU models =20 @table @option @@ -403,206 +389,6 @@ hardware assisted virtualization, that should thus no= t be required for running virtual machines. @end table =20 -@node recommendations_cpu_models_MIPS -@subsection Supported CPU model configurations on MIPS hosts - -QEMU supports variety of MIPS CPU models: - -@menu -* cpu_models_MIPS32:: Supported CPU models for MIPS32 hosts -* cpu_models_MIPS64:: Supported CPU models for MIPS64 hosts -* cpu_models_nanoMIPS:: Supported CPU models for nanoMIPS hosts -* preferred_cpu_models_MIPS:: Preferred CPU models for MIPS hosts -@end menu - -@node cpu_models_MIPS32 -@subsubsection Supported CPU models for MIPS32 hosts - -The following CPU models are supported for use on MIPS32 hosts. Administra= tors / -applications are recommended to use the CPU model that matches the generat= ion -of the host CPUs in use. In a deployment with a mixture of host CPU models -between machines, if live migration compatibility is required, use the new= est -CPU model that is compatible across all desired hosts. - -@table @option -@item @code{mips32r6-generic} - -MIPS32 Processor (Release 6, 2015) - - -@item @code{P5600} - -MIPS32 Processor (P5600, 2014) - - -@item @code{M14K} -@item @code{M14Kc} - -MIPS32 Processor (M14K, 2009) - - -@item @code{74Kf} - -MIPS32 Processor (74K, 2007) - - -@item @code{34Kf} - -MIPS32 Processor (34K, 2006) - - -@item @code{24Kc} -@item @code{24KEc} -@item @code{24Kf} - -MIPS32 Processor (24K, 2003) - - -@item @code{4Kc} -@item @code{4Km} -@item @code{4KEcR1} -@item @code{4KEmR1} -@item @code{4KEc} -@item @code{4KEm} - -MIPS32 Processor (4K, 1999) -@end table - -@node cpu_models_MIPS64 -@subsubsection Supported CPU models for MIPS64 hosts - -The following CPU models are supported for use on MIPS64 hosts. Administra= tors / -applications are recommended to use the CPU model that matches the generat= ion -of the host CPUs in use. In a deployment with a mixture of host CPU models -between machines, if live migration compatibility is required, use the new= est -CPU model that is compatible across all desired hosts. - -@table @option -@item @code{I6400} - -MIPS64 Processor (Release 6, 2014) - - -@item @code{Loongson-2F} - -MIPS64 Processor (Loongson 2, 2008) - - -@item @code{Loongson-2E} - -MIPS64 Processor (Loongson 2, 2006) - - -@item @code{mips64dspr2} - -MIPS64 Processor (Release 2, 2006) - - -@item @code{MIPS64R2-generic} -@item @code{5KEc} -@item @code{5KEf} - -MIPS64 Processor (Release 2, 2002) - - -@item @code{20Kc} - -MIPS64 Processor (20K, 2000) - - -@item @code{5Kc} -@item @code{5Kf} - -MIPS64 Processor (5K, 1999) - - -@item @code{VR5432} - -MIPS64 Processor (VR, 1998) - - -@item @code{R4000} - -MIPS64 Processor (MIPS III, 1991) -@end table - -@node cpu_models_nanoMIPS -@subsubsection Supported CPU models for nanoMIPS hosts - -The following CPU models are supported for use on nanoMIPS hosts. Administ= rators / -applications are recommended to use the CPU model that matches the generat= ion -of the host CPUs in use. In a deployment with a mixture of host CPU models -between machines, if live migration compatibility is required, use the new= est -CPU model that is compatible across all desired hosts. - -@table @option -@item @code{I7200} - -MIPS I7200 (nanoMIPS, 2018) - -@end table - -@node preferred_cpu_models_MIPS -@subsubsection Preferred CPU models for MIPS hosts - -The following CPU models are preferred for use on different MIPS hosts: - -@table @option -@item @code{MIPS III} -R4000 - -@item @code{MIPS32R2} -34Kf - -@item @code{MIPS64R6} -I6400 - -@item @code{nanoMIPS} -I7200 -@end table - -@node cpu_model_syntax_apps -@subsection Syntax for configuring CPU models - -The example below illustrate the approach to configuring the various -CPU models / features in QEMU and libvirt - -@menu -* cpu_model_syntax_qemu:: QEMU command line -* cpu_model_syntax_libvirt:: Libvirt guest XML -@end menu - -@node cpu_model_syntax_qemu -@subsubsection QEMU command line - -@table @option - -@item Host passthrough - -@example - $ @value{qemu_system_x86} -cpu host -@end example - -With feature customization: - -@example - $ @value{qemu_system_x86} -cpu host,-vmx,... -@end example - -@item Named CPU models - -@example - $ @value{qemu_system_x86} -cpu Westmere -@end example - -With feature customization: - -@example - $ @value{qemu_system_x86} -cpu Westmere,+pcid,... -@end example - -@end table - @node cpu_model_syntax_libvirt @subsubsection Libvirt guest XML =20 @@ -657,21 +443,3 @@ With feature customization: @end example =20 @end table - -@c man end - -@ignore - -@setfilename qemu-cpu-models -@settitle QEMU / KVM CPU model configuration - -@c man begin SEEALSO -The HTML documentation of QEMU for more precise information and Linux -user mode emulator invocation. -@c man end - -@c man begin AUTHOR -Daniel P. Berrange -@c man end - -@end ignore diff --git a/docs/system/qemu-cpu-models.texi b/docs/system/qemu-cpu-models= .texi new file mode 100644 index 0000000000..f399daf944 --- /dev/null +++ b/docs/system/qemu-cpu-models.texi @@ -0,0 +1,28 @@ +@c man begin SYNOPSIS +QEMU / KVM CPU model configuration +@c man end + +@set qemu_system_x86 qemu-system-x86_64 + +@c man begin DESCRIPTION + +@include cpu-models-x86.texi +@include cpu-models-mips.texi + +@c man end + +@ignore + +@setfilename qemu-cpu-models +@settitle QEMU / KVM CPU model configuration + +@c man begin SEEALSO +The HTML documentation of QEMU for more precise information and Linux +user mode emulator invocation. +@c man end + +@c man begin AUTHOR +Daniel P. Berrange +@c man end + +@end ignore diff --git a/qemu-doc.texi b/qemu-doc.texi index 56d3e57cfb..41581e7996 100644 --- a/qemu-doc.texi +++ b/qemu-doc.texi @@ -615,10 +615,7 @@ The monitor understands integers expressions for every= integer argument. You can use register names to get the value of specifics CPU registers by prefixing them with @emph{$}. =20 -@node cpu_models -@section CPU models - -@include docs/qemu-cpu-models.texi +@include docs/system/cpu-models-x86.texi =20 @node disk_images @section Disk Images @@ -1865,6 +1862,7 @@ Set the emulated machine type. The default is sun4u. @cindex system emulation (MIPS) =20 @menu +* recommendations_cpu_models_MIPS:: Supported CPU model configurations on = MIPS hosts * nanoMIPS System emulator :: @end menu =20 @@ -1981,6 +1979,8 @@ PC style serial port MIPSnet network emulation @end itemize =20 +@include docs/system/cpu-models-mips.texi + @node nanoMIPS System emulator @subsection nanoMIPS System emulator @cindex system emulation (nanoMIPS) --=20 2.21.1