From nobody Thu Apr 18 04:22:12 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 158169184799884.09177221221819; Fri, 14 Feb 2020 06:50:47 -0800 (PST) Received: from localhost ([::1]:39836 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2cIn-0005x1-TT for importer@patchew.org; Fri, 14 Feb 2020 09:50:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40826) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2cI9-0005P3-K1 for qemu-devel@nongnu.org; Fri, 14 Feb 2020 09:50:06 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2cI8-0002Pv-Bh for qemu-devel@nongnu.org; Fri, 14 Feb 2020 09:50:05 -0500 Received: from mail-wr1-x442.google.com ([2a00:1450:4864:20::442]:40538) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2cI8-0002PK-56 for qemu-devel@nongnu.org; Fri, 14 Feb 2020 09:50:04 -0500 Received: by mail-wr1-x442.google.com with SMTP id t3so11205156wru.7 for ; Fri, 14 Feb 2020 06:50:03 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id v15sm7503364wrf.7.2020.02.14.06.50.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Feb 2020 06:50:01 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 94F191FF87; Fri, 14 Feb 2020 14:50:00 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=XBkXQnBXYSP4BiwHYOKQK8ClQtNOT853ujia7Eh5EQs=; b=KeqdMZ2CFq3gk6/f9AePDxdvy0dWSzv3YbcInP0faprUm1CFjIrSfKQsIFrV55ncZi 24xhxcRL71eX1dCvIAKXRfyyFbLxXWkDbYpTjTb9JnGlUUYzMkqXnVP1JhYe2+M5kBq4 TUJ2PrqhI/NyGezCfDqt2oslxqQgh/0To5esFpI9Sle4sPZawTk8j/fl7x16TqZt89fF vI7D5ylRN2CRqFJnVY9Eh2UZDT/a93bjDOWwq4oZEKBRC9hRfZrYsae09wIkhlwCxazq IjvfOTe85ZCPdG+BXfwmkWJFtxf8J7ARB+Y3RazwDuS/xJ3jCKMxJ/cfq9Dq8r0gqNzp qc+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=XBkXQnBXYSP4BiwHYOKQK8ClQtNOT853ujia7Eh5EQs=; b=Ona4nRk/4iug7f6uD/5h1zf5Nb3+kuvVfXpv6+urLl6RtbvXsnpMr3Kc6/LS8+fZ5J 40BjXDxquLHt2PkG68afZbTYfHaWvXdbZTNKVTFL4Y7U8MDYgLvbYvrD1Elz+6B28MC8 QkWLrqLeMNBWYCT/06OPUcEuADFbhvs8kuYivdHYDIIycBVqN/ewh0NbPzU+e15U/+YF HTU7nzy0hJB2JQh/OXT+KlFHsw2XIQxvt/DyJFijIW9T4WsDPZg0ax7l69Yb06cw0d96 gGkjdr8LnzFUMAJHloC1VYuMoNrJQ5EB0XqmCpw7+leRlyNr6XW/fEA5WOq4hNtW9dBM ObPg== X-Gm-Message-State: APjAAAXURx6dd9yphag5eWhg5GlPUi2cKlZNLafMUnIRm0QBxWFxAp4t ieCWmM/inKVoRQBztq2D6DcrBg== X-Google-Smtp-Source: APXvYqy7rzmZl5QJ3Tf5Xdvzqb8R998llxIfeIqrX5Vw25vk4e09QZNdlWWJSov1D6nPikJc4fiTwA== X-Received: by 2002:a5d:5263:: with SMTP id l3mr4339294wrc.405.1581691802553; Fri, 14 Feb 2020 06:50:02 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH] accel/tcg: fix race in cpu_exec_step_atomic (bug 1863025) Date: Fri, 14 Feb 2020 14:49:52 +0000 Message-Id: <20200214144952.15502-1-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::442 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bug 1863025 <1863025@bugs.launchpad.net>, Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Yifan , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) The bug describes a race whereby cpu_exec_step_atomic can acquire a TB which is invalidated by a tb_flush before we execute it. This doesn't affect the other cpu_exec modes as a tb_flush by it's nature can only occur on a quiescent system. The race was described as: B2. tcg_cpu_exec =3D> cpu_exec =3D> tb_find =3D> tb_gen_code B3. tcg_tb_alloc obtains a new TB C3. TB obtained with tb_lookup__cpu_state or tb_gen_code (same TB as B2) A3. start_exclusive critical section entered A4. do_tb_flush is called, TB memory freed/re-allocated A5. end_exclusive exits critical section B2. tcg_cpu_exec =3D> cpu_exec =3D> tb_find =3D> tb_gen_code B3. tcg_tb_alloc reallocates TB from B2 C4. start_exclusive critical section entered C5. cpu_tb_exec executes the TB code that was free in A4 The simplest fix is to widen the exclusive period to include the TB lookup. As a result we can drop the complication of checking we are in the exclusive region before we end it. Signed-off-by: Alex Benn=C3=A9e Cc: Yifan Cc: Bug 1863025 <1863025@bugs.launchpad.net> Reviewed-by: Paolo Bonzini --- accel/tcg/cpu-exec.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 2560c90eec7..d95c4848a47 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -240,6 +240,8 @@ void cpu_exec_step_atomic(CPUState *cpu) uint32_t cf_mask =3D cflags & CF_HASH_MASK; =20 if (sigsetjmp(cpu->jmp_env, 0) =3D=3D 0) { + start_exclusive(); + tb =3D tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask); if (tb =3D=3D NULL) { mmap_lock(); @@ -247,8 +249,6 @@ void cpu_exec_step_atomic(CPUState *cpu) mmap_unlock(); } =20 - start_exclusive(); - /* Since we got here, we know that parallel_cpus must be true. */ parallel_cpus =3D false; cc->cpu_exec_enter(cpu); @@ -271,14 +271,15 @@ void cpu_exec_step_atomic(CPUState *cpu) qemu_plugin_disable_mem_helpers(cpu); } =20 - if (cpu_in_exclusive_context(cpu)) { - /* We might longjump out of either the codegen or the - * execution, so must make sure we only end the exclusive - * region if we started it. - */ - parallel_cpus =3D true; - end_exclusive(); - } + + /* + * As we start the exclusive region before codegen we must still + * be in the region if we longjump out of either the codegen or + * the execution. + */ + g_assert(cpu_in_exclusive_context(cpu)); + parallel_cpus =3D true; + end_exclusive(); } =20 struct tb_desc { --=20 2.20.1