From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581605040146333.24568016507305; Thu, 13 Feb 2020 06:44:00 -0800 (PST) Received: from localhost ([::1]:53730 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fig-0005xw-UU for importer@patchew.org; Thu, 13 Feb 2020 09:43:58 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60066) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fgi-0004Au-L5 for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:58 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fgg-0001Ow-9T for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:56 -0500 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]:42484) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fgf-0001Do-Vg for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:54 -0500 Received: by mail-wr1-x42c.google.com with SMTP id k11so6970095wrd.9 for ; Thu, 13 Feb 2020 06:41:50 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.41.48 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:41:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=f8MVuQbyXMPSpPZbTgaHloaqevQsik5k4zRik3DAIMk=; b=i4k24XMH0VZiu9Y5QgNyCsLQsN55yZWKvAjGwnviXsZMcW9f0brdqRMiYEnxEsn4Fl YifVxG5CuerHeWCSps380NwbN6jcN0+2n6Q0apy+obCB4QFU6EAQzhR+7TJhEuTXeMXT WJBi+hJuu9/f0DVd70Lpn9FWiF4VVzO1cIXapMtUeqDOZ/Ow8JTFxY+uEww3iIkP4tOK YXtynUBJ0Mfky4FEaOCtzLrIo30pkmKw9uLh5AUyUkUuu++fY625JKfWxc/aC/XMsOsg m6FXBQWytO0Anw5uAsUVGqy6s/II7AQgfcZlW4IO1PbQSWvY5zn71G6SovWmc8v97nQA VRXw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=f8MVuQbyXMPSpPZbTgaHloaqevQsik5k4zRik3DAIMk=; b=DlSGn+rCHLW9sXE1q/P3Hb4fzDV8UH6QwK6awB2c/b1KJUZWgu+ptXA9cVHowECW8f 2MOFr4SaxulwEHJ91s/3MxMcKaIFe/jBkJEQ1LL5RRmeCjoco24hM8zeI/StM0nvvnpD MY4efZZg7pdZbw9P0y65hyHyAMkZCBynv+1JBvRo+NjuU2rV+f34aQs1v2cO3ChVUIvi 9CarmUoFyoAXimYGfPvPy1iVoaWAu0r+bpzc0eXGYnZxdtwrmB3r3nTRa8NSgWspMKM8 okpWcg4uUWdH/cNfS+jNkCYsSpqw5GBz6Y5BqYGLD5uFerDTOfosV6l6nML4eKhLASsE JSAQ== X-Gm-Message-State: APjAAAUWKmGvCD+CDI55f6/j1CtXq5W6U5q6GdN6jyxCjfxdGxFaFWhD OdpdOf0mqU19CqiHVRFNTQBSDM9rkGc= X-Google-Smtp-Source: APXvYqyeO/M2dTS1CSFuECRCXDtOqmb5VqLYRRz4yUzcH2ZWOHHQJ9XD0Q406uH6snvv5JPwZHxZ1A== X-Received: by 2002:a5d:4fce:: with SMTP id h14mr24012683wrw.60.1581604909127; Thu, 13 Feb 2020 06:41:49 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 01/46] i.MX: Fix inverted register bits in wdt code. Date: Thu, 13 Feb 2020 14:41:00 +0000 Message-Id: <20200213144145.818-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Roman Kapl Documentation says for WDA '0: Assert WDOG output.' and for SRS '0: Assert system reset signal.'. Signed-off-by: Roman Kapl Message-id: 20200207095409.11227-1-rka@sysgo.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/misc/imx2_wdt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/misc/imx2_wdt.c b/hw/misc/imx2_wdt.c index 5576778a323..2aedfe803a4 100644 --- a/hw/misc/imx2_wdt.c +++ b/hw/misc/imx2_wdt.c @@ -29,7 +29,7 @@ static void imx2_wdt_write(void *opaque, hwaddr addr, uint64_t value, unsigned int size) { if (addr =3D=3D IMX2_WDT_WCR && - (value & (IMX2_WDT_WCR_WDA | IMX2_WDT_WCR_SRS))) { + (~value & (IMX2_WDT_WCR_WDA | IMX2_WDT_WCR_SRS))) { watchdog_perform_action(); } } --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581605412284351.80740634002984; Thu, 13 Feb 2020 06:50:12 -0800 (PST) Received: from localhost ([::1]:53872 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Foe-00055x-9Q for importer@patchew.org; Thu, 13 Feb 2020 09:50:08 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60072) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fgi-0004Av-RU for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:58 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fgh-0001Qh-Fr for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:56 -0500 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]:40369) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fgh-0001GD-5P for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:55 -0500 Received: by mail-wr1-x432.google.com with SMTP id t3so6978624wru.7 for ; Thu, 13 Feb 2020 06:41:51 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.41.49 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:41:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=kec+6YUQYfqYLzCYTZScAog/TIHEyy7ZDa+Goaadib4=; b=PbX0qO5sj8ysdGwyoOnslIPqIYt5Q3QW5o238rnLWVMmBUPFKUcriZWP9xES/Yfc5L 3yHOU41e/cguUoRHgvQk/FQEAZDe24odCEjHnMp45cDNn6AZlk7A87Zl6/9fW5/uP2Fm w4rIgLcZxC8FnhDi6nGVjNjhyld+qb2YxUosjhffkd0E3K0U+lvOuIjEZbVJgAFdK4RS TTKdSfK1mlbPzCr0tKPBvRLy7NTD3qtIoUEcGRtYtBXlsa7BcYpV1nOs6b+rLK7K73pi 4UOaqqm5bCR59XqSxNp6djI4g4ILx7KJHds8Ut/oEUmPw0urevokxoMbpOpQkjkoUDsN 4tLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kec+6YUQYfqYLzCYTZScAog/TIHEyy7ZDa+Goaadib4=; b=IeAjZ4Im7DatevAXf4Nyb8Fzwu5xZVuS1cTbOiO5ASqB3mSJpq4U4VV+WQ3UPBJFkp fRHZ2m4Lt+FAeDFa4S1SwVXaoOcw5I4Wxi99KWG60KMcMyH105p1QSC57LiSext8D5ec HD2ACaUST5ZbpR7pqs71ubHVVeDlVXDzMQPjr2XvTDd+wT5/AEorZlsaGGr1Kclte/bI AAfUmQiNGlVv255EbtfWJJL9zO5cDCHgpprhNQteT4xzqejXi0rWs3YILZx+OiLIfvaJ wnBSYHfT90ml2Fq4RKtaZtltU3OAjw5Y3YxUgZ46jKWb+aBFNDiAFuoLmwQ5uQBAIU/2 FVfg== X-Gm-Message-State: APjAAAUmSxRC3Ne/w6kmFb9/ujbXPmCmR2zpRKEdfekhfObS+FZLF2FK NEm3N9M8vgWSvhW+ggmkcBdVfA0WCrs= X-Google-Smtp-Source: APXvYqwvvQaeclkoFGqzmfO2NBPyFaFetpXzOwQm36Imw5cR+prg4nBn1nJ3Pm3epPMZfHNCoaTPqA== X-Received: by 2002:adf:e781:: with SMTP id n1mr23601555wrm.56.1581604910108; Thu, 13 Feb 2020 06:41:50 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 02/46] i.MX: Add support for WDT on i.MX6 Date: Thu, 13 Feb 2020 14:41:01 +0000 Message-Id: <20200213144145.818-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::432 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Roman Kapl Uses the i.MX2 rudimentary watchdog driver. Signed-off-by: Roman Kapl Message-id: 20200207095529.11309-1-rka@sysgo.com Reviewed-by: Peter Maydell [PMM: removed accidental duplicate #include line] Signed-off-by: Peter Maydell --- include/hw/arm/fsl-imx6.h | 3 +++ hw/arm/fsl-imx6.c | 21 +++++++++++++++++++++ 2 files changed, 24 insertions(+) diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h index 1265a55c3b0..60eadccb421 100644 --- a/include/hw/arm/fsl-imx6.h +++ b/include/hw/arm/fsl-imx6.h @@ -21,6 +21,7 @@ #include "hw/cpu/a9mpcore.h" #include "hw/misc/imx6_ccm.h" #include "hw/misc/imx6_src.h" +#include "hw/misc/imx2_wdt.h" #include "hw/char/imx_serial.h" #include "hw/timer/imx_gpt.h" #include "hw/timer/imx_epit.h" @@ -42,6 +43,7 @@ #define FSL_IMX6_NUM_GPIOS 7 #define FSL_IMX6_NUM_ESDHCS 4 #define FSL_IMX6_NUM_ECSPIS 5 +#define FSL_IMX6_NUM_WDTS 2 =20 typedef struct FslIMX6State { /*< private >*/ @@ -59,6 +61,7 @@ typedef struct FslIMX6State { IMXGPIOState gpio[FSL_IMX6_NUM_GPIOS]; SDHCIState esdhc[FSL_IMX6_NUM_ESDHCS]; IMXSPIState spi[FSL_IMX6_NUM_ECSPIS]; + IMX2WdtState wdt[FSL_IMX6_NUM_WDTS]; IMXFECState eth; MemoryRegion rom; MemoryRegion caam; diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index 552145b24ec..ecc62855f2b 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -91,6 +91,12 @@ static void fsl_imx6_init(Object *obj) sysbus_init_child_obj(obj, name, &s->spi[i], sizeof(s->spi[i]), TYPE_IMX_SPI); } + for (i =3D 0; i < FSL_IMX6_NUM_WDTS; i++) { + snprintf(name, NAME_SIZE, "wdt%d", i); + sysbus_init_child_obj(obj, name, &s->wdt[i], sizeof(s->wdt[i]), + TYPE_IMX2_WDT); + } + =20 sysbus_init_child_obj(obj, "eth", &s->eth, sizeof(s->eth), TYPE_IMX_EN= ET); } @@ -383,6 +389,21 @@ static void fsl_imx6_realize(DeviceState *dev, Error *= *errp) qdev_get_gpio_in(DEVICE(&s->a9mpcore), FSL_IMX6_ENET_MAC_1588_IRQ)); =20 + /* + * Watchdog + */ + for (i =3D 0; i < FSL_IMX6_NUM_WDTS; i++) { + static const hwaddr FSL_IMX6_WDOGn_ADDR[FSL_IMX6_NUM_WDTS] =3D { + FSL_IMX6_WDOG1_ADDR, + FSL_IMX6_WDOG2_ADDR, + }; + + object_property_set_bool(OBJECT(&s->wdt[i]), true, "realized", + &error_abort); + + sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0, FSL_IMX6_WDOGn_ADDR= [i]); + } + /* ROM memory */ memory_region_init_rom(&s->rom, NULL, "imx6.rom", FSL_IMX6_ROM_SIZE, &err); --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581605038838229.92560783796068; Thu, 13 Feb 2020 06:43:58 -0800 (PST) Received: from localhost ([::1]:53726 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fif-0005uT-8U for importer@patchew.org; Thu, 13 Feb 2020 09:43:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60062) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fgi-0004At-Io for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:57 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fgh-0001QH-Cv for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:56 -0500 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]:40363) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fgg-0001Jw-3X for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:55 -0500 Received: by mail-wr1-x42b.google.com with SMTP id t3so6978710wru.7 for ; Thu, 13 Feb 2020 06:41:52 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.41.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:41:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=5QW6Q1EJKNnfHRnGkMMq3g240uRrMtzhye8Daf9kap0=; b=pzwh0JRNzbgzXLuIIOn36aAf5N0rkLo+dd+BOgXKPjML24IRd/apN5rEnlhmkTkH9X fD69ZSNML4jKlH6+pK6Odcv+oWJ/uYoY6TWtpUQxLoXEUGYthpmh5eB78Pmql+zwfpv8 qP6dH3yH8Da1s+fA6KNjSVwvN58uI1ysrMAm0WQIDeONXGe08lmJZPjwwuIMewTHxF3+ ttSEPFtbXKiZNGNBvOvtD1H8OSQYRXZFN64wHJ+o8n31BuIGp+XhUslFQkAIa7zWdeZT E+TY4BNvTRII0QV5RXkli2vhb5R2A3x69R79oouTYcceFFMiEitKGjzQConhecEu9VuP wrXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5QW6Q1EJKNnfHRnGkMMq3g240uRrMtzhye8Daf9kap0=; b=eBGj8Xpobzkm4vuP2gdqJULZKCsZiwco15J5Df0j9swxSM8VS2VY4wRarwvs35baqp Wm+kwrQczO/Tm5GEXKApFqd+SseV5XRU5VZQiTe1+zB40LElJMM/xOAs8QnlgSkIyyVj h/KGF8CKUCuKlUUS0ebyyoOhL4RRwAOlG6E6Ik6g7jU1NmzMyI9RPjNss3FeaKRCDE0P SMKtw5ebPWUCgYzwx6ZRb8B++wnrrWUSWGe46PgUTf21W8SImoOaMgBODJRkAu1pngUI sxh8fBO+JfsFi8C034ieDWSLzJKCBC0FiVRtWMvCYtcLdgnklkcfSeC9FIojocWzttia pc4Q== X-Gm-Message-State: APjAAAWvkS+LJh0jviOt4UlDmDNBfcJyjghrCmeMjLP4xFf0w5EOY5jD 9136cdDzEz2dvL/APeyeWWdwXULk3Uc= X-Google-Smtp-Source: APXvYqztGyu3s8i3X8xYVHfovkIMdiGVfNGYiHwr5RYvXd5RKA4df+qv8ehBTQk/tFNr+SE1E/+8ig== X-Received: by 2002:adf:f986:: with SMTP id f6mr23124895wrr.182.1581604911259; Thu, 13 Feb 2020 06:41:51 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 03/46] bios-tables-test: prepare to change ARM virt ACPI DSDT Date: Thu, 13 Feb 2020 14:41:02 +0000 Message-Id: <20200213144145.818-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42b X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Heyi Guo We are going to change ARM virt ACPI DSDT table, which will cause make check to fail, so temporarily add related golden masters to ignore list. Signed-off-by: Heyi Guo Reviewed-by: Michael S. Tsirkin Message-id: 20200204014325.16279-2-guoheyi@huawei.com Signed-off-by: Peter Maydell --- tests/qtest/bios-tables-test-allowed-diff.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios= -tables-test-allowed-diff.h index dfb8523c8bf..32a401ae35f 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,4 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/virt/DSDT", +"tests/data/acpi/virt/DSDT.memhp", +"tests/data/acpi/virt/DSDT.numamem", --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581605221262342.46490057453093; Thu, 13 Feb 2020 06:47:01 -0800 (PST) Received: from localhost ([::1]:53812 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Flb-0001Ng-R1 for importer@patchew.org; Thu, 13 Feb 2020 09:46:59 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60092) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fgj-0004Ax-Ae for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:58 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fgh-0001RY-Sb for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:57 -0500 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]:36554) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fgh-0001M0-KZ for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:55 -0500 Received: by mail-wm1-x32e.google.com with SMTP id p17so7025003wma.1 for ; Thu, 13 Feb 2020 06:41:55 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.41.51 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:41:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=GmFMEgF1fTeT3DdHq7kQLyhzWA5CJUtbhKey5Au3480=; b=daqrNIt3h3x46atj8KbW8eEIA2rqZjU296ow02AF3dyR4M2spYuFPicdtdT75p2phv N3fK2hn5AFHgzI50pEAguGSfizhtBqKoC8mrsPrCnedtKYvh+wNU7K88JEL7qgngyqyE ElE4aJPBeulgivC57KmRzZ9pdxhd6m9SxlqQih3WFxoYXoHDxj/8EzjezcFSb5qKpENF M/bjuLHaNq4nw+McPxKhaHghCFnuvaH5YD0gePwT2QlZoxg/PfI0veCW0iG+p7hCsHi2 eNvtbJWS2+nPZBMySWAADEENEUEIEQj8Hndwk0WfR36iKVejibac6G2VeUMxenAIZ8ip gmvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GmFMEgF1fTeT3DdHq7kQLyhzWA5CJUtbhKey5Au3480=; b=rkQrZbjJO4bjZkQ+YeuSBxs1N7iBcUfLhwl05ybDBUZ7X5PIr8/dKdXMgOJrjeYi2X 5aY9pQOdrUIN4fPdTPjY7JzCA6k512j0wIw/Y11rWrZ9d96QDY2f4uvlhBqp+i/7+mE2 fO7DuJBnHdN8PqWn6otc9X4jMhkLAHHkyBiasIDkwaT+3AaA0BCOs4jbdLYV93f3Pdl2 mOLdInuq7p+ZC4qJVGbzCueSavraqneRmcwgehQg40xZLNrTkSSUfphIVoiM5uDogxvf OxhSkyfpQ4UZBY41t6F/eRQsOZSXO8mdNr3o8qpItwHY5OlTW29dgon7iVCum8dIUyFI 6ZDg== X-Gm-Message-State: APjAAAXsl34j/AUlvH5KbycAWSd2mw2SZlnl5dAwTuxwh9zIFztSPMh1 goiz6CLd8DyCeKqYJKg+0eZXDhe+yes= X-Google-Smtp-Source: APXvYqzsMru86Gdh+uUmBFf4cMofnhAcfSxno0HZ2Mc11D4tVSnb6pxHA0vuH04zETqPEGoqkvtlrQ== X-Received: by 2002:a7b:cbc8:: with SMTP id n8mr6250499wmi.35.1581604912311; Thu, 13 Feb 2020 06:41:52 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 04/46] arm/virt/acpi: remove meaningless sub device "RP0" from PCI0 Date: Thu, 13 Feb 2020 14:41:03 +0000 Message-Id: <20200213144145.818-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32e X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Heyi Guo The sub device "RP0" under PCI0 in ACPI/DSDT does not contain any method or property other than "_ADR", so it is safe to remove it. Signed-off-by: Heyi Guo Acked-by: "Michael S. Tsirkin" Reviewed-by: Michael S. Tsirkin Message-id: 20200204014325.16279-3-guoheyi@huawei.com Signed-off-by: Peter Maydell --- hw/arm/virt-acpi-build.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index bd5f771e9be..9f4c7d1889c 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -317,10 +317,6 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMap= Entry *memmap, aml_append(method, aml_return(buf)); aml_append(dev, method); =20 - Aml *dev_rp0 =3D aml_device("%s", "RP0"); - aml_append(dev_rp0, aml_name_decl("_ADR", aml_int(0))); - aml_append(dev, dev_rp0); - Aml *dev_res0 =3D aml_device("%s", "RES0"); aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02"))); crs =3D aml_resource_template(); --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581605724901606.8583327525057; Thu, 13 Feb 2020 06:55:24 -0800 (PST) Received: from localhost ([::1]:53994 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Ftj-0003n9-Dx for importer@patchew.org; Thu, 13 Feb 2020 09:55:23 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60128) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fgk-0004BZ-El for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fgj-0001Ut-2r for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:58 -0500 Received: from mail-wm1-x331.google.com ([2a00:1450:4864:20::331]:51272) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fgi-0001PE-RN for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:57 -0500 Received: by mail-wm1-x331.google.com with SMTP id t23so6543016wmi.1 for ; Thu, 13 Feb 2020 06:41:56 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.41.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:41:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=yohK9fa0GtpK0dTMm8tvPjd2OMeAkG47tGbSwUeB+Fk=; b=J+oXnFnBRNGSedUedeFmSvNuAQdP+1GD0qZwVe4yRz/BN7Z/LG7X1ui9LwdRUrU6r+ gDH+a/c9rMOdaU+r5dCVfksGCYWlhqdf8CmwxKRkXD/+Wqf5Xqg2fZoM8F3+IMQb9+z8 4cv6g/gxlqOYx2inwgwPUm6chDN6pbUBENbhc7V5O2x2aXTeJ+LbEHiWs6sE/PwuPmvo J6Um9nkD0V3hXLaCmnxLY/ckDnfjt4+DOa9PJmySbp+/oe6VfEJ/oG8l18RCTqgc9Is9 MswuTHhsSZZsTi5DD+lnQ0IdrNs86rL6FP9aredvqbj+M7JWQhOAKRvQ+Kkq60kzqzso zDWw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yohK9fa0GtpK0dTMm8tvPjd2OMeAkG47tGbSwUeB+Fk=; b=qeghM/qLY1urm6q8LB9J2CYeDYRVRgtdSvq//VrsBVxq+JG8XLMEnQdKT6hF7V1isq KnMnUffH3mRJ6g64nb5f2taGJz1F4uRS4d6DW7yigpTb+6mFlamTMYQkmBUcnXeGx2Q7 R+e00q5o2q56WZLRzKvJYRWOfVAZYHdLY/O9xZc0EZNuplh0ZrzKlowUpyxXbtClZeOl B30DrpJnlwV5oxuj1iOeLQjSycp43g4U6mT93wbdmAHvvVNT+kpx+OPjHWTr52Rd5cky xFdov0f28qsrRy8X44N9dn0tGLggLjFG0E87Finp6/VJEY3iColfsBfuZJqkcCNdQW/9 D2AQ== X-Gm-Message-State: APjAAAXNudBn0YJvzLuZmXbrcU462iIXJLBNL2i37AlLeSASGjzsH/Fk aSrXYieR3krd4SUxHUsrxXFBqdw5v+U= X-Google-Smtp-Source: APXvYqxI/1IJNDwCQnquqhsoWWSsYBTTdtRhh9pqDGnVx9QzYDRuiSwoWmaKBrgNpVAIp8UXNYZmWQ== X-Received: by 2002:a05:600c:211:: with SMTP id 17mr6139910wmi.60.1581604913529; Thu, 13 Feb 2020 06:41:53 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 05/46] arm/virt/acpi: remove _ADR from devices identified by _HID Date: Thu, 13 Feb 2020 14:41:04 +0000 Message-Id: <20200213144145.818-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::331 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Heyi Guo According to ACPI spec, _ADR should be used for device on a bus that has a standard enumeration algorithm, but not for device which is on system bus and must be enumerated by OSPM. And it is not recommended to contain both _HID and _ADR in a single device. See ACPI 6.3, section 6.1, top of page 343: A device object must contain either an _HID object or an _ADR object, but should not contain both. (https://uefi.org/sites/default/files/resources/ACPI_6_3_May16.pdf) Signed-off-by: Heyi Guo Acked-by: Igor Mammedov Acked-by: Michael S. Tsirkin Reviewed-by: Michael S. Tsirkin Message-id: 20200204014325.16279-4-guoheyi@huawei.com Signed-off-by: Peter Maydell --- hw/arm/virt-acpi-build.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 9f4c7d1889c..be752c0ad8e 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -78,11 +78,6 @@ static void acpi_dsdt_add_uart(Aml *scope, const MemMapE= ntry *uart_memmap, AML_EXCLUSIVE, &uart_irq, 1)); aml_append(dev, aml_name_decl("_CRS", crs)); =20 - /* The _ADR entry is used to link this device to the UART described - * in the SPCR table, i.e. SPCR.base_address.address =3D=3D _ADR. - */ - aml_append(dev, aml_name_decl("_ADR", aml_int(uart_memmap->base))); - aml_append(scope, dev); } =20 @@ -170,7 +165,6 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapE= ntry *memmap, aml_append(dev, aml_name_decl("_CID", aml_string("PNP0A03"))); aml_append(dev, aml_name_decl("_SEG", aml_int(0))); aml_append(dev, aml_name_decl("_BBN", aml_int(0))); - aml_append(dev, aml_name_decl("_ADR", aml_int(0))); aml_append(dev, aml_name_decl("_UID", aml_string("PCI0"))); aml_append(dev, aml_name_decl("_STR", aml_unicode("PCIe 0 Device"))); aml_append(dev, aml_name_decl("_CCA", aml_int(1))); @@ -334,7 +328,6 @@ static void acpi_dsdt_add_gpio(Aml *scope, const MemMap= Entry *gpio_memmap, { Aml *dev =3D aml_device("GPO0"); aml_append(dev, aml_name_decl("_HID", aml_string("ARMH0061"))); - aml_append(dev, aml_name_decl("_ADR", aml_int(0))); aml_append(dev, aml_name_decl("_UID", aml_int(0))); =20 Aml *crs =3D aml_resource_template(); @@ -364,7 +357,6 @@ static void acpi_dsdt_add_power_button(Aml *scope) { Aml *dev =3D aml_device(ACPI_POWER_BUTTON_DEVICE); aml_append(dev, aml_name_decl("_HID", aml_string("PNP0C0C"))); - aml_append(dev, aml_name_decl("_ADR", aml_int(0))); aml_append(dev, aml_name_decl("_UID", aml_int(0))); aml_append(scope, dev); } --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581605559963208.04387812064465; Thu, 13 Feb 2020 06:52:39 -0800 (PST) Received: from localhost ([::1]:53942 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fr4-0000E6-O5 for importer@patchew.org; Thu, 13 Feb 2020 09:52:38 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60121) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fgk-0004BI-1M for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fgi-0001Tg-JS for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:57 -0500 Received: from mail-wm1-x343.google.com ([2a00:1450:4864:20::343]:51713) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fgi-0001R6-Bm for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:56 -0500 Received: by mail-wm1-x343.google.com with SMTP id t23so6543098wmi.1 for ; Thu, 13 Feb 2020 06:41:56 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.41.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:41:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=bLlb0z2duQkI+Q2aALcxB/tkS6BOKIX9RgY26xXMpws=; b=jL6r7CiKawvDxqjJJJMzLEQoA6d1ZfruWlifdKSFpIxxVmSFuThM0T3F5xq0sT8Nqc rufPIc5Pwo6/tEY85SRJ81m3brtWxUSbJpci43oD04fMSDl9b1LmMxuvZD7wt5HNBFaA 2FhjCULbGBtaDFkUW3iN4gH9wfSnbx3WefoTLCTEX2fTIuVn/xSBSl52dxh0iB1A5e6U l3I2RMSoQKiOyC8W2sNpxrDCdZeQYbBVl1xcjTRHMGYP+fLVVlMS9OsX65NesamQW3pG 60DohEAvOJtiyCozUiYrukp3jXYWndi1woERSlBQ8Y/UBxIUyPTKsYfHyUfiuNfdeOE3 s/+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bLlb0z2duQkI+Q2aALcxB/tkS6BOKIX9RgY26xXMpws=; b=JpB+A5m2pQk3FVeNLiq4G+A3AH5/vxYdZJ7EKfg34UC8eXFZi9VCQ1IDil1O8NEkES KNoQvNwmkcr1FKbl+VF5aX2VQnG7UtHLNnGaKm8XfvjZrO9EzfxAQWpyC3hShKEA1WHP ryEnW57f/+q+d5wOlNt79dKs2dgg4stvPcW7wYtvmpkGHZGvjCy2YP1G79invSltOH7K jKtw8LPsSWUmhLBCWt/sbVNeiqRbOIw6gHRGgkXoSlXlfOiM7PhDVKVfu24CByD9GW/E ZtFCpiRQWPpioPm6mJRHEOT6e+zhPYjVqpnkxD9I0/sq6qmJqGoXv+rvqL8BlMLpbaFT DtFA== X-Gm-Message-State: APjAAAX9aTAgvoxAd72mzpJE9mKBNiQzrLi+e3b6H1HB/piGOt6npGYt yYYo5WQHE5i0rnd6Du3B+LAIRYTM3lY= X-Google-Smtp-Source: APXvYqwqzVxKYTMx6IpFuyBUsA2HRPxNKzdjMeXQaooaLuailUOU18K7KUYUcLzjeQuiz07wzfZcyg== X-Received: by 2002:a1c:9854:: with SMTP id a81mr6006141wme.1.1581604915018; Thu, 13 Feb 2020 06:41:55 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 06/46] arm/acpi: fix PCI _PRT definition Date: Thu, 13 Feb 2020 14:41:05 +0000 Message-Id: <20200213144145.818-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::343 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Heyi Guo The address field in each _PRT mapping package should be constructed with high word for device# and low word for function#, so it is wrong to use bus_no as the high word. The existing code adds a bunch useless entries with device #s above 31. Enumerate all possible slots (i.e. PCI_SLOT_MAX) instead. Signed-off-by: Heyi Guo Reviewed-by: Michael S. Tsirkin Message-id: 20200204014325.16279-5-guoheyi@huawei.com Signed-off-by: Peter Maydell --- hw/arm/virt-acpi-build.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index be752c0ad8e..5d157a9dd5e 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -151,7 +151,7 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapE= ntry *memmap, { int ecam_id =3D VIRT_ECAM_ID(highmem_ecam); Aml *method, *crs, *ifctx, *UUID, *ifctx1, *elsectx, *buf; - int i, bus_no; + int i, slot_no; hwaddr base_mmio =3D memmap[VIRT_PCIE_MMIO].base; hwaddr size_mmio =3D memmap[VIRT_PCIE_MMIO].size; hwaddr base_pio =3D memmap[VIRT_PCIE_PIO].base; @@ -170,12 +170,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMa= pEntry *memmap, aml_append(dev, aml_name_decl("_CCA", aml_int(1))); =20 /* Declare the PCI Routing Table. */ - Aml *rt_pkg =3D aml_varpackage(nr_pcie_buses * PCI_NUM_PINS); - for (bus_no =3D 0; bus_no < nr_pcie_buses; bus_no++) { + Aml *rt_pkg =3D aml_varpackage(PCI_SLOT_MAX * PCI_NUM_PINS); + for (slot_no =3D 0; slot_no < PCI_SLOT_MAX; slot_no++) { for (i =3D 0; i < PCI_NUM_PINS; i++) { - int gsi =3D (i + bus_no) % PCI_NUM_PINS; + int gsi =3D (i + slot_no) % PCI_NUM_PINS; Aml *pkg =3D aml_package(4); - aml_append(pkg, aml_int((bus_no << 16) | 0xFFFF)); + aml_append(pkg, aml_int((slot_no << 16) | 0xFFFF)); aml_append(pkg, aml_int(i)); aml_append(pkg, aml_name("GSI%d", gsi)); aml_append(pkg, aml_int(0)); --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 158160520458989.03279100900772; Thu, 13 Feb 2020 06:46:44 -0800 (PST) Received: from localhost ([::1]:53808 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2FlL-000138-2L for importer@patchew.org; Thu, 13 Feb 2020 09:46:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60133) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fgk-0004Ba-LD for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fgj-0001VW-Ek for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:58 -0500 Received: from mail-wm1-x32a.google.com ([2a00:1450:4864:20::32a]:54377) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fgj-0001TY-89 for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:57 -0500 Received: by mail-wm1-x32a.google.com with SMTP id g1so6528281wmh.4 for ; Thu, 13 Feb 2020 06:41:57 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.41.55 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:41:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=hsa2S0sFIOl02Bh0pvhS4b/KPw5mItrIiArWOu9Dh0U=; b=GpIzEyeSHAE10eNpET5ddNljibe5bJ2nZUvIBXk1pNTcf1Kwu4bmY/armpmhrf683g OWiabVQbK32qSDOdrEuNoJlKCn9qYzJFmBB1/6bQGp3IKk6lQIonJ+cMVwLFTIPHXG+N dti4kjGp5U6R98O2vm7iL+UGri9i6BHN0bBG5eYixiapvVfwCQVqBCwv3eSKduz03bKX jSt7R9ekOTNNWb6FZ+IQwp+8CMlZ+11ZYFIgLHHBPnVbXhsp6cXI7j37JL9MAJ3j+hUJ Pi8NQ1zFOdcxy3D5LaWey5z2d8mY69xSkvmpP1U1Tkb9iwi1+4+6fbdf0bf/Yd0yHBXR dYuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=hsa2S0sFIOl02Bh0pvhS4b/KPw5mItrIiArWOu9Dh0U=; b=jNYCmIMnbYrWWKviyhDDsd8XpI3CbpE3gCKoz4DV5Re1i3xMpKGM97ujsyT1crfRv/ 9sMDmUfyOAPFV1BZPP2rQt/wAXgqcyXQH9z5xnQukeeyk50k8git0g+NDYcHaYJCjole i//em3zgFFkndL/TwR0FT6H7By8awUXpIiVD+SAVLCYNl90EOnCrj20p5nKgJ/EVXNCp hEuzFrPb0AXDlPDIGF8oTWluZ91wVVxcFmk0F+t5DFQ1a8TCQpUfcsrnqeFPOjAUUy21 P419H8zP38xA6NY7te4avX8LfdsjoRlL9PtK95WXQmxhCbqQMNXFkjtm9BgTINaV/cd8 vtgg== X-Gm-Message-State: APjAAAWufEowgpQSWnNkLgP/SeFXnPUlWQlajeKhUR4In4R2ausQ2w11 JDT0fZ+9aFKmpbQZeJojHigE/CvXaGM= X-Google-Smtp-Source: APXvYqwp9qyV2t5VXnRASbNJ3bWPVgQN+NNt8WlA0HUGkt8LFgsyaq69e78L1lXwL1l22FsiRHUCOg== X-Received: by 2002:a1c:7317:: with SMTP id d23mr6370674wmb.165.1581604915973; Thu, 13 Feb 2020 06:41:55 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 07/46] arm/acpi: fix duplicated _UID of PCI interrupt link devices Date: Thu, 13 Feb 2020 14:41:06 +0000 Message-Id: <20200213144145.818-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Heyi Guo Using _UID of 0 for all PCI interrupt link devices absolutely violates the spec. Simply increase one by one. Signed-off-by: Heyi Guo Reviewed-by: Michael S. Tsirkin Message-id: 20200204014325.16279-6-guoheyi@huawei.com Signed-off-by: Peter Maydell --- hw/arm/virt-acpi-build.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 5d157a9dd5e..f3e340b1729 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -189,7 +189,7 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapE= ntry *memmap, uint32_t irqs =3D irq + i; Aml *dev_gsi =3D aml_device("GSI%d", i); aml_append(dev_gsi, aml_name_decl("_HID", aml_string("PNP0C0F"))); - aml_append(dev_gsi, aml_name_decl("_UID", aml_int(0))); + aml_append(dev_gsi, aml_name_decl("_UID", aml_int(i))); crs =3D aml_resource_template(); aml_append(crs, aml_interrupt(AML_CONSUMER, AML_LEVEL, AML_ACTIVE_HIGH, --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 158160586553159.33762749276684; Thu, 13 Feb 2020 06:57:45 -0800 (PST) Received: from localhost ([::1]:54060 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fvz-0007Ou-6S for importer@patchew.org; Thu, 13 Feb 2020 09:57:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60158) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fgl-0004Cr-PW for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:00 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fgk-0001Zb-O3 for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:59 -0500 Received: from mail-wm1-x32a.google.com ([2a00:1450:4864:20::32a]:52729) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fgk-0001XX-Hr for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:41:58 -0500 Received: by mail-wm1-x32a.google.com with SMTP id p9so6540515wmc.2 for ; Thu, 13 Feb 2020 06:41:58 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.41.56 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:41:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=EvzEX/npkzNudVNtgehSYV+xP5AkZNjc9J75BB9mrvE=; b=kiP4b49LQ0rcT0I6Ae8+jCGnTsTL5Y6MFNColumoBgaAyluudauZ6YFwoHAVVT+XVH EcuoTMHkVLV3Yc0gWjaccrDRhKXbk7eBnxwLgtcruDzgErhVf5gBuvXyZSYryt8sY7hu DXs9Fdw0Tcl+0fmbzxJeX05KJLyEKx6slObYXZFwhi+DYiGt2vwC/HXx8r20AmjuTJ8C BMUo/HNmYBnBx466X9nrwjHYnQEVFmnhRSjusuS3LpheGmSsZLTxEmoq3y565WM9ljFy /0X1ZDOh2p2JCCsFOZX4U18fyiPy6N1L6aA6TLM9eesVtU4xEU6sCcLuic/hwj645vtq qRug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=EvzEX/npkzNudVNtgehSYV+xP5AkZNjc9J75BB9mrvE=; b=qoYnwoCoHFi5WHhg2qcHkOZF3crh5UQ7KR2mJQyDfrefrKpz5kcIlGuSNJlVaG8p/U 4qd9p/tbEw44sK/Z6zE4yAxz516go8qZVNzo5mPQTCFNEwVGU9WN+vQ9S+kER3qTaaQV TGIx8rLCTjPKuCrIK00Jr61SMd81xZy51aTjAADSqw4nqrvGGKJ+HGCptKcU4tONBbHO nYirmr8nTYICQml6G6AzaCLGaiUiADWtn9srtQv6/vhQ5Sz7200rjd5CyHvixoiZ9Sci 2Ak4WV75n7jMb4jHxeJfUSlG2VCzsVADddge8WEUOGqvL5ztc/75Pf7jpNmSGhvRjmOz 9CWg== X-Gm-Message-State: APjAAAVLrKq7UMmO2IWnDZ03y/3NsHFIccibDId2rq6TvplAsVMNLoVB /vgQyVigi1sTQQwtH66G4QAvhv+tDzI= X-Google-Smtp-Source: APXvYqwIziJ2N0bGB8ub4aNUGx5Jw/tz+t8RL3CVeNLRxm0NARf8oEh94E1L/XMTb+VJq0Uhl7kQqQ== X-Received: by 2002:a1c:b7c4:: with SMTP id h187mr6511058wmf.105.1581604916910; Thu, 13 Feb 2020 06:41:56 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 08/46] arm/acpi: simplify the description of PCI _CRS Date: Thu, 13 Feb 2020 14:41:07 +0000 Message-Id: <20200213144145.818-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Heyi Guo The original code defines a named object for the resource template but then returns the resource template object itself; the resulted output is like below: Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { Name (RBUF, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum 0x00FF, // Range Maximum 0x0000, // Translation Offset 0x0100, // Length ,, ) ...... }) Return (ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum 0x00FF, // Range Maximum 0x0000, // Translation Offset 0x0100, // Length ,, ) ...... }) } So the named object "RBUF" is actually useless. The more natural way is to return RBUF instead, or simply drop RBUF definition. Choose the latter one to simplify the code. Signed-off-by: Heyi Guo Reviewed-by: Michael S. Tsirkin Message-id: 20200204014325.16279-7-guoheyi@huawei.com Signed-off-by: Peter Maydell --- hw/arm/virt-acpi-build.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index f3e340b1729..fb4b166f82c 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -236,7 +236,6 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapE= ntry *memmap, size_mmio_high)); } =20 - aml_append(method, aml_name_decl("RBUF", rbuf)); aml_append(method, aml_return(rbuf)); aml_append(dev, method); =20 --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581605398072591.4584182982578; Thu, 13 Feb 2020 06:49:58 -0800 (PST) Received: from localhost ([::1]:53868 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2FoS-0004id-6J for importer@patchew.org; Thu, 13 Feb 2020 09:49:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60178) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fgs-0004IX-Id for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:10 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fgn-0001dr-9d for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:06 -0500 Received: from mail-wr1-x431.google.com ([2a00:1450:4864:20::431]:42491) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fgm-0001cA-Vv for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:01 -0500 Received: by mail-wr1-x431.google.com with SMTP id k11so6970753wrd.9 for ; Thu, 13 Feb 2020 06:42:00 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.41.57 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:41:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=ymk2zAkPGglw3fo24eTj2ydWCethPALcQIEH22v1sZw=; b=I/i8fiSJougR6RABTZVGoceo3DrI1IkyrqGczBJuznsgNfmfYIYV6o7FiwGZJomr46 cu55j1Yd7gxKJBvJHD8GZvCayKmwFYtFPIqxhvjXDYDkoQ+1P27fI/oiz22e5BDg8js7 aDhbYH617HZlUGPPPV9c1bRRw9zS3HXC6IZJKAXNhjHj5CX6xev3ZTemi1EnpEvgCA+G eQPFx7Cx+KoSsA9Ursw265OdvA4DudM5GOvmqBZNQtawT9kE11hQjbEr/6PTpFBKQ66P Pa+l+pyBNQ/I3J3U7VOEr/Z7cQPZW5FSiaG+PFM8MBZ/NKBC/i//QtaE6YcIlO8qhnNu M+Bg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ymk2zAkPGglw3fo24eTj2ydWCethPALcQIEH22v1sZw=; b=g5dxqqlqoucrA2prGBU0PTrbHtbyZL/uK002vACtN+j1UUGapjRbUEhqzvFHoDY5jR +R9Yq9bkBS1MnjcuNWf0VctO7+qAVdQQd0j/IqDRmxseig9Bl5dPz8CEmJ/U3JQ7zhZx xFuc3H8vMHDSBBi/3fvPw9jOaXdIVyhen6g5Sl1++no7YgIUwc/Uz7rlVJFqmQ8fgGMt zpmLU0sa7mmtiI7jt7gXdAy/OY8KShhvsVvnNNmSXRk8FGK9g1suXvK9wUG+QpIpLrrj 7m9Z3kPv237F4YkS1BJ/dZfqwZlmxpoHA1Zp2Q0011Uxrt2yJBPwKcDdKqHYvfKXOt97 sl5A== X-Gm-Message-State: APjAAAWjhTUm5Hz61pWVwzl4GeF6ARGeUl8UhW2oF9qfHsnquYvgVPT/ exwVAJlDb2MNfNhCo+LZQuihRKhKWJM= X-Google-Smtp-Source: APXvYqwTSjJz3txwgUwTybxm7JGzvAbza99+yiias421wKONb24dahMlW8g1ZA6Cp3xfcAPnYqNweg== X-Received: by 2002:adf:df90:: with SMTP id z16mr21596721wrl.273.1581604918870; Thu, 13 Feb 2020 06:41:58 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 09/46] virt/acpi: update golden masters for DSDT update Date: Thu, 13 Feb 2020 14:41:08 +0000 Message-Id: <20200213144145.818-10-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::431 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Heyi Guo Differences between disassembled ASL files: @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of DSDT, Thu Jan 23 16:00:04 2020 + * Disassembly of DSDT.new, Thu Jan 23 16:47:12 2020 * * Original Table Header: * Signature "DSDT" - * Length 0x0000481E (18462) + * Length 0x000014BB (5307) * Revision 0x02 - * Checksum 0x60 + * Checksum 0xD1 * OEM ID "BOCHS " * OEM Table ID "BXPCDSDT" * OEM Revision 0x00000001 (1) @@ -43,7 +43,6 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x0= 0000001) 0x00000021, } }) - Name (_ADR, 0x09000000) // _ADR: Address } Device (FLS0) @@ -668,11 +667,10 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT",= 0x00000001) Name (_CID, "PNP0A03" /* PCI Bus */) // _CID: Compatible ID Name (_SEG, Zero) // _SEG: PCI Segment Name (_BBN, Zero) // _BBN: BIOS Bus Number - Name (_ADR, Zero) // _ADR: Address Name (_UID, "PCI0") // _UID: Unique ID Name (_STR, Unicode ("PCIe 0 Device")) // _STR: Description S= tring Name (_CCA, One) // _CCA: Cache Coherency Attribute - Name (_PRT, Package (0x0400) // _PRT: PCI Routing Table + Name (_PRT, Package (0x80) // _PRT: PCI Routing Table { Package (0x04) { @@ -1696,7174 +1694,6 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSD= T", 0x00000001) 0x03, GSI2, Zero - }, - - Package (0x04) - { - 0x0020FFFF, - Zero, - GSI0, - Zero - }, - - *Omit the other (4 * (256 - 32) - 2) packages* - - Package (0x04) - { - 0x00FFFFFF, - 0x03, - GSI2, - Zero } }) Device (GSI0) @@ -8892,7 +1722,7 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT",= 0x00000001) Device (GSI1) { Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) //= _HID: Hardware ID - Name (_UID, Zero) // _UID: Unique ID + Name (_UID, One) // _UID: Unique ID Name (_PRS, ResourceTemplate () // _PRS: Possible Resourc= e Settings { Interrupt (ResourceConsumer, Level, ActiveHigh, Exclus= ive, ,, ) @@ -8915,7 +1745,7 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT",= 0x00000001) Device (GSI2) { Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) //= _HID: Hardware ID - Name (_UID, Zero) // _UID: Unique ID + Name (_UID, 0x02) // _UID: Unique ID Name (_PRS, ResourceTemplate () // _PRS: Possible Resourc= e Settings { Interrupt (ResourceConsumer, Level, ActiveHigh, Exclus= ive, ,, ) @@ -8938,7 +1768,7 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT",= 0x00000001) Device (GSI3) { Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) //= _HID: Hardware ID - Name (_UID, Zero) // _UID: Unique ID + Name (_UID, 0x03) // _UID: Unique ID Name (_PRS, ResourceTemplate () // _PRS: Possible Resourc= e Settings { Interrupt (ResourceConsumer, Level, ActiveHigh, Exclus= ive, ,, ) @@ -8965,37 +1795,6 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT"= , 0x00000001) Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Set= tings { - Name (RBUF, ResourceTemplate () - { - WordBusNumber (ResourceProducer, MinFixed, MaxFixed, P= osDecode, - 0x0000, // Granularity - 0x0000, // Range Minimum - 0x00FF, // Range Maximum - 0x0000, // Translation Offset - 0x0100, // Length - ,, ) - DWordMemory (ResourceProducer, PosDecode, MinFixed, Ma= xFixed, NonCacheable, ReadWrite, - 0x00000000, // Granularity - 0x10000000, // Range Minimum - 0x3EFEFFFF, // Range Maximum - 0x00000000, // Translation Offset - 0x2EFF0000, // Length - ,, , AddressRangeMemory, TypeStatic) - DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDeco= de, EntireRange, - 0x00000000, // Granularity - 0x00000000, // Range Minimum - 0x0000FFFF, // Range Maximum - 0x3EFF0000, // Translation Offset - 0x00010000, // Length - ,, , TypeStatic, DenseTranslation) - QWordMemory (ResourceProducer, PosDecode, MinFixed, Ma= xFixed, NonCacheable, ReadWrite, - 0x0000000000000000, // Granularity - 0x0000008000000000, // Range Minimum - 0x000000FFFFFFFFFF, // Range Maximum - 0x0000000000000000, // Translation Offset - 0x0000008000000000, // Length - ,, , AddressRangeMemory, TypeStatic) - }) Return (ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, P= osDecode, @@ -9080,11 +1879,6 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT"= , 0x00000001) }) } - Device (RP0) - { - Name (_ADR, Zero) // _ADR: Address - } - Device (RES0) { Name (_HID, "PNP0C02" /* PNP Motherboard Resources */) //= _HID: Hardware ID @@ -9131,7 +1925,6 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT",= 0x00000001) Device (PWRB) { Name (_HID, "PNP0C0C" /* Power Button Device */) // _HID: Har= dware ID - Name (_ADR, Zero) // _ADR: Address Name (_UID, Zero) // _UID: Unique ID } } The differences between the two versions of DSDT.memhp are almost the same as the above, except for total length and checksum. DSDT.numamem binary is just the same with DSDT on virt machine, so we don't show the differences again. Signed-off-by: Heyi Guo Reviewed-by: Michael S. Tsirkin Message-id: 20200204014325.16279-8-guoheyi@huawei.com Signed-off-by: Peter Maydell --- tests/qtest/bios-tables-test-allowed-diff.h | 3 --- tests/data/acpi/virt/DSDT | Bin 18462 -> 5307 bytes tests/data/acpi/virt/DSDT.memhp | Bin 19799 -> 6644 bytes tests/data/acpi/virt/DSDT.numamem | Bin 18462 -> 5307 bytes 4 files changed, 3 deletions(-) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios= -tables-test-allowed-diff.h index 32a401ae35f..dfb8523c8bf 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,4 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/virt/DSDT", -"tests/data/acpi/virt/DSDT.memhp", -"tests/data/acpi/virt/DSDT.numamem", diff --git a/tests/data/acpi/virt/DSDT b/tests/data/acpi/virt/DSDT index d0f3afeb134fdf1c11f64cd06dbcdd30be603b80..d6f5c617881c4247f55d4dcd065= 81f9693916b2f 100644 GIT binary patch delta 156 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.41.58 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:41:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=MuoGNQ1y1csIjVqqiEVAeH53kp1R5V2ytgxq6qNEfRw=; b=EG5xJ7LBOxGtm66SVjhh7FUJ7mY6XDSOHwAGMwbn3/NwfEwB+35k28W48VOuLMpHpE 6fOo16IaYtxOw9p+e9lZxh9uVTJuKbRlrAORwKNXfaFHlTERgVcnOfvbP79adStfOYfb gQVKIwwEisA+h40/GBwpi980MbcNAv+oyNmf00mkmcTNsBbrV53sO53i0aWsbUcsPI1W aPNMF341VFYfhKoCL11QMswyKadS/Nm7zpxnsg3/DBlrGvaJ88lQ6Yv+9SPYX/gaL6FC z40bSUDJGpQFgAJ4ajjRzcVMYLOGfB9XrMt4h5+LrPPKOYZc/EzwXTF5cB2vLTZ/ELCx U4fg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MuoGNQ1y1csIjVqqiEVAeH53kp1R5V2ytgxq6qNEfRw=; b=P7BWsIXyvVIld2oCjySLIXIpzMbzvDHFmCYtvsk37QA/aVWjVFzTKoNEGgQVrPNdKX e2OfwWkQ8ysNh2/PDDG5EnRgJiQzxPnoYlU1KmiDte5C8tx/5lcOqiPxWjT77Ev0VfZJ Cc3ICC233PVITv8Ou0BQQ17Lotc5RcSta2yGtViF09F8FrX9OMzX6sW5nN2GOK58zTYY cyv6SRSBOpAb40BhXDF0+3YDAY9puYsCL66sfI/MpPRiadqQSb1qDn9xf8uAILbchHWM P0ojGm40ITxL8cCn7HuUaxJKVMOPyQ7yesgU6PmRhIyk96uxekHoU+vhjndGSHGoXbQm DAmA== X-Gm-Message-State: APjAAAVJ1iHIbfXS3kuOi/JGz2SixMCyH9jUHnhYqMeFZKM1EiZvowoI 6P3utyAAX8TaWCNi+WyMdXEnpwGO7ug= X-Google-Smtp-Source: APXvYqy1k/T9rHoYidRjjHpCE2Qu20MAXkTnM99YSSDd9N/9j2v6Yprh9ABEG/BCNNIF71MNbmiapQ== X-Received: by 2002:adf:f28c:: with SMTP id k12mr23005679wro.360.1581604920726; Thu, 13 Feb 2020 06:42:00 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 10/46] target/arm: Add arm_mmu_idx_is_stage1_of_2 Date: Thu, 13 Feb 2020 14:41:09 +0000 Message-Id: <20200213144145.818-11-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::432 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Richard Henderson Use a common predicate for querying stage1-ness. Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson Message-id: 20200208125816.14954-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/internals.h | 18 ++++++++++++++++++ target/arm/helper.c | 8 +++----- 2 files changed, 21 insertions(+), 5 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 6d4a942bde4..1f8ee5f573e 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1034,6 +1034,24 @@ static inline ARMMMUIdx arm_stage1_mmu_idx(CPUARMSta= te *env) ARMMMUIdx arm_stage1_mmu_idx(CPUARMState *env); #endif =20 +/** + * arm_mmu_idx_is_stage1_of_2: + * @mmu_idx: The ARMMMUIdx to test + * + * Return true if @mmu_idx is a NOTLB mmu_idx that is the + * first stage of a two stage regime. + */ +static inline bool arm_mmu_idx_is_stage1_of_2(ARMMMUIdx mmu_idx) +{ + switch (mmu_idx) { + case ARMMMUIdx_Stage1_E0: + case ARMMMUIdx_Stage1_E1: + return true; + default: + return false; + } +} + /* * Parameters of a given virtual address, as extracted from the * translation control register (TCR) for a given regime. diff --git a/target/arm/helper.c b/target/arm/helper.c index 7d15d5c933c..57dc7a307c0 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -3261,8 +3261,7 @@ static uint64_t do_ats_write(CPUARMState *env, uint64= _t value, bool take_exc =3D false; =20 if (fi.s1ptw && current_el =3D=3D 1 && !arm_is_secure(env) - && (mmu_idx =3D=3D ARMMMUIdx_Stage1_E1 || - mmu_idx =3D=3D ARMMMUIdx_Stage1_E0)) { + && arm_mmu_idx_is_stage1_of_2(mmu_idx)) { /* * Synchronous stage 2 fault on an access made as part of the * translation table walk for AT S1E0* or AT S1E1* insn @@ -9285,8 +9284,7 @@ static inline bool regime_translation_disabled(CPUARM= State *env, } } =20 - if ((env->cp15.hcr_el2 & HCR_DC) && - (mmu_idx =3D=3D ARMMMUIdx_Stage1_E0 || mmu_idx =3D=3D ARMMMUIdx_St= age1_E1)) { + if ((env->cp15.hcr_el2 & HCR_DC) && arm_mmu_idx_is_stage1_of_2(mmu_idx= )) { /* HCR.DC means SCTLR_EL1.M behaves as 0 */ return true; } @@ -9595,7 +9593,7 @@ static hwaddr S1_ptw_translate(CPUARMState *env, ARMM= MUIdx mmu_idx, hwaddr addr, MemTxAttrs txattrs, ARMMMUFaultInfo *fi) { - if ((mmu_idx =3D=3D ARMMMUIdx_Stage1_E0 || mmu_idx =3D=3D ARMMMUIdx_St= age1_E1) && + if (arm_mmu_idx_is_stage1_of_2(mmu_idx) && !regime_translation_disabled(env, ARMMMUIdx_Stage2)) { target_ulong s2size; hwaddr s2pa; --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581607352171870.7460077123973; Thu, 13 Feb 2020 07:22:32 -0800 (PST) Received: from localhost ([::1]:54258 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2G4O-0001nJ-DO for importer@patchew.org; Thu, 13 Feb 2020 10:06:24 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60222) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fgw-0004M5-VZ for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:13 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fgs-0001oi-SE for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:10 -0500 Received: from mail-wr1-x436.google.com ([2a00:1450:4864:20::436]:35580) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fgs-0001h5-KC for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:06 -0500 Received: by mail-wr1-x436.google.com with SMTP id w12so6995783wrt.2 for ; Thu, 13 Feb 2020 06:42:03 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.00 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=lbGXOA20K9t0DIIjWkWmEvtE0o6Vf2Fcr4UICkB8S84=; b=ICJ+2iAgNYGN58sxjjChpAW4z4XvDA6vK5ynKAjqvklXpgfZs4PM6ZkGKALXW/orcd mkgfZPz5bFa3lyXIl8b6or9EOzaVM5Hemz/oTBCLaNmMX1isPL9DWV1MW/qUpwgHOTu2 TCP4poDgYa0SNzs6VpJ22/yoxU9WlLhJrALuS3IbSYXNx+lmOtkwvpZym1KLHvGoibuI 41sZoi4wxt/k0FSy2CvfsgdEnOUqxXGbMP1sCgIa4nLg4jIIGx8JM8auUV5RB3y1r47U tWCPCvv2qg6vbclW88n0wHDIjVwKgPNz7xA1NHYOwV3razXKT5oDB1cs0JtepR7+7p1W 4HSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lbGXOA20K9t0DIIjWkWmEvtE0o6Vf2Fcr4UICkB8S84=; b=e1RktHWGaRsC5SZeQSh8BCSBBQFqiTVbucptDUEQPNzyAP3ogRQsx6nNpKbUhDqTxM 9hzl/byuHE1EG93jahZFyuJzM8ddUrc58YTAUvlBtrCCfo4I7ciCkQHuIajx3pn7a9PW YKF+mMqdlI4G2AcQW3VMkNOUTDl1wfbox51IInvTSx4ZhSdbayE0PCU6n5gYvJo3KwXE 5i0yo7iGlwJ4cdYL/w7c0AWMhsitTjgX9xpbia/QmJEZZHSWbDCf4TMOlCJSSm7VKPWI o4hPndyeDkLJPAUfoQ+dfD3POEBkp9OMzH0mPDIUFYJcW4XaRPEzMcqcXa0P2gIkCZgM ApdA== X-Gm-Message-State: APjAAAXyrkBLK6g1alIjwL439qvyjffILwC/jOATopuUt86D1EVw/bO2 cPM3ffV9yy0myY8Uq/zEKA1eXHOJIhI= X-Google-Smtp-Source: APXvYqx1NGdFKGwXIqDyVv3uhLbFNpa+68lxrhP0UQPZg97dfq2y5vyeeZQY5ZOi+Rvp9g0ILZBVgg== X-Received: by 2002:adf:ec4c:: with SMTP id w12mr23190114wrn.124.1581604921873; Thu, 13 Feb 2020 06:42:01 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 11/46] target/arm: Add mmu_idx for EL1 and EL2 w/ PAN enabled Date: Thu, 13 Feb 2020 14:41:10 +0000 Message-Id: <20200213144145.818-12-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::436 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Richard Henderson To implement PAN, we will want to swap, for short periods of time, to a different privileged mmu_idx. In addition, we cannot do this with flushing alone, because the AT* instructions have both PAN and PAN-less versions. Add the ARMMMUIdx*_PAN constants where necessary next to the corresponding ARMMMUIdx* constant. Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20200208125816.14954-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu-param.h | 2 +- target/arm/cpu.h | 33 ++++++++++++++------- target/arm/internals.h | 9 ++++++ target/arm/helper.c | 60 +++++++++++++++++++++++++++++++------- target/arm/translate-a64.c | 3 ++ target/arm/translate.c | 2 ++ 6 files changed, 87 insertions(+), 22 deletions(-) diff --git a/target/arm/cpu-param.h b/target/arm/cpu-param.h index 18ac5623462..d593b60b28d 100644 --- a/target/arm/cpu-param.h +++ b/target/arm/cpu-param.h @@ -29,6 +29,6 @@ # define TARGET_PAGE_BITS_MIN 10 #endif =20 -#define NB_MMU_MODES 9 +#define NB_MMU_MODES 12 =20 #endif diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 0b3036c484f..c63bceaaa5f 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2751,20 +2751,24 @@ bool write_cpustate_to_list(ARMCPU *cpu, bool kvm_s= ync); * 5. we want to be able to use the TLB for accesses done as part of a * stage1 page table walk, rather than having to walk the stage2 page * table over and over. + * 6. we need separate EL1/EL2 mmu_idx for handling the Privileged Access + * Never (PAN) bit within PSTATE. * * This gives us the following list of cases: * * NS EL0 EL1&0 stage 1+2 (aka NS PL0) * NS EL1 EL1&0 stage 1+2 (aka NS PL1) + * NS EL1 EL1&0 stage 1+2 +PAN * NS EL0 EL2&0 - * NS EL2 EL2&0 + * NS EL2 EL2&0 +PAN * NS EL2 (aka NS PL2) * S EL0 EL1&0 (aka S PL0) * S EL1 EL1&0 (not used if EL3 is 32 bit) + * S EL1 EL1&0 +PAN * S EL3 (aka S PL1) * NS EL1&0 stage 2 * - * for a total of 9 different mmu_idx. + * for a total of 12 different mmu_idx. * * R profile CPUs have an MPU, but can use the same set of MMU indexes * as A profile. They only need to distinguish NS EL0 and NS EL1 (and @@ -2819,19 +2823,22 @@ typedef enum ARMMMUIdx { /* * A-profile. */ - ARMMMUIdx_E10_0 =3D 0 | ARM_MMU_IDX_A, - ARMMMUIdx_E20_0 =3D 1 | ARM_MMU_IDX_A, + ARMMMUIdx_E10_0 =3D 0 | ARM_MMU_IDX_A, + ARMMMUIdx_E20_0 =3D 1 | ARM_MMU_IDX_A, =20 - ARMMMUIdx_E10_1 =3D 2 | ARM_MMU_IDX_A, + ARMMMUIdx_E10_1 =3D 2 | ARM_MMU_IDX_A, + ARMMMUIdx_E10_1_PAN =3D 3 | ARM_MMU_IDX_A, =20 - ARMMMUIdx_E2 =3D 3 | ARM_MMU_IDX_A, - ARMMMUIdx_E20_2 =3D 4 | ARM_MMU_IDX_A, + ARMMMUIdx_E2 =3D 4 | ARM_MMU_IDX_A, + ARMMMUIdx_E20_2 =3D 5 | ARM_MMU_IDX_A, + ARMMMUIdx_E20_2_PAN =3D 6 | ARM_MMU_IDX_A, =20 - ARMMMUIdx_SE10_0 =3D 5 | ARM_MMU_IDX_A, - ARMMMUIdx_SE10_1 =3D 6 | ARM_MMU_IDX_A, - ARMMMUIdx_SE3 =3D 7 | ARM_MMU_IDX_A, + ARMMMUIdx_SE10_0 =3D 7 | ARM_MMU_IDX_A, + ARMMMUIdx_SE10_1 =3D 8 | ARM_MMU_IDX_A, + ARMMMUIdx_SE10_1_PAN =3D 9 | ARM_MMU_IDX_A, + ARMMMUIdx_SE3 =3D 10 | ARM_MMU_IDX_A, =20 - ARMMMUIdx_Stage2 =3D 8 | ARM_MMU_IDX_A, + ARMMMUIdx_Stage2 =3D 11 | ARM_MMU_IDX_A, =20 /* * These are not allocated TLBs and are used only for AT system @@ -2839,6 +2846,7 @@ typedef enum ARMMMUIdx { */ ARMMMUIdx_Stage1_E0 =3D 0 | ARM_MMU_IDX_NOTLB, ARMMMUIdx_Stage1_E1 =3D 1 | ARM_MMU_IDX_NOTLB, + ARMMMUIdx_Stage1_E1_PAN =3D 2 | ARM_MMU_IDX_NOTLB, =20 /* * M-profile. @@ -2864,10 +2872,13 @@ typedef enum ARMMMUIdxBit { TO_CORE_BIT(E10_0), TO_CORE_BIT(E20_0), TO_CORE_BIT(E10_1), + TO_CORE_BIT(E10_1_PAN), TO_CORE_BIT(E2), TO_CORE_BIT(E20_2), + TO_CORE_BIT(E20_2_PAN), TO_CORE_BIT(SE10_0), TO_CORE_BIT(SE10_1), + TO_CORE_BIT(SE10_1_PAN), TO_CORE_BIT(SE3), TO_CORE_BIT(Stage2), =20 diff --git a/target/arm/internals.h b/target/arm/internals.h index 1f8ee5f573e..6be8b2d1a9b 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -843,12 +843,16 @@ static inline bool regime_has_2_ranges(ARMMMUIdx mmu_= idx) switch (mmu_idx) { case ARMMMUIdx_Stage1_E0: case ARMMMUIdx_Stage1_E1: + case ARMMMUIdx_Stage1_E1_PAN: case ARMMMUIdx_E10_0: case ARMMMUIdx_E10_1: + case ARMMMUIdx_E10_1_PAN: case ARMMMUIdx_E20_0: case ARMMMUIdx_E20_2: + case ARMMMUIdx_E20_2_PAN: case ARMMMUIdx_SE10_0: case ARMMMUIdx_SE10_1: + case ARMMMUIdx_SE10_1_PAN: return true; default: return false; @@ -861,10 +865,13 @@ static inline bool regime_is_secure(CPUARMState *env,= ARMMMUIdx mmu_idx) switch (mmu_idx) { case ARMMMUIdx_E10_0: case ARMMMUIdx_E10_1: + case ARMMMUIdx_E10_1_PAN: case ARMMMUIdx_E20_0: case ARMMMUIdx_E20_2: + case ARMMMUIdx_E20_2_PAN: case ARMMMUIdx_Stage1_E0: case ARMMMUIdx_Stage1_E1: + case ARMMMUIdx_Stage1_E1_PAN: case ARMMMUIdx_E2: case ARMMMUIdx_Stage2: case ARMMMUIdx_MPrivNegPri: @@ -875,6 +882,7 @@ static inline bool regime_is_secure(CPUARMState *env, A= RMMMUIdx mmu_idx) case ARMMMUIdx_SE3: case ARMMMUIdx_SE10_0: case ARMMMUIdx_SE10_1: + case ARMMMUIdx_SE10_1_PAN: case ARMMMUIdx_MSPrivNegPri: case ARMMMUIdx_MSUserNegPri: case ARMMMUIdx_MSPriv: @@ -1046,6 +1054,7 @@ static inline bool arm_mmu_idx_is_stage1_of_2(ARMMMUI= dx mmu_idx) switch (mmu_idx) { case ARMMMUIdx_Stage1_E0: case ARMMMUIdx_Stage1_E1: + case ARMMMUIdx_Stage1_E1_PAN: return true; default: return false; diff --git a/target/arm/helper.c b/target/arm/helper.c index 57dc7a307c0..bfd6c0d04bd 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -671,6 +671,7 @@ static void tlbiall_nsnh_write(CPUARMState *env, const = ARMCPRegInfo *ri, =20 tlb_flush_by_mmuidx(cs, ARMMMUIdxBit_E10_1 | + ARMMMUIdxBit_E10_1_PAN | ARMMMUIdxBit_E10_0 | ARMMMUIdxBit_Stage2); } @@ -682,6 +683,7 @@ static void tlbiall_nsnh_is_write(CPUARMState *env, con= st ARMCPRegInfo *ri, =20 tlb_flush_by_mmuidx_all_cpus_synced(cs, ARMMMUIdxBit_E10_1 | + ARMMMUIdxBit_E10_1_PAN | ARMMMUIdxBit_E10_0 | ARMMMUIdxBit_Stage2); } @@ -2700,6 +2702,7 @@ static int gt_phys_redir_timeridx(CPUARMState *env) switch (arm_mmu_idx(env)) { case ARMMMUIdx_E20_0: case ARMMMUIdx_E20_2: + case ARMMMUIdx_E20_2_PAN: return GTIMER_HYP; default: return GTIMER_PHYS; @@ -2711,6 +2714,7 @@ static int gt_virt_redir_timeridx(CPUARMState *env) switch (arm_mmu_idx(env)) { case ARMMMUIdx_E20_0: case ARMMMUIdx_E20_2: + case ARMMMUIdx_E20_2_PAN: return GTIMER_HYPVIRT; default: return GTIMER_VIRT; @@ -3337,7 +3341,9 @@ static uint64_t do_ats_write(CPUARMState *env, uint64= _t value, format64 =3D arm_s1_regime_using_lpae_format(env, mmu_idx); =20 if (arm_feature(env, ARM_FEATURE_EL2)) { - if (mmu_idx =3D=3D ARMMMUIdx_E10_0 || mmu_idx =3D=3D ARMMMUIdx= _E10_1) { + if (mmu_idx =3D=3D ARMMMUIdx_E10_0 || + mmu_idx =3D=3D ARMMMUIdx_E10_1 || + mmu_idx =3D=3D ARMMMUIdx_E10_1_PAN) { format64 |=3D env->cp15.hcr_el2 & (HCR_VM | HCR_DC); } else { format64 |=3D arm_current_el(env) =3D=3D 2; @@ -3797,7 +3803,9 @@ static void vmsa_tcr_ttbr_el2_write(CPUARMState *env,= const ARMCPRegInfo *ri, if (extract64(raw_read(env, ri) ^ value, 48, 16) && (arm_hcr_el2_eff(env) & HCR_E2H)) { tlb_flush_by_mmuidx(env_cpu(env), - ARMMMUIdxBit_E20_2 | ARMMMUIdxBit_E20_0); + ARMMMUIdxBit_E20_2 | + ARMMMUIdxBit_E20_2_PAN | + ARMMMUIdxBit_E20_0); } raw_write(env, ri, value); } @@ -3815,6 +3823,7 @@ static void vttbr_write(CPUARMState *env, const ARMCP= RegInfo *ri, if (raw_read(env, ri) !=3D value) { tlb_flush_by_mmuidx(cs, ARMMMUIdxBit_E10_1 | + ARMMMUIdxBit_E10_1_PAN | ARMMMUIdxBit_E10_0 | ARMMMUIdxBit_Stage2); raw_write(env, ri, value); @@ -4175,12 +4184,18 @@ static int vae1_tlbmask(CPUARMState *env) { /* Since we exclude secure first, we may read HCR_EL2 directly. */ if (arm_is_secure_below_el3(env)) { - return ARMMMUIdxBit_SE10_1 | ARMMMUIdxBit_SE10_0; + return ARMMMUIdxBit_SE10_1 | + ARMMMUIdxBit_SE10_1_PAN | + ARMMMUIdxBit_SE10_0; } else if ((env->cp15.hcr_el2 & (HCR_E2H | HCR_TGE)) =3D=3D (HCR_E2H | HCR_TGE)) { - return ARMMMUIdxBit_E20_2 | ARMMMUIdxBit_E20_0; + return ARMMMUIdxBit_E20_2 | + ARMMMUIdxBit_E20_2_PAN | + ARMMMUIdxBit_E20_0; } else { - return ARMMMUIdxBit_E10_1 | ARMMMUIdxBit_E10_0; + return ARMMMUIdxBit_E10_1 | + ARMMMUIdxBit_E10_1_PAN | + ARMMMUIdxBit_E10_0; } } =20 @@ -4214,18 +4229,28 @@ static int alle1_tlbmask(CPUARMState *env) * stage 1 translations. */ if (arm_is_secure_below_el3(env)) { - return ARMMMUIdxBit_SE10_1 | ARMMMUIdxBit_SE10_0; + return ARMMMUIdxBit_SE10_1 | + ARMMMUIdxBit_SE10_1_PAN | + ARMMMUIdxBit_SE10_0; } else if (arm_feature(env, ARM_FEATURE_EL2)) { - return ARMMMUIdxBit_E10_1 | ARMMMUIdxBit_E10_0 | ARMMMUIdxBit_Stag= e2; + return ARMMMUIdxBit_E10_1 | + ARMMMUIdxBit_E10_1_PAN | + ARMMMUIdxBit_E10_0 | + ARMMMUIdxBit_Stage2; } else { - return ARMMMUIdxBit_E10_1 | ARMMMUIdxBit_E10_0; + return ARMMMUIdxBit_E10_1 | + ARMMMUIdxBit_E10_1_PAN | + ARMMMUIdxBit_E10_0; } } =20 static int e2_tlbmask(CPUARMState *env) { /* TODO: ARMv8.4-SecEL2 */ - return ARMMMUIdxBit_E20_0 | ARMMMUIdxBit_E20_2 | ARMMMUIdxBit_E2; + return ARMMMUIdxBit_E20_0 | + ARMMMUIdxBit_E20_2 | + ARMMMUIdxBit_E20_2_PAN | + ARMMMUIdxBit_E2; } =20 static void tlbi_aa64_alle1_write(CPUARMState *env, const ARMCPRegInfo *ri, @@ -9206,6 +9231,7 @@ static uint32_t regime_el(CPUARMState *env, ARMMMUIdx= mmu_idx) switch (mmu_idx) { case ARMMMUIdx_E20_0: case ARMMMUIdx_E20_2: + case ARMMMUIdx_E20_2_PAN: case ARMMMUIdx_Stage2: case ARMMMUIdx_E2: return 2; @@ -9214,10 +9240,13 @@ static uint32_t regime_el(CPUARMState *env, ARMMMUI= dx mmu_idx) case ARMMMUIdx_SE10_0: return arm_el_is_aa64(env, 3) ? 1 : 3; case ARMMMUIdx_SE10_1: + case ARMMMUIdx_SE10_1_PAN: case ARMMMUIdx_Stage1_E0: case ARMMMUIdx_Stage1_E1: + case ARMMMUIdx_Stage1_E1_PAN: case ARMMMUIdx_E10_0: case ARMMMUIdx_E10_1: + case ARMMMUIdx_E10_1_PAN: case ARMMMUIdx_MPrivNegPri: case ARMMMUIdx_MUserNegPri: case ARMMMUIdx_MPriv: @@ -9333,6 +9362,8 @@ static inline ARMMMUIdx stage_1_mmu_idx(ARMMMUIdx mmu= _idx) return ARMMMUIdx_Stage1_E0; case ARMMMUIdx_E10_1: return ARMMMUIdx_Stage1_E1; + case ARMMMUIdx_E10_1_PAN: + return ARMMMUIdx_Stage1_E1_PAN; default: return mmu_idx; } @@ -9379,6 +9410,7 @@ static inline bool regime_is_user(CPUARMState *env, A= RMMMUIdx mmu_idx) return false; case ARMMMUIdx_E10_0: case ARMMMUIdx_E10_1: + case ARMMMUIdx_E10_1_PAN: g_assert_not_reached(); } } @@ -11271,7 +11303,9 @@ bool get_phys_addr(CPUARMState *env, target_ulong a= ddress, target_ulong *page_size, ARMMMUFaultInfo *fi, ARMCacheAttrs *cacheattrs) { - if (mmu_idx =3D=3D ARMMMUIdx_E10_0 || mmu_idx =3D=3D ARMMMUIdx_E10_1) { + if (mmu_idx =3D=3D ARMMMUIdx_E10_0 || + mmu_idx =3D=3D ARMMMUIdx_E10_1 || + mmu_idx =3D=3D ARMMMUIdx_E10_1_PAN) { /* Call ourselves recursively to do the stage 1 and then stage 2 * translations. */ @@ -11798,10 +11832,13 @@ int arm_mmu_idx_to_el(ARMMMUIdx mmu_idx) case ARMMMUIdx_SE10_0: return 0; case ARMMMUIdx_E10_1: + case ARMMMUIdx_E10_1_PAN: case ARMMMUIdx_SE10_1: + case ARMMMUIdx_SE10_1_PAN: return 1; case ARMMMUIdx_E2: case ARMMMUIdx_E20_2: + case ARMMMUIdx_E20_2_PAN: return 2; case ARMMMUIdx_SE3: return 3; @@ -12018,11 +12055,14 @@ static uint32_t rebuild_hflags_a64(CPUARMState *e= nv, int el, int fp_el, /* TODO: ARMv8.2-UAO */ switch (mmu_idx) { case ARMMMUIdx_E10_1: + case ARMMMUIdx_E10_1_PAN: case ARMMMUIdx_SE10_1: + case ARMMMUIdx_SE10_1_PAN: /* TODO: ARMv8.3-NV */ flags =3D FIELD_DP32(flags, TBFLAG_A64, UNPRIV, 1); break; case ARMMMUIdx_E20_2: + case ARMMMUIdx_E20_2_PAN: /* TODO: ARMv8.4-SecEL2 */ /* * Note that E20_2 is gated by HCR_EL2.E2H =3D=3D 1, but E20_0 is diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 6e82486884b..49631c23404 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -124,12 +124,15 @@ static int get_a64_user_mem_index(DisasContext *s) */ switch (useridx) { case ARMMMUIdx_E10_1: + case ARMMMUIdx_E10_1_PAN: useridx =3D ARMMMUIdx_E10_0; break; case ARMMMUIdx_E20_2: + case ARMMMUIdx_E20_2_PAN: useridx =3D ARMMMUIdx_E20_0; break; case ARMMMUIdx_SE10_1: + case ARMMMUIdx_SE10_1_PAN: useridx =3D ARMMMUIdx_SE10_0; break; default: diff --git a/target/arm/translate.c b/target/arm/translate.c index e11a5871d02..d58c328e08e 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -155,10 +155,12 @@ static inline int get_a32_user_mem_index(DisasContext= *s) case ARMMMUIdx_E2: /* this one is UNPREDICTABLE */ case ARMMMUIdx_E10_0: case ARMMMUIdx_E10_1: + case ARMMMUIdx_E10_1_PAN: return arm_to_core_mmu_idx(ARMMMUIdx_E10_0); case ARMMMUIdx_SE3: case ARMMMUIdx_SE10_0: case ARMMMUIdx_SE10_1: + case ARMMMUIdx_SE10_1_PAN: return arm_to_core_mmu_idx(ARMMMUIdx_SE10_0); case ARMMMUIdx_MUser: case ARMMMUIdx_MPriv: --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581605457368839.428200079153; Thu, 13 Feb 2020 06:50:57 -0800 (PST) Received: from localhost ([::1]:53894 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2FpQ-0006Vq-5S for importer@patchew.org; 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.01 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=rmiH96/cndBLaHM0LWVL6bzqgE3M22u8BWrhcwmNQ28=; b=XwIWoKCcD+UrEnxAOVpdW/CvkkrRePkXQWhg5NtU1mKPqZr55FjZfMvqWFOTbCZnN5 UoItpMzzbxCAuJCNWwfHgZ1Sz3YjjO2TIS87SVMP3xtBrvJKDgxlQhz1gZshervX2mUD Jn547f6lVDMyW29nscqZaskinPcfOwq7OLRLi/0L618jkNk4G31fUI1aCVNavs4JFa/g ArVY+cv33EM3cS0kDUE2XNiNrm7lC+kNvZ/k9U6gEx4klO6z4vz5/6in1RbCPTm8P+xK CeKWhqzvcfCZhTxZt2cs/VVHub70VLutMVatGpFzY7MyYLSUMkZqHaFTDG0hLsFJ4c/x sZBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rmiH96/cndBLaHM0LWVL6bzqgE3M22u8BWrhcwmNQ28=; b=Edb8B7ee5r2Qr8neeqHIc1bNUA5rM9crNwBVUqqt2PK1SqKKvZynj9LLfzMKe3QCRH DDjFw05JRU0WAhx1dQcwOBeGy+AaIFtsqYTWAchYGiPgMsoigf2LrTDuXJKgPdt+mULx IFHfUlHDlKIQVuiUdp08yIomm7EG1vP5/qoQZ6ILB6E2Kv64LIKLpyvO8Jw7gNw/6qKT pNbmZXp1Qv3V8awF5w91uM99mXdgs8VvPaI8cdqlLzeXkDSLGvBdAfgvMh3z2UTD4gwX 8/Sx/pB17crbhrhBdusg/9m+yeMh/2eqadfZv/o8ekWXTqiNfKAtBqJGzM5Tbr1STRJv viAg== X-Gm-Message-State: APjAAAUIAHEV0EiFAusvCwao5CCWWZztqBWR/0RPfYbabE7gs3FS/zQ8 loZUmCBRYSLAmiNyChpWvDB+ismiIdM= X-Google-Smtp-Source: APXvYqz1IQFINGVDCo7iKW85x2FYCsqhTrxcNlEdTbwOXgxFPogT3WrqWP6tsXIWt3/LRbrBIMGbOA== X-Received: by 2002:a05:600c:211:: with SMTP id 17mr6140547wmi.60.1581604923152; Thu, 13 Feb 2020 06:42:03 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 12/46] target/arm: Add isar_feature tests for PAN + ATS1E1 Date: Thu, 13 Feb 2020 14:41:11 +0000 Message-Id: <20200213144145.818-13-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Richard Henderson Include definitions for all of the bits in ID_MMFR3. We already have a definition for ID_AA64MMFR1.PAN. Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20200208125816.14954-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu.h | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index c63bceaaa5f..08b2f5d73e4 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1727,6 +1727,15 @@ FIELD(ID_ISAR6, FHM, 8, 4) FIELD(ID_ISAR6, SB, 12, 4) FIELD(ID_ISAR6, SPECRES, 16, 4) =20 +FIELD(ID_MMFR3, CMAINTVA, 0, 4) +FIELD(ID_MMFR3, CMAINTSW, 4, 4) +FIELD(ID_MMFR3, BPMAINT, 8, 4) +FIELD(ID_MMFR3, MAINTBCST, 12, 4) +FIELD(ID_MMFR3, PAN, 16, 4) +FIELD(ID_MMFR3, COHWALK, 20, 4) +FIELD(ID_MMFR3, CMEMSZ, 24, 4) +FIELD(ID_MMFR3, SUPERSEC, 28, 4) + FIELD(ID_MMFR4, SPECSEI, 0, 4) FIELD(ID_MMFR4, AC2, 4, 4) FIELD(ID_MMFR4, XNX, 8, 4) @@ -3443,6 +3452,16 @@ static inline bool isar_feature_aa32_vminmaxnm(const= ARMISARegisters *id) return FIELD_EX64(id->mvfr2, MVFR2, FPMISC) >=3D 4; } =20 +static inline bool isar_feature_aa32_pan(const ARMISARegisters *id) +{ + return FIELD_EX64(id->mvfr0, ID_MMFR3, PAN) !=3D 0; +} + +static inline bool isar_feature_aa32_ats1e1(const ARMISARegisters *id) +{ + return FIELD_EX64(id->mvfr0, ID_MMFR3, PAN) >=3D 2; +} + /* * 64-bit feature tests via id registers. */ @@ -3602,6 +3621,16 @@ static inline bool isar_feature_aa64_lor(const ARMIS= ARegisters *id) return FIELD_EX64(id->id_aa64mmfr1, ID_AA64MMFR1, LO) !=3D 0; } =20 +static inline bool isar_feature_aa64_pan(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64mmfr1, ID_AA64MMFR1, PAN) !=3D 0; +} + +static inline bool isar_feature_aa64_ats1e1(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64mmfr1, ID_AA64MMFR1, PAN) >=3D 2; +} + static inline bool isar_feature_aa64_bti(const ARMISARegisters *id) { return FIELD_EX64(id->id_aa64pfr1, ID_AA64PFR1, BT) !=3D 0; --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581606033459875.1081020807828; Thu, 13 Feb 2020 07:00:33 -0800 (PST) Received: from localhost ([::1]:54112 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fyf-0002p0-Vf for importer@patchew.org; Thu, 13 Feb 2020 10:00:30 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60229) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fgx-0004MY-5R for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:12 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fgs-0001oW-Ql for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:11 -0500 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]:55646) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fgs-0001lt-JY for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:06 -0500 Received: by mail-wm1-x32e.google.com with SMTP id q9so6527353wmj.5 for ; Thu, 13 Feb 2020 06:42:05 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. 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X-Received-From: 2a00:1450:4864:20::32e X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Richard Henderson For static const regdefs, file scope is preferred. Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson Message-id: 20200208125816.14954-5-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/helper.c | 57 +++++++++++++++++++++++---------------------- 1 file changed, 29 insertions(+), 28 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index bfd6c0d04bd..e4f17c7e839 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6334,6 +6334,35 @@ static CPAccessResult access_lor_other(CPUARMState *= env, return access_lor_ns(env); } =20 +/* + * A trivial implementation of ARMv8.1-LOR leaves all of these + * registers fixed at 0, which indicates that there are zero + * supported Limited Ordering regions. + */ +static const ARMCPRegInfo lor_reginfo[] =3D { + { .name =3D "LORSA_EL1", .state =3D ARM_CP_STATE_AA64, + .opc0 =3D 3, .opc1 =3D 0, .crn =3D 10, .crm =3D 4, .opc2 =3D 0, + .access =3D PL1_RW, .accessfn =3D access_lor_other, + .type =3D ARM_CP_CONST, .resetvalue =3D 0 }, + { .name =3D "LOREA_EL1", .state =3D ARM_CP_STATE_AA64, + .opc0 =3D 3, .opc1 =3D 0, .crn =3D 10, .crm =3D 4, .opc2 =3D 1, + .access =3D PL1_RW, .accessfn =3D access_lor_other, + .type =3D ARM_CP_CONST, .resetvalue =3D 0 }, + { .name =3D "LORN_EL1", .state =3D ARM_CP_STATE_AA64, + .opc0 =3D 3, .opc1 =3D 0, .crn =3D 10, .crm =3D 4, .opc2 =3D 2, + .access =3D PL1_RW, .accessfn =3D access_lor_other, + .type =3D ARM_CP_CONST, .resetvalue =3D 0 }, + { .name =3D "LORC_EL1", .state =3D ARM_CP_STATE_AA64, + .opc0 =3D 3, .opc1 =3D 0, .crn =3D 10, .crm =3D 4, .opc2 =3D 3, + .access =3D PL1_RW, .accessfn =3D access_lor_other, + .type =3D ARM_CP_CONST, .resetvalue =3D 0 }, + { .name =3D "LORID_EL1", .state =3D ARM_CP_STATE_AA64, + .opc0 =3D 3, .opc1 =3D 0, .crn =3D 10, .crm =3D 4, .opc2 =3D 7, + .access =3D PL1_R, .accessfn =3D access_lorid, + .type =3D ARM_CP_CONST, .resetvalue =3D 0 }, + REGINFO_SENTINEL +}; + #ifdef TARGET_AARCH64 static CPAccessResult access_pauth(CPUARMState *env, const ARMCPRegInfo *r= i, bool isread) @@ -7568,34 +7597,6 @@ void register_cp_regs_for_features(ARMCPU *cpu) } =20 if (cpu_isar_feature(aa64_lor, cpu)) { - /* - * A trivial implementation of ARMv8.1-LOR leaves all of these - * registers fixed at 0, which indicates that there are zero - * supported Limited Ordering regions. - */ - static const ARMCPRegInfo lor_reginfo[] =3D { - { .name =3D "LORSA_EL1", .state =3D ARM_CP_STATE_AA64, - .opc0 =3D 3, .opc1 =3D 0, .crn =3D 10, .crm =3D 4, .opc2 =3D= 0, - .access =3D PL1_RW, .accessfn =3D access_lor_other, - .type =3D ARM_CP_CONST, .resetvalue =3D 0 }, - { .name =3D "LOREA_EL1", .state =3D ARM_CP_STATE_AA64, - .opc0 =3D 3, .opc1 =3D 0, .crn =3D 10, .crm =3D 4, .opc2 =3D= 1, - .access =3D PL1_RW, .accessfn =3D access_lor_other, - .type =3D ARM_CP_CONST, .resetvalue =3D 0 }, - { .name =3D "LORN_EL1", .state =3D ARM_CP_STATE_AA64, - .opc0 =3D 3, .opc1 =3D 0, .crn =3D 10, .crm =3D 4, .opc2 =3D= 2, - .access =3D PL1_RW, .accessfn =3D access_lor_other, - .type =3D ARM_CP_CONST, .resetvalue =3D 0 }, - { .name =3D "LORC_EL1", .state =3D ARM_CP_STATE_AA64, - .opc0 =3D 3, .opc1 =3D 0, .crn =3D 10, .crm =3D 4, .opc2 =3D= 3, - .access =3D PL1_RW, .accessfn =3D access_lor_other, - .type =3D ARM_CP_CONST, .resetvalue =3D 0 }, - { .name =3D "LORID_EL1", .state =3D ARM_CP_STATE_AA64, - .opc0 =3D 3, .opc1 =3D 0, .crn =3D 10, .crm =3D 4, .opc2 =3D= 7, - .access =3D PL1_R, .accessfn =3D access_lorid, - .type =3D ARM_CP_CONST, .resetvalue =3D 0 }, - REGINFO_SENTINEL - }; define_arm_cp_regs(cpu, lor_reginfo); } =20 --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581607368636859.2968221063721; Thu, 13 Feb 2020 07:22:48 -0800 (PST) Received: from localhost ([::1]:54192 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2G1m-0006fO-6L for importer@patchew.org; Thu, 13 Feb 2020 10:03:42 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60234) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fgx-0004Mj-8W for qemu-devel@nongnu.org; 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.04 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=qM64BUtAr1z/gzsTM4GBdk2IcG0HXVAZX8dYXOH96BA=; b=u8Mm/N4hZAl7gR3keulCxy1dyGb85TerAxIlKCGkr2IB5Y1unMbOBN0GZGEdmGDcq+ cosGMYRLAk+Uwa2ryQhFssnZybaQrI99GCaXQWI5rO0MvZq/tYUkMfpJpzBtmbqrsm7M 40Qg4gA/2Iz+2tkNWVXXqgz80yX9BJQ5rD8MHVHdeeuLFBLD4e2Zt+IOAMUHZRL93d3N 6kmse1eTAlKT8HLrFpHuDMAwUE+JAquhaIa3/gIDt+HWC0q3PM1xkDsAOE6v1MyyYRf6 1icvjRzdUf4LMAe6h+nQwQTtcd8K6m6eIHR9GqOz2AwoWpsHrZB0D/en5rE4WtdomCLH 9jkQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qM64BUtAr1z/gzsTM4GBdk2IcG0HXVAZX8dYXOH96BA=; b=ELstgiutbkY16pnJAgQiNd4Pc57xnASUDllAPoiJBgp2Oag30g0SZEiJ5Hcp0WqltY W8DwM+yaHLo/EWz3WwAhYExUAfP0sADc8zV3sAj2rBiNnX6lDp2AqHZ5h1HEXKIQS04F POa9fIuWlQhUGiSQLLFCIJO7tAFSRorvoZEVwlPiurQrjhRUa+zbEk+NiNTMg62X+hH6 8hLH2FMlCA4TJoxZveXw9vHiwPJcHxZr9RQD8HhB5oHhfpNCkIhWzTUyQ7/bSQdIjKQf jk2vhWGlE099iaYaHBDF5BmSx2iX2guEuWw9osFDBfgVznUB+f8PPLenJ7Z/2LR2LGkH bVkA== X-Gm-Message-State: APjAAAXPnMjDf/0B2Z22f41mDJyqplsgKXYW5E/YnUI3/PIShDc4wQhJ +Hi5BbxS0Yt6wtjEcLff6b/KOBlN/x4= X-Google-Smtp-Source: APXvYqwqUbpX6PPHB0K9/5wXy3zMloZ19RB8C0BLOWDYrkejCReBbhBvEVYigW8YoF/RfQNpTwtaqw== X-Received: by 2002:a5d:638f:: with SMTP id p15mr21851653wru.402.1581604925465; Thu, 13 Feb 2020 06:42:05 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 14/46] target/arm: Split out aarch32_cpsr_valid_mask Date: Thu, 13 Feb 2020 14:41:13 +0000 Message-Id: <20200213144145.818-15-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::429 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Richard Henderson Split this helper out of msr_mask in translate.c. At the same time, transform the negative reductive logic to positive accumulative logic. It will be usable along the exception paths. While touching msr_mask, fix up formatting. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-id: 20200208125816.14954-6-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/internals.h | 21 +++++++++++++++++++++ target/arm/translate.c | 40 +++++++++++++++++----------------------- 2 files changed, 38 insertions(+), 23 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 6be8b2d1a9b..4d4896fcdcf 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1061,6 +1061,27 @@ static inline bool arm_mmu_idx_is_stage1_of_2(ARMMMU= Idx mmu_idx) } } =20 +static inline uint32_t aarch32_cpsr_valid_mask(uint64_t features, + const ARMISARegisters *id) +{ + uint32_t valid =3D CPSR_M | CPSR_AIF | CPSR_IL | CPSR_NZCV | CPSR_J; + + if ((features >> ARM_FEATURE_V4T) & 1) { + valid |=3D CPSR_T; + } + if ((features >> ARM_FEATURE_V5) & 1) { + valid |=3D CPSR_Q; /* V5TE in reality*/ + } + if ((features >> ARM_FEATURE_V6) & 1) { + valid |=3D CPSR_E | CPSR_GE; + } + if ((features >> ARM_FEATURE_THUMB2) & 1) { + valid |=3D CPSR_IT; + } + + return valid; +} + /* * Parameters of a given virtual address, as extracted from the * translation control register (TCR) for a given regime. diff --git a/target/arm/translate.c b/target/arm/translate.c index d58c328e08e..20f89ace2fd 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -2734,39 +2734,33 @@ static inline void gen_mulxy(TCGv_i32 t0, TCGv_i32 = t1, int x, int y) /* Return the mask of PSR bits set by a MSR instruction. */ static uint32_t msr_mask(DisasContext *s, int flags, int spsr) { - uint32_t mask; + uint32_t mask =3D 0; =20 - mask =3D 0; - if (flags & (1 << 0)) + if (flags & (1 << 0)) { mask |=3D 0xff; - if (flags & (1 << 1)) + } + if (flags & (1 << 1)) { mask |=3D 0xff00; - if (flags & (1 << 2)) + } + if (flags & (1 << 2)) { mask |=3D 0xff0000; - if (flags & (1 << 3)) + } + if (flags & (1 << 3)) { mask |=3D 0xff000000; + } =20 - /* Mask out undefined bits. */ - mask &=3D ~CPSR_RESERVED; - if (!arm_dc_feature(s, ARM_FEATURE_V4T)) { - mask &=3D ~CPSR_T; - } - if (!arm_dc_feature(s, ARM_FEATURE_V5)) { - mask &=3D ~CPSR_Q; /* V5TE in reality*/ - } - if (!arm_dc_feature(s, ARM_FEATURE_V6)) { - mask &=3D ~(CPSR_E | CPSR_GE); - } - if (!arm_dc_feature(s, ARM_FEATURE_THUMB2)) { - mask &=3D ~CPSR_IT; - } - /* Mask out execution state and reserved bits. */ + /* Mask out undefined and reserved bits. */ + mask &=3D aarch32_cpsr_valid_mask(s->features, s->isar); + + /* Mask out execution state. */ if (!spsr) { - mask &=3D ~(CPSR_EXEC | CPSR_RESERVED); + mask &=3D ~CPSR_EXEC; } + /* Mask out privileged bits. */ - if (IS_USER(s)) + if (IS_USER(s)) { mask &=3D CPSR_USER; + } return mask; } =20 --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581605079635596.6719483278152; Thu, 13 Feb 2020 06:44:39 -0800 (PST) Received: from localhost ([::1]:53738 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2FjJ-0006Jc-6G for importer@patchew.org; Thu, 13 Feb 2020 09:44:37 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60280) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fgy-0004Pd-Gb for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:13 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fgx-0001tw-Dd for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:12 -0500 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]:39376) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fgx-0001po-4x for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:11 -0500 Received: by mail-wr1-x42b.google.com with SMTP id y11so6975711wrt.6 for ; Thu, 13 Feb 2020 06:42:11 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.05 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=e6on02dnrs5jFbqtts6LxryeASmr3K7bhWptuLVimw8=; b=UeGJqUI7wpuv1FObzUeoBLfEvl1ddgHcyQISgQsQtEzumcQK4j9gi5xtTvlD5eo9RX U3G24aqCVNYuDqaRguUGUgwK8wIsjPD4P2lMmB5c/fx2IBh9JFEHsYBINAEMogMVJfvv U45hlad7VoYj0FnlnZZBgSRRAqa/F+I2NTNB2MFF2ipoILPtLS5/9pcnmUZnsEbU6osO CtGT4v5LRQ/BWxjvlcKqInUBd6HvmmmndLUUHUSWjEPF1R7fy9u0Z1pCltxTdjw+5GNW noQw96kZkGhe42mXCAoxAnkVUE7W6awoW9ih0cdQlldHyDwDnkKDhtiBbR3cSjx06knX 9tdw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=e6on02dnrs5jFbqtts6LxryeASmr3K7bhWptuLVimw8=; b=EKlwcB4R0S4zw+iOG54gt94IKsHIrZQZ21qs0VLk0Q5LkrKM8j7rpf13MOPgVV3rBz q2QscgcXK0XqAtiQO1FfFMXXlDAAfaQM/LwOwpiBe75dAW2rmlw3fckLkFKz7D/3pgqA aTImDmbm70sJgHWbAUtMrzwT0Z0J8hVmn2RYmPPEn8P3uMLHZt36BpoGdL8jT7SEup1K TDjR11/VwcEntXeu8//HKGfekD7OMCGZXbjXJEEyiGqZLKGX+4nLmzUIlfQATfASm19E khIi0qJB8FdshWAsV1Al/navKB5MY90QOpcjlZdMuq7RPTDBKVf53dnNY+9NJBHFpfmM KJXg== X-Gm-Message-State: APjAAAVuSbIWm+dFK/R1yFOV0SwbVCmU9eSJd7dgUgyHH+IWWErPlQnn ZdzXyPrLcWM4hBUCKKfF33TuUR/TM+E= X-Google-Smtp-Source: APXvYqw2gzCgoo7maE7zT+Q7KuBG4BTnQ6YlF8/ULFoqQxoxMPui1Gpj5Z1eIAFYcBLfuHYaFpFFFg== X-Received: by 2002:adf:8b54:: with SMTP id v20mr23157437wra.390.1581604926785; Thu, 13 Feb 2020 06:42:06 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 15/46] target/arm: Mask CPSR_J when Jazelle is not enabled Date: Thu, 13 Feb 2020 14:41:14 +0000 Message-Id: <20200213144145.818-16-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42b X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Richard Henderson The J bit signals Jazelle mode, and so of course is RES0 when the feature is not enabled. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-id: 20200208125816.14954-7-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/internals.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 4d4896fcdcf..0569c96fd94 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1064,7 +1064,7 @@ static inline bool arm_mmu_idx_is_stage1_of_2(ARMMMUI= dx mmu_idx) static inline uint32_t aarch32_cpsr_valid_mask(uint64_t features, const ARMISARegisters *id) { - uint32_t valid =3D CPSR_M | CPSR_AIF | CPSR_IL | CPSR_NZCV | CPSR_J; + uint32_t valid =3D CPSR_M | CPSR_AIF | CPSR_IL | CPSR_NZCV; =20 if ((features >> ARM_FEATURE_V4T) & 1) { valid |=3D CPSR_T; @@ -1078,6 +1078,9 @@ static inline uint32_t aarch32_cpsr_valid_mask(uint64= _t features, if ((features >> ARM_FEATURE_THUMB2) & 1) { valid |=3D CPSR_IT; } + if (isar_feature_jazelle(id)) { + valid |=3D CPSR_J; + } =20 return valid; } --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581605227993200.22779504476432; Thu, 13 Feb 2020 06:47:07 -0800 (PST) Received: from localhost ([::1]:53816 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Flh-0001br-Ph for importer@patchew.org; Thu, 13 Feb 2020 09:47:06 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60275) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fgy-0004PC-AZ for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:13 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fgx-0001tF-8x for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:12 -0500 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]:36152) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fgx-0001qa-0P for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:11 -0500 Received: by mail-wr1-x42a.google.com with SMTP id z3so7010630wru.3 for ; Thu, 13 Feb 2020 06:42:10 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.06 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=UM5sTdj2EYOtgEuwYW49VvaCFPwcbtuVqRLWhdo1ojU=; b=uxH3ziJk0qIPc1YVZiQQH+XoWOHB5dpNXtOuw2FKgNoVQv5xi0MmKvYZmZhB1VUt5A lHqQ6Nr0McGN5Z/dAOrkxHfk0aulpd6UBN8Dd7ZTcgTzkmYB9YSITIUgcE7Rp+UvEj4h DX2TcpIAKfG7HqDRIziSSu0l1guaZsoZtNCffPQV7+6NVPlFEeNI7iBACv3wD8c/hgBS UElWmnU3pzy/RpYBJ4Xcc4ltC5bBaDTJk4WnBU1BwHGGt26hc/U9e421QQvRIMJDsyet s2EaNr5A5uW3piTymqzeaQjfijtGzuxFjkss+DFGEz5rfV7gQItl6Qhu2r+7N/SMexaD qYJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UM5sTdj2EYOtgEuwYW49VvaCFPwcbtuVqRLWhdo1ojU=; b=ICPdakCVMMU2oguG77aPLnBTZw+JTdmEpYFR44yhz0pBIex7S8PjqyDi4hGrAOAhl+ e4MsEZyV0OcULXyHLRDASyTLhdWL3Y23hgLy+UIYRJ03qxHxtgFyMyhRfI7rkxVPWK2A o6zTB6+zesRj721JV5paXzGWOucKmstIKXSrDios1rx/ca3fTRIVj2cRaKhNLTfD5gRf S0UHBG1KiT45Sd/eymwc4oBqOxCK8GCsSmX/HPEhc4LLG3KvhCy2OIvajutFOVnNg0od xhJLk4qpIR1bkGASsxuZF7AlwFtI14Gz9dMWc6XoFIYjkNWMnoV/JoP+cjjvgz0Ip/8k 4u3g== X-Gm-Message-State: APjAAAX9sgBs8K/SS76a/KyKUTp5/0w5anf7NjM4tMFKyU9/6n9r3jJ3 ImyG7Z9Lzzn4ChMNd+aDFi9HC3pWsZ0= X-Google-Smtp-Source: APXvYqziaRDFKqcP9fPh/ja2IXC4Q/rOn/gUaeO2ip1QZbl/l0zqs8RHl33ZH3OwcZ7Og0NxYUjwXQ== X-Received: by 2002:adf:c453:: with SMTP id a19mr22318154wrg.341.1581604927704; Thu, 13 Feb 2020 06:42:07 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 16/46] target/arm: Replace CPSR_ERET_MASK with aarch32_cpsr_valid_mask Date: Thu, 13 Feb 2020 14:41:15 +0000 Message-Id: <20200213144145.818-17-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Richard Henderson CPSR_ERET_MASK was a useless renaming of CPSR_RESERVED. The function also takes into account bits that the cpu does not support. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20200208125816.14954-8-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu.h | 2 -- target/arm/op_helper.c | 5 ++++- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 08b2f5d73e4..694b0742983 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1209,8 +1209,6 @@ void pmu_init(ARMCPU *cpu); #define CPSR_USER (CPSR_NZCV | CPSR_Q | CPSR_GE) /* Execution state bits. MRS read as zero, MSR writes ignored. */ #define CPSR_EXEC (CPSR_T | CPSR_IT | CPSR_J | CPSR_IL) -/* Mask of bits which may be set by exception return copying them from SPS= R */ -#define CPSR_ERET_MASK (~CPSR_RESERVED) =20 /* Bit definitions for M profile XPSR. Most are the same as CPSR. */ #define XPSR_EXCP 0x1ffU diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c index 27d16ad9ad9..acf1815ea3e 100644 --- a/target/arm/op_helper.c +++ b/target/arm/op_helper.c @@ -400,11 +400,14 @@ void HELPER(cpsr_write)(CPUARMState *env, uint32_t va= l, uint32_t mask) /* Write the CPSR for a 32-bit exception return */ void HELPER(cpsr_write_eret)(CPUARMState *env, uint32_t val) { + uint32_t mask; + qemu_mutex_lock_iothread(); arm_call_pre_el_change_hook(env_archcpu(env)); qemu_mutex_unlock_iothread(); =20 - cpsr_write(env, val, CPSR_ERET_MASK, CPSRWriteExceptionReturn); + mask =3D aarch32_cpsr_valid_mask(env->features, &env_archcpu(env)->isa= r); + cpsr_write(env, val, mask, CPSRWriteExceptionReturn); =20 /* Generated code has already stored the new PC value, but * without masking out its low bits, because which bits need --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581605414961110.2362338767681; Thu, 13 Feb 2020 06:50:14 -0800 (PST) Received: from localhost ([::1]:53876 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Foi-00056B-TR for importer@patchew.org; Thu, 13 Feb 2020 09:50:12 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60279) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fgy-0004PY-Fm for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:13 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fgx-0001tI-98 for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:12 -0500 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]:36564) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fgx-0001qe-0A for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:11 -0500 Received: by mail-wm1-x335.google.com with SMTP id p17so7025970wma.1 for ; Thu, 13 Feb 2020 06:42:10 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.07 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=m2dLEYJaJTFcXfFVK5jWIib2jbC07UmG8YI+7vEwhGE=; b=E80EYpEOl4feEEqsuDvsG/RpHnCEY0e/0WX9JofdCj4faAL3OFsn/WTqVOPt2Oklsd KkdTiSW64R/TankoFFCW6BFIUnZztL48UJZXYvbm/RPGhnfD5PLtVi9t/Ow2r+P/M9Sm c9DuQXzJOX7Tk68tynAN6Xphfpz3r6HhMkPlSDMm3Z0eoR9rm4FMnCmUoJe1VO4Ivj1O lX+aKM3K08hrCZSaBHFSD+kOY4diF647b3mZgSYRghzD9l736JSOMWZwJ1aEvioax4pM HJrXZ50l0bsSS/LVmmG/eZb16z7A1+brms4F+ZF2dvGNtV6od5hqgc2RH/9G35X9bO2A yi9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=m2dLEYJaJTFcXfFVK5jWIib2jbC07UmG8YI+7vEwhGE=; b=fr1bZBpUe4mY2FZg7QgaQfZiaClZowp1byvW1HnNcq/tElg5jg8J+cyXMpDNnP4TUV t5vTRi1S660tiausD0pz2GKX4oaqrXYgDC3cJLAdP0e3E29swh59zcMIP3q1uYAqBKth C3EecHHsBZz+Iyj86K7Jnp5TkjcyV2UPh06LZViVm+5za0Mh+SMx8NANfIF5DLVWSUqh 8K7TtAC/uGGuA2KofhJx8N82txaqRgnkUeuS7F3qb+5MPb8NjYLeGUBesAPfBNocGmx/ 9GunPGmMFeKpkT/Fa/aPpNvAp4Mvm1kS0kSzw4wapqGuFNB8aR0NDNbIw6D7+v8Wr2iA A4TQ== X-Gm-Message-State: APjAAAUSEeQWrwOyybE0PERdI3Dv0BM5QjpULjpX+y7GBEoSa/Wjt3f4 3xkRCTA1083m91Q+QPPA9V1PgIRYLEA= X-Google-Smtp-Source: APXvYqwS3UUCv0vMIr//1klnJCoLaNJzOMpwhdufzvVOvPLysUqGpEiF/ejsPHUiFYAuZziwUDNW1w== X-Received: by 2002:a7b:c5cd:: with SMTP id n13mr6205303wmk.172.1581604928709; Thu, 13 Feb 2020 06:42:08 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 17/46] target/arm: Use aarch32_cpsr_valid_mask in helper_exception_return Date: Thu, 13 Feb 2020 14:41:16 +0000 Message-Id: <20200213144145.818-18-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::335 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Richard Henderson Using ~0 as the mask on the aarch64->aarch32 exception return was not even as correct as the CPSR_ERET_MASK that we had used on the aarch32->aarch32 exception return. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20200208125816.14954-9-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/helper-a64.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c index bf45f8a785e..0c9feba3929 100644 --- a/target/arm/helper-a64.c +++ b/target/arm/helper-a64.c @@ -959,7 +959,7 @@ void HELPER(exception_return)(CPUARMState *env, uint64_= t new_pc) { int cur_el =3D arm_current_el(env); unsigned int spsr_idx =3D aarch64_banked_spsr_index(cur_el); - uint32_t spsr =3D env->banked_spsr[spsr_idx]; + uint32_t mask, spsr =3D env->banked_spsr[spsr_idx]; int new_el; bool return_to_aa64 =3D (spsr & PSTATE_nRW) =3D=3D 0; =20 @@ -1014,7 +1014,8 @@ void HELPER(exception_return)(CPUARMState *env, uint6= 4_t new_pc) * will sort the register banks out for us, and we've already * caught all the bad-mode cases in el_from_spsr(). */ - cpsr_write(env, spsr, ~0, CPSRWriteRaw); + mask =3D aarch32_cpsr_valid_mask(env->features, &env_archcpu(env)-= >isar); + cpsr_write(env, spsr, mask, CPSRWriteRaw); if (!arm_singlestep_active(env)) { env->uncached_cpsr &=3D ~PSTATE_SS; } --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581607259896169.12003981535906; Thu, 13 Feb 2020 07:20:59 -0800 (PST) Received: from localhost ([::1]:54290 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2G6k-0004XB-Kz for importer@patchew.org; Thu, 13 Feb 2020 10:08:50 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60278) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fgy-0004PX-Ga for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:13 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fgx-0001tm-Be for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:12 -0500 Received: from mail-wr1-x443.google.com ([2a00:1450:4864:20::443]:43980) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fgx-0001rd-3C for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:11 -0500 Received: by mail-wr1-x443.google.com with SMTP id r11so6955866wrq.10 for ; Thu, 13 Feb 2020 06:42:11 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.08 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=9tFGVjt/GzRfWPBxkYgLYTC/HKT0pYq/v3Uvgjdh4bY=; b=uIqpCsoDSFdkQayU1x2GtBIFGQRt9/4V1wxrfmdz8r6qRzPyrfp8SAvaHhDP8e0HCi 3g7kAZW6KkiRvqo9BG7Bxqp2gxjAAYqYtLliZFBNecsaupymtrQWIsBlbPo+JhZEfA1+ WBq4AjvNhVSLhv6UtUZM8RyiJ+uKz6Z0QsfoP9rOoMUyKoEW5XwYpMw4s4pIWRTCmxkB 74pFnwfRxyQsZ7yD0WJUwjVPEbH8MovdnqRxpWoTWMSUZ3p3kfqmmmo9qXulha3XvbOV gpa+9HCZkVhq6duazP2szy5LCDxAQ2PVbVrPCktnrmuw/IzveMUPyQ4RVdT90iXpcaiJ x2lg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9tFGVjt/GzRfWPBxkYgLYTC/HKT0pYq/v3Uvgjdh4bY=; b=LkEwlJQzlIkArm0SzjGYnps55f5EGRV5qJUI99Z4dtSlH1eFBUJN5QCvGjbtYFaKmc mIX36I8nCmfE+4+fbHxGvjNxas3FEWLbbGm1ItxIEDAQw9VCZ4L4j66YuxfU2WexPWsa 6Hwv0EfboRAfvvttrj+7D/t3dd3FH6Bag360lpcFpq4ulj/99TwBcw0OuMfIYk1DLef3 4yw7/vOciKJ4LfopGQbSNHf0V6Mjer9OlQDZ56HMljm9ZTHTzca7pEqBF8q78l2oDXLh 2d55ONl5izSFFjKRtsM/Vgt1S1Jwcnskp065PiLDnJ5eLrj3/e+clIlSpElbVS8ZqFaH MG4w== X-Gm-Message-State: APjAAAVlI1oePs1vbFo0fffm4cXcQdR2tuRW5dkZEePjBehjAketqBEV PmNtav+tsKJ2yLG8szSy6gSknuBN1EQ= X-Google-Smtp-Source: APXvYqyUUf9BVIgTUhscSck7207Bsb5wxH5MAC75aca1w2a/7usbaZzDM5FTD3pMlAN6GQPCcdJMGg== X-Received: by 2002:a5d:4fce:: with SMTP id h14mr24014325wrw.60.1581604929740; Thu, 13 Feb 2020 06:42:09 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 18/46] target/arm: Remove CPSR_RESERVED Date: Thu, 13 Feb 2020 14:41:17 +0000 Message-Id: <20200213144145.818-19-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Richard Henderson The only remaining use was in op_helper.c. Use PSTATE_SS directly, and move the commentary so that it is more obvious what is going on. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-id: 20200208125816.14954-10-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu.h | 6 ------ target/arm/op_helper.c | 9 ++++++++- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 694b0742983..c6dff1d55b6 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1186,12 +1186,6 @@ void pmu_init(ARMCPU *cpu); #define CPSR_IT_2_7 (0xfc00U) #define CPSR_GE (0xfU << 16) #define CPSR_IL (1U << 20) -/* Note that the RESERVED bits include bit 21, which is PSTATE_SS in - * an AArch64 SPSR but RES0 in AArch32 SPSR and CPSR. In QEMU we use - * env->uncached_cpsr bit 21 to store PSTATE.SS when executing in AArch32, - * where it is live state but not accessible to the AArch32 code. - */ -#define CPSR_RESERVED (0x7U << 21) #define CPSR_J (1U << 24) #define CPSR_IT_0_1 (3U << 25) #define CPSR_Q (1U << 27) diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c index acf1815ea3e..af3020b78f8 100644 --- a/target/arm/op_helper.c +++ b/target/arm/op_helper.c @@ -387,7 +387,14 @@ void HELPER(exception_bkpt_insn)(CPUARMState *env, uin= t32_t syndrome) =20 uint32_t HELPER(cpsr_read)(CPUARMState *env) { - return cpsr_read(env) & ~(CPSR_EXEC | CPSR_RESERVED); + /* + * We store the ARMv8 PSTATE.SS bit in env->uncached_cpsr. + * This is convenient for populating SPSR_ELx, but must be + * hidden from aarch32 mode, where it is not visible. + * + * TODO: ARMv8.4-DIT -- need to move SS somewhere else. + */ + return cpsr_read(env) & ~(CPSR_EXEC | PSTATE_SS); } =20 void HELPER(cpsr_write)(CPUARMState *env, uint32_t val, uint32_t mask) --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581605553906847.3387842375978; Thu, 13 Feb 2020 06:52:33 -0800 (PST) Received: from localhost ([::1]:53938 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fqy-0008Uu-KP for importer@patchew.org; Thu, 13 Feb 2020 09:52:32 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60311) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fgz-0004RH-B5 for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fgy-0001vL-7q for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:13 -0500 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]:37704) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fgy-0001tt-15 for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:12 -0500 Received: by mail-wm1-x333.google.com with SMTP id a6so7041220wme.2 for ; Thu, 13 Feb 2020 06:42:11 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.09 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=9Yi95nyPVD4aME4UhBrkHEkCDFEbapmAEBFinOLLlkY=; b=Vm0zVhJqbbgXr1TV/bzIYQBvV7s+u2LYb4Iw53ZNPRd1FHKjqfc0QCN9zM4AXMqQgs 03/ooQLlNFg8vXCQ1GH0mgJGH5hsNi6HA3yp/7n/Cd+7IAvov5qwB+vF0sk4Y9TZ2iY6 3fB6pWiOQFDIN62z6IhXBZSaPuNHWO5gA+iVhOXpSugsZs+mQBRi8/N9sJzvQ99wblIB F5HYgKaptn4djVWdi5Mh/hNxHryQ9O9CLGcd/7J83KNQhJu0HXBr6y3xx/kI8WxXGgUw f5htOriNPZ1xUKVzwkh1+QqJ3164pzNvu6oBIx6tQTSRdYVHAlNgcdLjE8XWoXlk+Qgx rU4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9Yi95nyPVD4aME4UhBrkHEkCDFEbapmAEBFinOLLlkY=; b=aO6VGsQsGEyVxkFI7sijeiQTak2isr0aLqliT4Xd5TKJHzb1eVCrsFo/5nVDC881bm Lfof+u3GzOfWPbUZ6bRKtNUG4hNyj7DA+n07f0GDHcolGLatsUL2+PT4+lC90xgR1R6U VPwEEtrDfJCPk2B5HNsnEPBjQdbSfd9rFhujf5hElW4PNZ1ELjB9OD1euprmjD2fF3Kq yrJLjEgDd/l5+GevWAg6e59bcjvpg7qdOjQSOyXRAdSI6tt4vC0Ot3MXJxT4UOe4PYvI S6CleZS0KS0IkKt1nSNNZgBzKW1dqMvmkLatri9Nv4HTjjmIKXPJ98gJgB6e/XnnhAim n8KA== X-Gm-Message-State: APjAAAVI2j4zjYaF744+VSG1N08SCRyEuPyDy286QpU0xLTpEYmDalaC mYN+APcE6BNcR/wQsMUKeSO809fKUE0= X-Google-Smtp-Source: APXvYqyUNRoC2ninHuHQ+7mmZCpvvkJWpPWZ33GScPmrAlyXshT1f4oKdbBrFG/MQgcaluVgTyeyEA== X-Received: by 2002:a7b:cab1:: with SMTP id r17mr6140801wml.116.1581604930710; Thu, 13 Feb 2020 06:42:10 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 19/46] target/arm: Introduce aarch64_pstate_valid_mask Date: Thu, 13 Feb 2020 14:41:18 +0000 Message-Id: <20200213144145.818-20-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::333 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Richard Henderson Use this along the exception return path, where we previously accepted any values. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20200208125816.14954-11-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/internals.h | 12 ++++++++++++ target/arm/helper-a64.c | 1 + 2 files changed, 13 insertions(+) diff --git a/target/arm/internals.h b/target/arm/internals.h index 0569c96fd94..034d98ad538 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1085,6 +1085,18 @@ static inline uint32_t aarch32_cpsr_valid_mask(uint6= 4_t features, return valid; } =20 +static inline uint32_t aarch64_pstate_valid_mask(const ARMISARegisters *id) +{ + uint32_t valid; + + valid =3D PSTATE_M | PSTATE_DAIF | PSTATE_IL | PSTATE_SS | PSTATE_NZCV; + if (isar_feature_aa64_bti(id)) { + valid |=3D PSTATE_BTYPE; + } + + return valid; +} + /* * Parameters of a given virtual address, as extracted from the * translation control register (TCR) for a given regime. diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c index 0c9feba3929..509ae930698 100644 --- a/target/arm/helper-a64.c +++ b/target/arm/helper-a64.c @@ -1032,6 +1032,7 @@ void HELPER(exception_return)(CPUARMState *env, uint6= 4_t new_pc) cur_el, new_el, env->regs[15]); } else { env->aarch64 =3D 1; + spsr &=3D aarch64_pstate_valid_mask(&env_archcpu(env)->isar); pstate_write(env, spsr); if (!arm_singlestep_active(env)) { env->pstate &=3D ~PSTATE_SS; --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581605733435203.83958384126618; Thu, 13 Feb 2020 06:55:33 -0800 (PST) Received: from localhost ([::1]:53998 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fts-0003xa-6R for importer@patchew.org; Thu, 13 Feb 2020 09:55:32 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60330) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fh0-0004UW-Er for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:18 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fgz-0001xO-8P for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:14 -0500 Received: from mail-wr1-x443.google.com ([2a00:1450:4864:20::443]:42446) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fgz-0001wA-1c for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:13 -0500 Received: by mail-wr1-x443.google.com with SMTP id k11so6971582wrd.9 for ; Thu, 13 Feb 2020 06:42:12 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.10 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=+ZCL+35F1Ez3bM5+edPRdLJ0LuMquABU+ROVw/U0SwM=; b=PstuYtpgEPP12b6vN8PiJ6mYqNJM419/x9HUH3AuAXnhfsDySteIO9PrRZFO3dAzOd bHOr4S4djzBikcecXMazQL5LjZn1hLEg2rn6NrFuCXEovvHLaBAXDefx6bLzv364yifj GGEjKXbCnqjMkMa8eSNeulhh9oveMuPUaEu4C1Dcv9yRpxu0YaOLI0FPVbU0iRecUbj1 5vLn1tA4Ef3DfaWlDeDqJV5ZdxYxhNT/bPydWOi/2Uq0t069FQ5JJJXikRM9dnoUaD7l NhES/FpM4s6pCLscJxufNHKT5pRSinuZzayPcK4AEXdl0plViDYUkdIZzapj+Wmg4io3 wI1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+ZCL+35F1Ez3bM5+edPRdLJ0LuMquABU+ROVw/U0SwM=; b=CM89X0lmGR9rI+VtwIDshu3fapXd1s51KEbqXAJVBlE/RqiMRberu4KFhy5ximkeng luFmxByRcpTCKcnbJbg/cGWKlXxf80wbcs8EY38h9TkcdFSJ31F+IFQygOVX3MC9DZPK zGU8Q3jcmBGoroEO9UePreJ0JsW/jMv0LFAcHOFKbhSXETmwMm9qlc97THytmrh1dAiu OPxJSa3OAsfU27wjwO4mPx6K1I0NZoHBcngbvcVoidjjTIumb32dVOCDWEH+n1aicJT6 DE93wkWUQwmWxV4Icl119YtE7QDHyQN39/S46+pgBWDu3akq4oufgWyxWxPSuWrSGSvI 8+2w== X-Gm-Message-State: APjAAAVDps1SKdxJ92orl1SgtzLv2minRRtj9R/aIFqBVdo9XAxDPMm+ aH3OYUxW+PJJAj46dWXLqNjGMR+8/SQ= X-Google-Smtp-Source: APXvYqx8MFq3e5zSpxMldtUrG5JWaJJfxXrTE8vn9hQ4Q00e2vufO+plELhOnA43vQm2EEG3wCwUNQ== X-Received: by 2002:a5d:4d4a:: with SMTP id a10mr23349659wru.220.1581604931778; Thu, 13 Feb 2020 06:42:11 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 20/46] target/arm: Update MSR access for PAN Date: Thu, 13 Feb 2020 14:41:19 +0000 Message-Id: <20200213144145.818-21-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Richard Henderson For aarch64, there's a dedicated msr (imm, reg) insn. For aarch32, this is done via msr to cpsr. Writes from el0 are ignored, which is already handled by the CPSR_USER mask. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20200208125816.14954-12-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu.h | 2 ++ target/arm/internals.h | 6 ++++++ target/arm/helper.c | 21 +++++++++++++++++++++ target/arm/translate-a64.c | 14 ++++++++++++++ 4 files changed, 43 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index c6dff1d55b6..65a0ef8cd6b 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1186,6 +1186,7 @@ void pmu_init(ARMCPU *cpu); #define CPSR_IT_2_7 (0xfc00U) #define CPSR_GE (0xfU << 16) #define CPSR_IL (1U << 20) +#define CPSR_PAN (1U << 22) #define CPSR_J (1U << 24) #define CPSR_IT_0_1 (3U << 25) #define CPSR_Q (1U << 27) @@ -1250,6 +1251,7 @@ void pmu_init(ARMCPU *cpu); #define PSTATE_BTYPE (3U << 10) #define PSTATE_IL (1U << 20) #define PSTATE_SS (1U << 21) +#define PSTATE_PAN (1U << 22) #define PSTATE_V (1U << 28) #define PSTATE_C (1U << 29) #define PSTATE_Z (1U << 30) diff --git a/target/arm/internals.h b/target/arm/internals.h index 034d98ad538..f6709a2b08d 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1081,6 +1081,9 @@ static inline uint32_t aarch32_cpsr_valid_mask(uint64= _t features, if (isar_feature_jazelle(id)) { valid |=3D CPSR_J; } + if (isar_feature_aa32_pan(id)) { + valid |=3D CPSR_PAN; + } =20 return valid; } @@ -1093,6 +1096,9 @@ static inline uint32_t aarch64_pstate_valid_mask(cons= t ARMISARegisters *id) if (isar_feature_aa64_bti(id)) { valid |=3D PSTATE_BTYPE; } + if (isar_feature_aa64_pan(id)) { + valid |=3D PSTATE_PAN; + } =20 return valid; } diff --git a/target/arm/helper.c b/target/arm/helper.c index e4f17c7e839..058fb239592 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -4163,6 +4163,24 @@ static void aa64_daif_write(CPUARMState *env, const = ARMCPRegInfo *ri, env->daif =3D value & PSTATE_DAIF; } =20 +static uint64_t aa64_pan_read(CPUARMState *env, const ARMCPRegInfo *ri) +{ + return env->pstate & PSTATE_PAN; +} + +static void aa64_pan_write(CPUARMState *env, const ARMCPRegInfo *ri, + uint64_t value) +{ + env->pstate =3D (env->pstate & ~PSTATE_PAN) | (value & PSTATE_PAN); +} + +static const ARMCPRegInfo pan_reginfo =3D { + .name =3D "PAN", .state =3D ARM_CP_STATE_AA64, + .opc0 =3D 3, .opc1 =3D 0, .crn =3D 4, .crm =3D 2, .opc2 =3D 3, + .type =3D ARM_CP_NO_RAW, .access =3D PL1_RW, + .readfn =3D aa64_pan_read, .writefn =3D aa64_pan_write +}; + static CPAccessResult aa64_cacheop_access(CPUARMState *env, const ARMCPRegInfo *ri, bool isread) @@ -7599,6 +7617,9 @@ void register_cp_regs_for_features(ARMCPU *cpu) if (cpu_isar_feature(aa64_lor, cpu)) { define_arm_cp_regs(cpu, lor_reginfo); } + if (cpu_isar_feature(aa64_pan, cpu)) { + define_one_arm_cp_reg(cpu, &pan_reginfo); + } =20 if (arm_feature(env, ARM_FEATURE_EL2) && cpu_isar_feature(aa64_vh, cpu= )) { define_arm_cp_regs(cpu, vhe_reginfo); diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 49631c23404..d8ba240a155 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -1602,6 +1602,20 @@ static void handle_msr_i(DisasContext *s, uint32_t i= nsn, s->base.is_jmp =3D DISAS_NEXT; break; =20 + case 0x04: /* PAN */ + if (!dc_isar_feature(aa64_pan, s) || s->current_el =3D=3D 0) { + goto do_unallocated; + } + if (crm & 1) { + set_pstate_bits(PSTATE_PAN); + } else { + clear_pstate_bits(PSTATE_PAN); + } + t1 =3D tcg_const_i32(s->current_el); + gen_helper_rebuild_hflags_a64(cpu_env, t1); + tcg_temp_free_i32(t1); + break; + case 0x05: /* SPSel */ if (s->current_el =3D=3D 0) { goto do_unallocated; --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581605563066530.9396959375802; Thu, 13 Feb 2020 06:52:43 -0800 (PST) Received: from localhost ([::1]:53946 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fr7-0000MF-Fq for importer@patchew.org; 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.11 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=qjwWfe9cc7402cXgQDxYUA1cz+Es7+efoVSmoqlcaks=; b=QQ3/GAFeqqr6YBNd+ZQDNi0UD0i/VEEck4t75hXZVtlrtNO/HgrjsnA9wP6/zH0nwe WOi2NhH9xnYozBMvf7lpMm6pHS0LmzU+BIIaF7jovEdJghoKRzA8VtUBZxuc8MdHxDoa r09nYJiy7uRdxGh/ylcTWrTjnsDdkWa2OaFOkUF7QyspLXNVqvK3w5vhuvEBuutlH0Lj +GqgwPT/nj8kPPhQRNSqtw39PLC9mdurib+a6gdOhCkaL88GjgcvmK5NcVueQHIfY0Fq +qygWymlnH/Vb/ZiNcn6NnZ8Atxfd5a4JPSpw/hBe12rPVSoBCSK7RoRvgyHnawlnZfm rbEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qjwWfe9cc7402cXgQDxYUA1cz+Es7+efoVSmoqlcaks=; b=FsGa6zQd3a60CG/TYHGAFHvPSnfIRpqhrtl0hd8VYW3PP6aAbTkkEgYz/EDdTUPqPN m+vBfxIiYeRRnHeK3BarL8BqEvD3lfBc4wQAaKPV25d3f0sr4pMrSdFk/z2+DiFRUcVQ MAKNg5j3k4C9v6vH8EK2XMT8x70XgP7CnMTv9BhoRZo2sO8KQ0bS6mKg382TLNXkcas3 1SyBauUcfg8Ng4vms43zmLUfHFHPaDaNpxnK1BdS6h1XqgLPYVCtoQyP+Ia6ViijLKEJ 1cL9pyJmPyjfEyT9ucOHHAyy1IKX3H8ZahlKvlC5i33S6PEmz+sbVprvt0Hd2DrU8f06 jmwA== X-Gm-Message-State: APjAAAUarrGIg+NOo8TS0Duo0CBR5LK6XF/V88S2mnTfBVJWA5x/rTpu oKSIXBB065PYAO+crRqM53yung7e8Do= X-Google-Smtp-Source: APXvYqwUm6aYLwgxxgNVWuiDtEPENAgaOXCceN9JRt3veGqHfFbPjN0wtJ0+k+qj7tIeBA5+nNL3iA== X-Received: by 2002:adf:e610:: with SMTP id p16mr23566942wrm.81.1581604932703; Thu, 13 Feb 2020 06:42:12 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 21/46] target/arm: Update arm_mmu_idx_el for PAN Date: Thu, 13 Feb 2020 14:41:20 +0000 Message-Id: <20200213144145.818-22-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42b X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Richard Henderson Examine the PAN bit for EL1, EL2, and Secure EL1 to determine if it applies. Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20200208125816.14954-13-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/helper.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/target/arm/helper.c b/target/arm/helper.c index 058fb239592..f6a600aa004 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11895,13 +11895,22 @@ ARMMMUIdx arm_mmu_idx_el(CPUARMState *env, int el) return ARMMMUIdx_E10_0; case 1: if (arm_is_secure_below_el3(env)) { + if (env->pstate & PSTATE_PAN) { + return ARMMMUIdx_SE10_1_PAN; + } return ARMMMUIdx_SE10_1; } + if (env->pstate & PSTATE_PAN) { + return ARMMMUIdx_E10_1_PAN; + } return ARMMMUIdx_E10_1; case 2: /* TODO: ARMv8.4-SecEL2 */ /* Note that TGE does not apply at EL2. */ if ((env->cp15.hcr_el2 & HCR_E2H) && arm_el_is_aa64(env, 2)) { + if (env->pstate & PSTATE_PAN) { + return ARMMMUIdx_E20_2_PAN; + } return ARMMMUIdx_E20_2; } return ARMMMUIdx_E2; --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581605722842308.80940096944096; Thu, 13 Feb 2020 06:55:22 -0800 (PST) Received: from localhost ([::1]:53990 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fth-0003gG-0n for importer@patchew.org; Thu, 13 Feb 2020 09:55:21 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60382) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fh6-0004Zo-VT for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:22 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fh4-000263-Sq for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:19 -0500 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]:35576) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fh4-0001zp-LP for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:18 -0500 Received: by mail-wr1-x42f.google.com with SMTP id w12so6996642wrt.2 for ; Thu, 13 Feb 2020 06:42:15 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.12 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=eUOODysUqf1q2j4ZfZKabNnAho8TBvSzmUy4kFZOZEM=; b=KC57SnribGbr5a+lxGajajstwia0ncnP4dgmyKQ19/JtCMCydrW5PcNf+kx/CxjOPc 1AdUQdalg9x7LWotut5G7wd6j9/iSxlOoR5NbG08k+779/bN78nYQ694A90KOvx50zlf lfjfOT7FtfU2h5GWYQe9xANE/VbJDwkI8vYJFM2MAZNGivLGeRYNO7S1/4bJsHUEXeQW hGbvDnJJ6xXaJeaTR/8vcVPqoPoCb2M5h7BRmpstnum1WtUJwHubw1OZFnkTkL7qN95T afetggkk7a5kgmk4CrNvjXXasmJJUT4hoJdxhInkZzNETAfeYVZlWhErpWrp3OvoQmcY i9OQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=eUOODysUqf1q2j4ZfZKabNnAho8TBvSzmUy4kFZOZEM=; b=ffXwWhqOUTI6LG1jGNT0NWW9ZFtiNcID7pfPy6oCI9TEGw9SjKihLATMp90QKy4nyl PO5HxYQIj0Im3VCsICex2tFj7MzrAt5TGEM3bXfItHQwykr0Vc4/lgN+JV6ByayiyUcj 7cJ6DJx2BGzaQ+V5bFZ4qDLASvWuKCg08DUJxPf8PsdxBFg50aP9D9Sd2YTKYbDLatGY QlNoByZ9thFvhKTEP7gvSEDuDAooA4aVqsf76qDFeCv83B5SO9/Nlh3Ufdm8hE/3EPiR 03UJnj0ibTqmgcoIIkBSKkfG8WAtt3p3Wv8OmfFNt2tD196DxEN4igYd9G3VC2/TI8af qLIg== X-Gm-Message-State: APjAAAXyMZ+dppSuGws6vnTlRf7bfCijsivfH532DcmTXzT3hzjfWTXD JyHNORXc/JOHxzG37dt/2Dcuz59gc0E= X-Google-Smtp-Source: APXvYqwZQTr7PpYUEAxRb5nNKVSo9Eo8Jylr198RVi0wb7nlHrcw7TkNXn8xnEskOTR5nqm+KcIWng== X-Received: by 2002:a5d:638f:: with SMTP id p15mr21852258wru.402.1581604933936; Thu, 13 Feb 2020 06:42:13 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 22/46] target/arm: Enforce PAN semantics in get_S1prot Date: Thu, 13 Feb 2020 14:41:21 +0000 Message-Id: <20200213144145.818-23-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42f X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Richard Henderson If we have a PAN-enforcing mmu_idx, set prot =3D=3D 0 if user_rw !=3D 0. Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20200208125816.14954-14-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/internals.h | 13 +++++++++++++ target/arm/helper.c | 3 +++ 2 files changed, 16 insertions(+) diff --git a/target/arm/internals.h b/target/arm/internals.h index f6709a2b08d..4a139644b54 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -893,6 +893,19 @@ static inline bool regime_is_secure(CPUARMState *env, = ARMMMUIdx mmu_idx) } } =20 +static inline bool regime_is_pan(CPUARMState *env, ARMMMUIdx mmu_idx) +{ + switch (mmu_idx) { + case ARMMMUIdx_Stage1_E1_PAN: + case ARMMMUIdx_E10_1_PAN: + case ARMMMUIdx_E20_2_PAN: + case ARMMMUIdx_SE10_1_PAN: + return true; + default: + return false; + } +} + /* Return the FSR value for a debug exception (watchpoint, hardware * breakpoint or BKPT insn) targeting the specified exception level. */ diff --git a/target/arm/helper.c b/target/arm/helper.c index f6a600aa004..178757d2719 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -9569,6 +9569,9 @@ static int get_S1prot(CPUARMState *env, ARMMMUIdx mmu= _idx, bool is_aa64, if (is_user) { prot_rw =3D user_rw; } else { + if (user_rw && regime_is_pan(env, mmu_idx)) { + return 0; + } prot_rw =3D simple_ap_to_rw_prot_is_user(ap, false); } =20 --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581606033730148.16817334950167; Thu, 13 Feb 2020 07:00:33 -0800 (PST) Received: from localhost ([::1]:54108 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fyh-0002nM-95 for importer@patchew.org; Thu, 13 Feb 2020 10:00:31 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60394) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fh7-0004aV-86 for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:23 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fh4-00025x-Sg for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:21 -0500 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]:36158) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fh4-00021F-Kx for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:18 -0500 Received: by mail-wr1-x42f.google.com with SMTP id z3so7011131wru.3 for ; Thu, 13 Feb 2020 06:42:16 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. 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X-Received-From: 2a00:1450:4864:20::42f X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Richard Henderson The PAN bit is preserved, or set as per SCTLR_ELx.SPAN, plus several other conditions listed in the ARM ARM. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-id: 20200208125816.14954-15-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/helper.c | 53 ++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 50 insertions(+), 3 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 178757d2719..de16ce79add 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -8763,8 +8763,12 @@ static void take_aarch32_exception(CPUARMState *env,= int new_mode, uint32_t mask, uint32_t offset, uint32_t newpc) { + int new_el; + /* Change the CPU state so as to actually take the exception. */ switch_mode(env, new_mode); + new_el =3D arm_current_el(env); + /* * For exceptions taken to AArch32 we must clear the SS bit in both * PSTATE and in the old-state value we save to SPSR_, so zero i= t now. @@ -8777,7 +8781,7 @@ static void take_aarch32_exception(CPUARMState *env, = int new_mode, env->uncached_cpsr =3D (env->uncached_cpsr & ~CPSR_M) | new_mode; /* Set new mode endianness */ env->uncached_cpsr &=3D ~CPSR_E; - if (env->cp15.sctlr_el[arm_current_el(env)] & SCTLR_EE) { + if (env->cp15.sctlr_el[new_el] & SCTLR_EE) { env->uncached_cpsr |=3D CPSR_E; } /* J and IL must always be cleared for exception entry */ @@ -8788,6 +8792,25 @@ static void take_aarch32_exception(CPUARMState *env,= int new_mode, env->thumb =3D (env->cp15.sctlr_el[2] & SCTLR_TE) !=3D 0; env->elr_el[2] =3D env->regs[15]; } else { + /* CPSR.PAN is normally preserved preserved unless... */ + if (cpu_isar_feature(aa64_pan, env_archcpu(env))) { + switch (new_el) { + case 3: + if (!arm_is_secure_below_el3(env)) { + /* ... the target is EL3, from non-secure state. */ + env->uncached_cpsr &=3D ~CPSR_PAN; + break; + } + /* ... the target is EL3, from secure state ... */ + /* fall through */ + case 1: + /* ... the target is EL1 and SCTLR.SPAN is 0. */ + if (!(env->cp15.sctlr_el[new_el] & SCTLR_SPAN)) { + env->uncached_cpsr |=3D CPSR_PAN; + } + break; + } + } /* * this is a lie, as there was no c1_sys on V4T/V5, but who cares * and we should just guard the thumb mode on V4 @@ -9050,6 +9073,7 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs) unsigned int new_el =3D env->exception.target_el; target_ulong addr =3D env->cp15.vbar_el[new_el]; unsigned int new_mode =3D aarch64_pstate_mode(new_el, true); + unsigned int old_mode; unsigned int cur_el =3D arm_current_el(env); =20 /* @@ -9129,20 +9153,43 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *= cs) } =20 if (is_a64(env)) { - env->banked_spsr[aarch64_banked_spsr_index(new_el)] =3D pstate_rea= d(env); + old_mode =3D pstate_read(env); aarch64_save_sp(env, arm_current_el(env)); env->elr_el[new_el] =3D env->pc; } else { - env->banked_spsr[aarch64_banked_spsr_index(new_el)] =3D cpsr_read(= env); + old_mode =3D cpsr_read(env); env->elr_el[new_el] =3D env->regs[15]; =20 aarch64_sync_32_to_64(env); =20 env->condexec_bits =3D 0; } + env->banked_spsr[aarch64_banked_spsr_index(new_el)] =3D old_mode; + qemu_log_mask(CPU_LOG_INT, "...with ELR 0x%" PRIx64 "\n", env->elr_el[new_el]); =20 + if (cpu_isar_feature(aa64_pan, cpu)) { + /* The value of PSTATE.PAN is normally preserved, except when ... = */ + new_mode |=3D old_mode & PSTATE_PAN; + switch (new_el) { + case 2: + /* ... the target is EL2 with HCR_EL2.{E2H,TGE} =3D=3D '11' ..= . */ + if ((arm_hcr_el2_eff(env) & (HCR_E2H | HCR_TGE)) + !=3D (HCR_E2H | HCR_TGE)) { + break; + } + /* fall through */ + case 1: + /* ... the target is EL1 ... */ + /* ... and SCTLR_ELx.SPAN =3D=3D 0, then set to 1. */ + if ((env->cp15.sctlr_el[new_el] & SCTLR_SPAN) =3D=3D 0) { + new_mode |=3D PSTATE_PAN; + } + break; + } + } + pstate_write(env, PSTATE_DAIF | new_mode); env->aarch64 =3D 1; aarch64_restore_sp(env, new_el); --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.15 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=io7OAgKGiS3YeaCrWPyK/MAdXhm40+eWtarxm3Kge30=; b=V2kB4yHQ+xdxJ1KcY7NNn82D4JlZGJ0Ww1IcYDQDDzMQxwKfuxd61TQGb3oS1qLM6k 18mxDcKYn97AO+UmdLtZX7LgQ6afFPy3S4M1bH8YbzaMckDzo2oePdQLcFotX0F2Diue snCwrBWL9/9PA8dTBygMCJRJQ0alcHzdDf8ueFleZeAL81DplgZFRMDOznyDDKny7lkI q7jo3/Lb+78f/UBGFbNq1JaHjWfkcUeD2GDdx9fgv4yqr+U4aeGGipV5JPACN+F/eItb mrBXtzLvJASltSdasknomfMPL3jc4JaR0Y4KgqqyNyh1CdMNjKR2dsoeoZo9h+PaHyi7 0uZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=io7OAgKGiS3YeaCrWPyK/MAdXhm40+eWtarxm3Kge30=; b=QKGrFw8RbtQ8xieG9P1eKCxYp0sNhBGpU922isoKAg0mYXY1JpvB/8LK7Q69nYej/4 leN01zC9wNsY3l6/IOWasI2UW5QGISXmhxiERQn+1XDvdh5ScRRP2BigFp2SaRI1kWjS Com6XeUahvEt19YuINoDVGLoEuLUrwu7H2WQLI3oPxBUBx7sQIkh6UDoKmld3PD6m1ZV uFFFzIo5lhDs/UFdm1KF9REjaRR+7U36jn3jdOvcH7ZLiFQuOgorN4JVTjOq2evUpDSJ INY1LqEyLqJAI7G+JFwMkT3neQ7WtIjpQd6ccT/sAeWmSkpeWFzMTD6gmBafhOnHGIKj ycqg== X-Gm-Message-State: APjAAAVSLpoHgv6XQorvuTB+kCFaAULSaErsgXIdQXxALbLFEoskAKQ4 7TJTtAD3mTi02Obj/8O7nnzohV2GWNs= X-Google-Smtp-Source: APXvYqw1S4yUbSOJIutHtRO5210ep052YhbzC3CRlq90xCPq4eU3Ho+R7fe/5X43+rnHbXPZQhK4Og== X-Received: by 2002:adf:c453:: with SMTP id a19mr22318723wrg.341.1581604935917; Thu, 13 Feb 2020 06:42:15 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 24/46] target/arm: Implement ATS1E1 system registers Date: Thu, 13 Feb 2020 14:41:23 +0000 Message-Id: <20200213144145.818-25-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Richard Henderson This is a minor enhancement over ARMv8.1-PAN. The *_PAN mmu_idx are used with the existing do_ats_write. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20200208125816.14954-16-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/helper.c | 56 ++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 50 insertions(+), 6 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index de16ce79add..d99661d4ea5 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -3409,16 +3409,21 @@ static void ats_write(CPUARMState *env, const ARMCP= RegInfo *ri, uint64_t value) =20 switch (ri->opc2 & 6) { case 0: - /* stage 1 current state PL1: ATS1CPR, ATS1CPW */ + /* stage 1 current state PL1: ATS1CPR, ATS1CPW, ATS1CPRP, ATS1CPWP= */ switch (el) { case 3: mmu_idx =3D ARMMMUIdx_SE3; break; case 2: - mmu_idx =3D ARMMMUIdx_Stage1_E1; - break; + g_assert(!secure); /* TODO: ARMv8.4-SecEL2 */ + /* fall through */ case 1: - mmu_idx =3D secure ? ARMMMUIdx_SE10_1 : ARMMMUIdx_Stage1_E1; + if (ri->crm =3D=3D 9 && (env->uncached_cpsr & CPSR_PAN)) { + mmu_idx =3D (secure ? ARMMMUIdx_SE10_1_PAN + : ARMMMUIdx_Stage1_E1_PAN); + } else { + mmu_idx =3D secure ? ARMMMUIdx_SE10_1 : ARMMMUIdx_Stage1_E= 1; + } break; default: g_assert_not_reached(); @@ -3487,8 +3492,13 @@ static void ats_write64(CPUARMState *env, const ARMC= PRegInfo *ri, switch (ri->opc2 & 6) { case 0: switch (ri->opc1) { - case 0: /* AT S1E1R, AT S1E1W */ - mmu_idx =3D secure ? ARMMMUIdx_SE10_1 : ARMMMUIdx_Stage1_E1; + case 0: /* AT S1E1R, AT S1E1W, AT S1E1RP, AT S1E1WP */ + if (ri->crm =3D=3D 9 && (env->pstate & PSTATE_PAN)) { + mmu_idx =3D (secure ? ARMMMUIdx_SE10_1_PAN + : ARMMMUIdx_Stage1_E1_PAN); + } else { + mmu_idx =3D secure ? ARMMMUIdx_SE10_1 : ARMMMUIdx_Stage1_E= 1; + } break; case 4: /* AT S1E2R, AT S1E2W */ mmu_idx =3D ARMMMUIdx_E2; @@ -6683,6 +6693,32 @@ static const ARMCPRegInfo vhe_reginfo[] =3D { REGINFO_SENTINEL }; =20 +#ifndef CONFIG_USER_ONLY +static const ARMCPRegInfo ats1e1_reginfo[] =3D { + { .name =3D "AT_S1E1R", .state =3D ARM_CP_STATE_AA64, + .opc0 =3D 1, .opc1 =3D 0, .crn =3D 7, .crm =3D 9, .opc2 =3D 0, + .access =3D PL1_W, .type =3D ARM_CP_NO_RAW | ARM_CP_RAISES_EXC, + .writefn =3D ats_write64 }, + { .name =3D "AT_S1E1W", .state =3D ARM_CP_STATE_AA64, + .opc0 =3D 1, .opc1 =3D 0, .crn =3D 7, .crm =3D 9, .opc2 =3D 1, + .access =3D PL1_W, .type =3D ARM_CP_NO_RAW | ARM_CP_RAISES_EXC, + .writefn =3D ats_write64 }, + REGINFO_SENTINEL +}; + +static const ARMCPRegInfo ats1cp_reginfo[] =3D { + { .name =3D "ATS1CPRP", + .cp =3D 15, .opc1 =3D 0, .crn =3D 7, .crm =3D 9, .opc2 =3D 0, + .access =3D PL1_W, .type =3D ARM_CP_NO_RAW | ARM_CP_RAISES_EXC, + .writefn =3D ats_write }, + { .name =3D "ATS1CPWP", + .cp =3D 15, .opc1 =3D 0, .crn =3D 7, .crm =3D 9, .opc2 =3D 1, + .access =3D PL1_W, .type =3D ARM_CP_NO_RAW | ARM_CP_RAISES_EXC, + .writefn =3D ats_write }, + REGINFO_SENTINEL +}; +#endif + void register_cp_regs_for_features(ARMCPU *cpu) { /* Register all the coprocessor registers based on feature bits */ @@ -7620,6 +7656,14 @@ void register_cp_regs_for_features(ARMCPU *cpu) if (cpu_isar_feature(aa64_pan, cpu)) { define_one_arm_cp_reg(cpu, &pan_reginfo); } +#ifndef CONFIG_USER_ONLY + if (cpu_isar_feature(aa64_ats1e1, cpu)) { + define_arm_cp_regs(cpu, ats1e1_reginfo); + } + if (cpu_isar_feature(aa32_ats1e1, cpu)) { + define_arm_cp_regs(cpu, ats1cp_reginfo); + } +#endif =20 if (arm_feature(env, ARM_FEATURE_EL2) && cpu_isar_feature(aa64_vh, cpu= )) { define_arm_cp_regs(cpu, vhe_reginfo); --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581605628952588.4493911088101; Thu, 13 Feb 2020 06:53:48 -0800 (PST) Received: from localhost ([::1]:53950 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2FsB-0001ea-GM for importer@patchew.org; Thu, 13 Feb 2020 09:53:47 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60383) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fh6-0004Zp-Vd for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:23 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fh4-00026B-TF for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:19 -0500 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]:34337) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fh4-000243-M0 for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:18 -0500 Received: by mail-wr1-x441.google.com with SMTP id n10so5044148wrm.1 for ; Thu, 13 Feb 2020 06:42:18 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.15 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=lZumiqpfQ/6unRtDCeBn/aqRrn/borXiuGtgBm5/gN4=; b=RD6BpbR95xY5cf3mlw/dpC4fXTm783NH1DIl3KLBQ/rFzstVt+DsogWxfp8jsPASCS kB+YnB/uR42eNsiJm1uj3/IeAZ5/d0rTAcPdjlG9/ASQEZg7RG2Ob6qxRiW6PGQ8FEqO FPtf0hhBKumvK0NoKycSNGVScQfZmQGni1Pl4SCoEyie2/JEl2PQUXv+ZDo3ik1bzsxX KrDt67tWHVRujiTvw4gus7qICOiATZ3GGvXbnueDKC9d7r4A9Ya3tWgJKHuyd1CysGvd 8vD1g1RgWlfaAwcHXLSdyczkpqwwe0I4tTMwI3TRxBTS3mX6GOVO5eZcyc6bOFUs0e69 PGlQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lZumiqpfQ/6unRtDCeBn/aqRrn/borXiuGtgBm5/gN4=; b=DvGGYZ2qVcFY0aWG4VGohZkq6b15qTEQO95syqbyxeBdcjLmN564bNf4ABzFhThcVV EM2+entrXFao3pTb8AEJJUOGbmFCtKTB7cwBUyWsRJzkCUkhGVRQxk3ZgPJEAXC1ufsH Ae1In+ptgTCABiHjUwyCg/naTCOAHo9EetHrCqBzFArPPIAnEu9/J0ITtLBJYwQGGaOS wKr5v/GATTADgOuD2ftz+2XKFeMV1J4ov2lMCimu5ixGNmK6WhJvX6FrYRZ9lZJmJaQb kLrIc71ZGNRFXOFerE4ODvw97gYWj0VK/+uD4XQrqclZ1rx3KWGDrD3CRwCY7Cb47eQb ljWw== X-Gm-Message-State: APjAAAUGyetutK2KIs0MyhkdTeneFxGlcSImtva6zvMjF46/S4vbxXb7 c0J7EUi1MYk4pPS9tmIK9RogYJYYpo4= X-Google-Smtp-Source: APXvYqwHH1mGXTJNY8AH9z5BMKj6sTjRNBh4MSzc8RGgzg7cKCqsD/GV1uM5z8j+AlU12u6N9w1RWQ== X-Received: by 2002:adf:f986:: with SMTP id f6mr23126883wrr.182.1581604936955; Thu, 13 Feb 2020 06:42:16 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 25/46] target/arm: Enable ARMv8.2-ATS1E1 in -cpu max Date: Thu, 13 Feb 2020 14:41:24 +0000 Message-Id: <20200213144145.818-26-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::441 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Richard Henderson This includes enablement of ARMv8.1-PAN. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20200208125816.14954-17-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu.c | 4 ++++ target/arm/cpu64.c | 5 +++++ 2 files changed, 9 insertions(+) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index b0762a76c4b..de733aceeb8 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2709,6 +2709,10 @@ static void arm_max_initfn(Object *obj) t =3D FIELD_DP32(t, MVFR2, FPMISC, 4); /* FP MaxNum */ cpu->isar.mvfr2 =3D t; =20 + t =3D cpu->id_mmfr3; + t =3D FIELD_DP32(t, ID_MMFR3, PAN, 2); /* ATS1E1 */ + cpu->id_mmfr3 =3D t; + t =3D cpu->id_mmfr4; t =3D FIELD_DP32(t, ID_MMFR4, HPDS, 1); /* AA32HPD */ cpu->id_mmfr4 =3D t; diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index c80fb5fd438..57fbc5eade7 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -673,6 +673,7 @@ static void aarch64_max_initfn(Object *obj) t =3D FIELD_DP64(t, ID_AA64MMFR1, HPDS, 1); /* HPD */ t =3D FIELD_DP64(t, ID_AA64MMFR1, LO, 1); t =3D FIELD_DP64(t, ID_AA64MMFR1, VH, 1); + t =3D FIELD_DP64(t, ID_AA64MMFR1, PAN, 2); /* ATS1E1 */ cpu->isar.id_aa64mmfr1 =3D t; =20 /* Replicate the same data to the 32-bit id registers. */ @@ -693,6 +694,10 @@ static void aarch64_max_initfn(Object *obj) u =3D FIELD_DP32(u, ID_ISAR6, SPECRES, 1); cpu->isar.id_isar6 =3D u; =20 + u =3D cpu->id_mmfr3; + u =3D FIELD_DP32(u, ID_MMFR3, PAN, 2); /* ATS1E1 */ + cpu->id_mmfr3 =3D u; + /* * FIXME: We do not yet support ARMv8.2-fp16 for AArch32 yet, * so do not set MVFR1.FPHP. Strictly speaking this is not legal, --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581605871221873.351015638352; Thu, 13 Feb 2020 06:57:51 -0800 (PST) Received: from localhost ([::1]:54064 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fw5-0007ej-Nl for importer@patchew.org; Thu, 13 Feb 2020 09:57:49 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60400) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fh7-0004bH-JC for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:23 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fh5-00027L-EE for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:21 -0500 Received: from mail-wm1-x341.google.com ([2a00:1450:4864:20::341]:39280) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fh5-00025b-80 for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:19 -0500 Received: by mail-wm1-x341.google.com with SMTP id c84so7036127wme.4 for ; Thu, 13 Feb 2020 06:42:19 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.17 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=N9w9WsTEsHScx6Q0FxeHvpCacb1yD684WDvTiuzngFQ=; b=rICVMN3cUr/atWeFQ7ovy9eS31ccvpKGwuPsMiH9PfGbktUYfn8rI3NRRErNtHssx0 yLyGMqb+qDuMutJVPKfiUU9eGN6dkwc3PYMR7PjbMRzJ8RJhPT1quD25vT+7dT0OUntw 9+3Z5WqqnO7Ice/C5hohOcqwPHiGXzsIFi2uI8jsOSP2tA94u8bs/T2ecXNDXEO07jdS KeGfVh3a7fg1D+uxU14aFZa3A0gA6aObuOLTh+XP9VA/R1gIXXL1TX6FLhz0Um7hOlpI ZFuL6Bmhk+OY3LqVL4iwqvPazHTj8bZdiDRauy/NgsXZeca/2CL5BKPhWI0mdL4O13Rh IIgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=N9w9WsTEsHScx6Q0FxeHvpCacb1yD684WDvTiuzngFQ=; b=TTKslvFKpMF5LR4jHiTcDXzKjqjmo2JSYP0Fwe9sThrGN6eljJAgqTWHeDCyJMRSqg tfbK4AVIfEV1prNFHsJ2ayERd+C7KYyLmJC4T2JliRu4ZL+tUOwrFRsJGkVtD80JJk/j vqaleSoq7QOk2UcDC5jrL7f9zlC+xxHuWOPbJyx2a7/gvNY7NTjybjg0aRQ/fqTe00pf mAli3cgd3LwytHgO2XfZZiE9KrbzWi78HYoDjyh8LgBYFzejdk9QwPf0kamxrsHBVQjb gaTqNsNMjFZNq4ynzgw+7/TdWRz1/GEADRaDPsQrb5Dgn9jmRbk+zVHovf20rEOaQWCY iRhg== X-Gm-Message-State: APjAAAXG9WbXVhD1A4fGzKMwGNJCNIJazVeIgHSa1DbAv2Snedd4roml vwb98Xn97aD8uufojHNqUcsQGc3suHk= X-Google-Smtp-Source: APXvYqwc8dWuhKvDVwB/q0X+842iRlYTcz3jFdPWd+zJZ6+lyvxmf4JBkrXSgjEg125+UITxMo1SSg== X-Received: by 2002:a05:600c:2150:: with SMTP id v16mr6091508wml.156.1581604937925; Thu, 13 Feb 2020 06:42:17 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 26/46] target/arm: Add ID_AA64MMFR2_EL1 Date: Thu, 13 Feb 2020 14:41:25 +0000 Message-Id: <20200213144145.818-27-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::341 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Richard Henderson Add definitions for all of the fields, up to ARMv8.5. Convert the existing RESERVED register to a full register. Query KVM for the value of the register for the host. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20200208125816.14954-18-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu.h | 17 +++++++++++++++++ target/arm/helper.c | 4 ++-- target/arm/kvm64.c | 2 ++ 3 files changed, 21 insertions(+), 2 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 65a0ef8cd6b..71879393c22 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -871,6 +871,7 @@ struct ARMCPU { uint64_t id_aa64pfr1; uint64_t id_aa64mmfr0; uint64_t id_aa64mmfr1; + uint64_t id_aa64mmfr2; } isar; uint32_t midr; uint32_t revidr; @@ -1803,6 +1804,22 @@ FIELD(ID_AA64MMFR1, PAN, 20, 4) FIELD(ID_AA64MMFR1, SPECSEI, 24, 4) FIELD(ID_AA64MMFR1, XNX, 28, 4) =20 +FIELD(ID_AA64MMFR2, CNP, 0, 4) +FIELD(ID_AA64MMFR2, UAO, 4, 4) +FIELD(ID_AA64MMFR2, LSM, 8, 4) +FIELD(ID_AA64MMFR2, IESB, 12, 4) +FIELD(ID_AA64MMFR2, VARANGE, 16, 4) +FIELD(ID_AA64MMFR2, CCIDX, 20, 4) +FIELD(ID_AA64MMFR2, NV, 24, 4) +FIELD(ID_AA64MMFR2, ST, 28, 4) +FIELD(ID_AA64MMFR2, AT, 32, 4) +FIELD(ID_AA64MMFR2, IDS, 36, 4) +FIELD(ID_AA64MMFR2, FWB, 40, 4) +FIELD(ID_AA64MMFR2, TTL, 48, 4) +FIELD(ID_AA64MMFR2, BBM, 52, 4) +FIELD(ID_AA64MMFR2, EVT, 56, 4) +FIELD(ID_AA64MMFR2, E0PD, 60, 4) + FIELD(ID_DFR0, COPDBG, 0, 4) FIELD(ID_DFR0, COPSDBG, 4, 4) FIELD(ID_DFR0, MMAPDBG, 8, 4) diff --git a/target/arm/helper.c b/target/arm/helper.c index d99661d4ea5..d29722d8acb 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -7073,11 +7073,11 @@ void register_cp_regs_for_features(ARMCPU *cpu) .access =3D PL1_R, .type =3D ARM_CP_CONST, .accessfn =3D access_aa64_tid3, .resetvalue =3D cpu->isar.id_aa64mmfr1 }, - { .name =3D "ID_AA64MMFR2_EL1_RESERVED", .state =3D ARM_CP_STA= TE_AA64, + { .name =3D "ID_AA64MMFR2_EL1", .state =3D ARM_CP_STATE_AA64, .opc0 =3D 3, .opc1 =3D 0, .crn =3D 0, .crm =3D 7, .opc2 =3D = 2, .access =3D PL1_R, .type =3D ARM_CP_CONST, .accessfn =3D access_aa64_tid3, - .resetvalue =3D 0 }, + .resetvalue =3D cpu->isar.id_aa64mmfr2 }, { .name =3D "ID_AA64MMFR3_EL1_RESERVED", .state =3D ARM_CP_STA= TE_AA64, .opc0 =3D 3, .opc1 =3D 0, .crn =3D 0, .crm =3D 7, .opc2 =3D = 3, .access =3D PL1_R, .type =3D ARM_CP_CONST, diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index fb21ab9e737..3bae9e4a663 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -549,6 +549,8 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *= ahcf) ARM64_SYS_REG(3, 0, 0, 7, 0)); err |=3D read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64mmfr1, ARM64_SYS_REG(3, 0, 0, 7, 1)); + err |=3D read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64mmfr2, + ARM64_SYS_REG(3, 0, 0, 7, 2)); =20 /* * Note that if AArch32 support is not present in the host, --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 158160735578177.28091794171587; Thu, 13 Feb 2020 07:22:35 -0800 (PST) Received: from localhost ([::1]:54354 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2G9O-0008Su-Ph for importer@patchew.org; Thu, 13 Feb 2020 10:11:34 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60398) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fh7-0004b6-Gs for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:23 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fh6-00028k-82 for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:21 -0500 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]:34930) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fh6-00027R-1B for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:20 -0500 Received: by mail-wm1-x32e.google.com with SMTP id b17so7044898wmb.0 for ; Thu, 13 Feb 2020 06:42:19 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.18 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=JVK/7D63GFoiZgv/DDpmGioUcmsvRCEg+fgmQJe/Src=; b=T+vh/gegkmEKjrN+Yml+MXRe4MrnXjFVUj+eONjv0EKA+N495xA630UnRx5wpF54qK Tx5YxcwLq8yI2yfU0qUZATyqkXPboCO2aZ19lGbV+9VvuThEwlo1J3SEEgvnBvaC8QoG TXu7JBHw2FbYqN5helsNauBQtOh5FUTkumZUzwOuWSZ9c0+3EmMCcG0skqcnHzE4kg2P rhALq4c9yAGX2w1q3KLdakm7/IlpXqe6mEl9sP6z+HYNZgtIA0ee8YlIufsYTYkzOT+U ICTL0FFsU2fmAMDizAfb0OTkSbU2wmOHkSC+5SndzySC6Tf9Nu70w6g0CEcLbR41R+9d EzLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JVK/7D63GFoiZgv/DDpmGioUcmsvRCEg+fgmQJe/Src=; b=joBLJSDYCH4IpLvUXPc6wtLvPVTuNQPj0KwbPAzJUVtEUPQhjpr8IDrKgc07TGvPyL HypKXQTrw+iIudIM6tY6aR0cTKWvsRD83WFc1pJmdKcxNlaWQ6YYJFJdKDlQYK/+F/vz 4JMAEBjAYDsSYL2g1yEwz++z4t50uOnHmDwPSr2C8PK1ShWItXF8gzQdYLDsrDosc47P x7X9uKBEl5S/pXh6d3wGUVIFAebvO7qqIyeVztGBsbhpiAgQ6WV3yEF8k7GUSurqX2r/ W3SVKB+pAHGBYJERikAaarqnESG3GYyW8BzdiVvLy7eVJ5ui0Btp05RKcJf3/6f0a0aN zKyQ== X-Gm-Message-State: APjAAAUydP1kpv8zSuQ9j67HB0KHRshht5Xwo5mm9De8osUMj6RQkNcU kSD0X4sJAOqhkCqf2gb4kNHad9MSvfQ= X-Google-Smtp-Source: APXvYqyL5vTxxJvJGM91AfcUGxuQ9vMNGdPsijvmNBcBtfUZi7iKI15Q2YFmzw5Kpc9tNkuxtUOffQ== X-Received: by 2002:a05:600c:2c13:: with SMTP id q19mr6369076wmg.144.1581604938838; Thu, 13 Feb 2020 06:42:18 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 27/46] target/arm: Update MSR access to UAO Date: Thu, 13 Feb 2020 14:41:26 +0000 Message-Id: <20200213144145.818-28-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32e X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20200208125816.14954-19-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu.h | 6 ++++++ target/arm/internals.h | 3 +++ target/arm/helper.c | 21 +++++++++++++++++++++ target/arm/translate-a64.c | 14 ++++++++++++++ 4 files changed, 44 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 71879393c22..e943ffe8a9a 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1253,6 +1253,7 @@ void pmu_init(ARMCPU *cpu); #define PSTATE_IL (1U << 20) #define PSTATE_SS (1U << 21) #define PSTATE_PAN (1U << 22) +#define PSTATE_UAO (1U << 23) #define PSTATE_V (1U << 28) #define PSTATE_C (1U << 29) #define PSTATE_Z (1U << 30) @@ -3642,6 +3643,11 @@ static inline bool isar_feature_aa64_ats1e1(const AR= MISARegisters *id) return FIELD_EX64(id->id_aa64mmfr1, ID_AA64MMFR1, PAN) >=3D 2; } =20 +static inline bool isar_feature_aa64_uao(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, UAO) !=3D 0; +} + static inline bool isar_feature_aa64_bti(const ARMISARegisters *id) { return FIELD_EX64(id->id_aa64pfr1, ID_AA64PFR1, BT) !=3D 0; diff --git a/target/arm/internals.h b/target/arm/internals.h index 4a139644b54..58c4d707c5d 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1112,6 +1112,9 @@ static inline uint32_t aarch64_pstate_valid_mask(cons= t ARMISARegisters *id) if (isar_feature_aa64_pan(id)) { valid |=3D PSTATE_PAN; } + if (isar_feature_aa64_uao(id)) { + valid |=3D PSTATE_UAO; + } =20 return valid; } diff --git a/target/arm/helper.c b/target/arm/helper.c index d29722d8acb..11a5f0be52f 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -4191,6 +4191,24 @@ static const ARMCPRegInfo pan_reginfo =3D { .readfn =3D aa64_pan_read, .writefn =3D aa64_pan_write }; =20 +static uint64_t aa64_uao_read(CPUARMState *env, const ARMCPRegInfo *ri) +{ + return env->pstate & PSTATE_UAO; +} + +static void aa64_uao_write(CPUARMState *env, const ARMCPRegInfo *ri, + uint64_t value) +{ + env->pstate =3D (env->pstate & ~PSTATE_UAO) | (value & PSTATE_UAO); +} + +static const ARMCPRegInfo uao_reginfo =3D { + .name =3D "UAO", .state =3D ARM_CP_STATE_AA64, + .opc0 =3D 3, .opc1 =3D 0, .crn =3D 4, .crm =3D 2, .opc2 =3D 4, + .type =3D ARM_CP_NO_RAW, .access =3D PL1_RW, + .readfn =3D aa64_uao_read, .writefn =3D aa64_uao_write +}; + static CPAccessResult aa64_cacheop_access(CPUARMState *env, const ARMCPRegInfo *ri, bool isread) @@ -7664,6 +7682,9 @@ void register_cp_regs_for_features(ARMCPU *cpu) define_arm_cp_regs(cpu, ats1cp_reginfo); } #endif + if (cpu_isar_feature(aa64_uao, cpu)) { + define_one_arm_cp_reg(cpu, &uao_reginfo); + } =20 if (arm_feature(env, ARM_FEATURE_EL2) && cpu_isar_feature(aa64_vh, cpu= )) { define_arm_cp_regs(cpu, vhe_reginfo); diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index d8ba240a155..7c26c3bfebb 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -1602,6 +1602,20 @@ static void handle_msr_i(DisasContext *s, uint32_t i= nsn, s->base.is_jmp =3D DISAS_NEXT; break; =20 + case 0x03: /* UAO */ + if (!dc_isar_feature(aa64_uao, s) || s->current_el =3D=3D 0) { + goto do_unallocated; + } + if (crm & 1) { + set_pstate_bits(PSTATE_UAO); + } else { + clear_pstate_bits(PSTATE_UAO); + } + t1 =3D tcg_const_i32(s->current_el); + gen_helper_rebuild_hflags_a64(cpu_env, t1); + tcg_temp_free_i32(t1); + break; + case 0x04: /* PAN */ if (!dc_isar_feature(aa64_pan, s) || s->current_el =3D=3D 0) { goto do_unallocated; --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581605773122355.9813899819982; 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.18 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=PpjQIC0RqFe6Xqx3OKTth2xnBQFxNcA4Bz7zhZ8w2yo=; b=PmmZA9L+B0ZIdy4qnvFayRiSVN5eCh+0lOseJK+7gPXpAlRQGRz/ie3pIMjwlU2V3f C7ji/Qf7MeK2LBtIiiq+YZoaxSnogqS8zUujI3QSgu7p4E1OVb0GPttaqkzBWd+56RIH gXs0+AncGc5lCZxtWO/nsH4HStUL+/Mgdk+drSB25fFT2Qy4neSU6ZX1RoYUjUbDkLYu 63+2IMFvJDTFufTDytx4EbSPKKH7hG/UAeYKF2tqvj7d7sq6qfj27Yw1XeUKnHwdTyT3 df+2aoBg0QewMUJYm+hEWyZTUkmgDUrhSpIWEGny78YDzZ8y53/OVweKfNjS89W2ajOv HlHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PpjQIC0RqFe6Xqx3OKTth2xnBQFxNcA4Bz7zhZ8w2yo=; b=HQm+/ENKdCD9x6nXPFtlIPy8X+qQjYi3RbvJcKL/HmiE2HKgS/gsMFTE9i3od+F1Tg nTfC7Fj52PRSNGSbrG7SyXLnFY9j0Hntk2NlSHv3ABUJ+jV2KFcg0RaiIICEuhf4c73d vncm0sKaJPwFq/Ks83qZAL6GvZ7j6k00VD3vD5D8hdP8Cg3be7khHh9Xz1WuIltUUJ/x HYRiKxJ5q3KnaZSgqSqfwz5qg/r4nsCEVSoPeaGxdoSUp6nnMCQKLDVi0gj11Qk/Ez2u 95iTlke/nyE4fPvf4nUC9uuxUoPxl69V3VvIvVHzRoaPGwwyb6XBAayBEuraCcUrKkj8 rEYA== X-Gm-Message-State: APjAAAWYk6x2BHRVGq/e5JZEmhOvGnI7Py6NCdGB3IXcR2UuFqACYyh3 Y94WQv4qhN5QeG6k7IvfuWpme6IUK5k= X-Google-Smtp-Source: APXvYqy6VHJiUJ3s9COMa2n7I/BzvQJ5L0joeqs5NmZwNQXm3vCvi5mdBT2iPthMJ37szcyQt/+DVA== X-Received: by 2002:a7b:c93a:: with SMTP id h26mr6493868wml.83.1581604939817; Thu, 13 Feb 2020 06:42:19 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 28/46] target/arm: Implement UAO semantics Date: Thu, 13 Feb 2020 14:41:27 +0000 Message-Id: <20200213144145.818-29-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::342 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Richard Henderson We need only override the current condition under which TBFLAG_A64.UNPRIV is set. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20200208125816.14954-20-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/helper.c | 41 +++++++++++++++++++++-------------------- 1 file changed, 21 insertions(+), 20 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 11a5f0be52f..366dbcf460d 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -12198,28 +12198,29 @@ static uint32_t rebuild_hflags_a64(CPUARMState *e= nv, int el, int fp_el, } =20 /* Compute the condition for using AccType_UNPRIV for LDTR et al. */ - /* TODO: ARMv8.2-UAO */ - switch (mmu_idx) { - case ARMMMUIdx_E10_1: - case ARMMMUIdx_E10_1_PAN: - case ARMMMUIdx_SE10_1: - case ARMMMUIdx_SE10_1_PAN: - /* TODO: ARMv8.3-NV */ - flags =3D FIELD_DP32(flags, TBFLAG_A64, UNPRIV, 1); - break; - case ARMMMUIdx_E20_2: - case ARMMMUIdx_E20_2_PAN: - /* TODO: ARMv8.4-SecEL2 */ - /* - * Note that E20_2 is gated by HCR_EL2.E2H =3D=3D 1, but E20_0 is - * gated by HCR_EL2. =3D=3D '11', and so is LDTR. - */ - if (env->cp15.hcr_el2 & HCR_TGE) { + if (!(env->pstate & PSTATE_UAO)) { + switch (mmu_idx) { + case ARMMMUIdx_E10_1: + case ARMMMUIdx_E10_1_PAN: + case ARMMMUIdx_SE10_1: + case ARMMMUIdx_SE10_1_PAN: + /* TODO: ARMv8.3-NV */ flags =3D FIELD_DP32(flags, TBFLAG_A64, UNPRIV, 1); + break; + case ARMMMUIdx_E20_2: + case ARMMMUIdx_E20_2_PAN: + /* TODO: ARMv8.4-SecEL2 */ + /* + * Note that EL20_2 is gated by HCR_EL2.E2H =3D=3D 1, but EL20= _0 is + * gated by HCR_EL2. =3D=3D '11', and so is LDTR. + */ + if (env->cp15.hcr_el2 & HCR_TGE) { + flags =3D FIELD_DP32(flags, TBFLAG_A64, UNPRIV, 1); + } + break; + default: + break; } - break; - default: - break; } =20 return rebuild_hflags_common(env, fp_el, mmu_idx, flags); --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581607401282537.1365983809129; Thu, 13 Feb 2020 07:23:21 -0800 (PST) Received: from localhost ([::1]:54188 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2G1l-0006dY-BV for importer@patchew.org; Thu, 13 Feb 2020 10:03:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60450) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2FhJ-0004hw-An for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:37 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fh9-0002Dh-BR for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:26 -0500 Received: from mail-wm1-x343.google.com ([2a00:1450:4864:20::343]:54281) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fh9-0002B1-4s for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:23 -0500 Received: by mail-wm1-x343.google.com with SMTP id g1so6530012wmh.4 for ; Thu, 13 Feb 2020 06:42:22 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.19 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=vduUG/fCzn1Y02yauNek8xmPBjHyb4V3u/HmNjv0tOw=; b=p/QfPsEw6idr1uYL60L7aQdbV9ngDW8SiNOsI8+0cfhYCm7fLYxOrRvYwczw7U6HHK +9q7iLPwj5dJdayS7p2dO2+U6vHIf8udUHusuWvP/ipS5krPnMz6dQNv8iicJbN92Tud x5iZrx4WG5a4+77jgiN2m8nfy90PXoFN5OQsZMwtyICe/9hbNLPTDhk5KSRL++Ow76qn yyIAt7354Eow0s91/NRLyYtwsgdlxJzL1sx8O+eQQcsa4WxDqzK+wckEhxqHuM7T8C/q Q+kRTt8JpP0MN+l2c5u0EyAvNt1oNzdH9khF17Z9dHxkVcpDFHXHfnYjEapizjbUAxHj JDYg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vduUG/fCzn1Y02yauNek8xmPBjHyb4V3u/HmNjv0tOw=; b=PgOcNQTSwS06lQx15Y9gdT9PBFbrv1EnmtdN42/94lGS6xwQxoD1itZLnv05bcTfQm Bteue5f8fxtGHWq47ULxDdCLD4iMoxJxfnzjaXGTOoppyjFMIt/WSrx4XaPPJfailWH6 913XAY+2GIDw5lUHLmW9vOv3JlxT9GmQwA2Cefm/O18B+rZvNKPWJ+gDNNmNaIu6oG8r CO4HFxYe1waNtukXFwcckCGmbBiesAq+lBgbhy2BDptHPgp2iSOVNEUi1c0MLFlwyzos pNc4nbt1lwipdVTSAWrPonwpAUIU2hAgrTX9l8zqfpa0ThA6TmE7wBlhJXAFkYXJoKoG tIMw== X-Gm-Message-State: APjAAAUlH444akygTuzNqJWSdb6XlnsfCy4f6dPTxVQ4DqYWAWNLjCKV BVl84d7VJvp2OiV0c5GwdWbhMWsgzAI= X-Google-Smtp-Source: APXvYqygA10v0auNXkrpTsIYPc4tbAiUps4KPEjry566nMxt3k+0vgMANBQ+0WJHEsbJO/Ii2PuE4A== X-Received: by 2002:a1c:ddd6:: with SMTP id u205mr6468892wmg.151.1581604940988; Thu, 13 Feb 2020 06:42:20 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 29/46] target/arm: Enable ARMv8.2-UAO in -cpu max Date: Thu, 13 Feb 2020 14:41:28 +0000 Message-Id: <20200213144145.818-30-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::343 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20200208125816.14954-21-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu64.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 57fbc5eade7..1359564c554 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -676,6 +676,10 @@ static void aarch64_max_initfn(Object *obj) t =3D FIELD_DP64(t, ID_AA64MMFR1, PAN, 2); /* ATS1E1 */ cpu->isar.id_aa64mmfr1 =3D t; =20 + t =3D cpu->isar.id_aa64mmfr2; + t =3D FIELD_DP64(t, ID_AA64MMFR2, UAO, 1); + cpu->isar.id_aa64mmfr2 =3D t; + /* Replicate the same data to the 32-bit id registers. */ u =3D cpu->isar.id_isar5; u =3D FIELD_DP32(u, ID_ISAR5, AES, 2); /* AES + PMULL */ --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581607330457953.9384614094427; Thu, 13 Feb 2020 07:22:10 -0800 (PST) Received: from localhost ([::1]:54432 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2GBu-0003dI-QA for importer@patchew.org; Thu, 13 Feb 2020 10:14:10 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60445) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2FhC-0004h0-1c for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:31 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2Fh9-0002E2-IC for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:25 -0500 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]:45635) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2Fh9-0002Ch-Ak for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:23 -0500 Received: by mail-wr1-x432.google.com with SMTP id g3so6966051wrs.12 for ; Thu, 13 Feb 2020 06:42:23 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.21 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=0V9qaj2G2nmmxYotWQnlHB27wnLxZhF+76Y+FiGCx/w=; b=rTsIpSY8J60vHPgMSsgls0LVjtAbOncOPwLOgdXHg0i/K62RxM8RTpbBEwvIOgAamM oqjHa4cwkPt7yjAstcn45jNJY9+uCeykwKVjibnrosihNSyRtFYxY3zQSAkGvHHUKSoP ATLXrJt1lG2JSTQ0WaTlMvUhPbTVUzP93lK/l59xHVXQbQTU4HA8uc3jTq+D3iZIEd25 pPrb2dDntVAt6FIq6Kgit4E1R64agOakFreMRTwWx/b/RByK72GCPRvn9Kxv02nmeKlt Cd3z2WbvHK+2AR91YApyv4qT2qpohhyHQm+JaYmorgWeZNlxwp2LiVOQv6IWnRhyVDdX 5aHg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0V9qaj2G2nmmxYotWQnlHB27wnLxZhF+76Y+FiGCx/w=; b=Ohah7Xa4IXwfMJhgd+pGKrfjX1e4sarKdLNZ9A2I4hC6dyI74Sk3eexi9fqs31pwYc Zl5X2CsUOCfXLODOOH/LQfpcdlPpsAZ7fwuSW1sxCHENS7uyw7OS8hiLJKwd0ePoZtBy FPvH77LS1tz3bQsd7c3+M1LFQRWIf+bsD0uHZajc2QrARmCoGsTeo+qQPj0qxEv9UTuN CzdLhewt+1sory60aTzfSSRhuinZfE1a8AVUgYXRjqhX27vNx3Yx7CrfCyXi2E2ANjMl Y3jT0Mzu/E9D992ffLGmTMOJ1kYDpbfTSM/sZ0ulteeFAC2e0GV1CgPOP6NL8GvQeqhz aVkw== X-Gm-Message-State: APjAAAVuCljxFiRL9ksgUjl1Nl2R54N64ojTEFNeYQQxLvxWMJs9k0ce RC2bjga5hhX/B9M4vNB5h0wLZHE8Z3U= X-Google-Smtp-Source: APXvYqyMVaERweryGGfOLiSU31R8QyKF1cO1hs1XWsnMXH3PIYDv2GYyi9eyEWpUHLWXZo81ffJfKQ== X-Received: by 2002:adf:e610:: with SMTP id p16mr23567702wrm.81.1581604941961; Thu, 13 Feb 2020 06:42:21 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 30/46] hw/arm: ast2400/ast2500: Wire up EHCI controllers Date: Thu, 13 Feb 2020 14:41:29 +0000 Message-Id: <20200213144145.818-31-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::432 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Guenter Roeck Initialize EHCI controllers on AST2400 and AST2500 using the existing TYPE_PLATFORM_EHCI. After this change, booting ast2500-evb into Linux successfully instantiates a USB interface. ehci-platform 1e6a3000.usb: EHCI Host Controller ehci-platform 1e6a3000.usb: new USB bus registered, assigned bus number 1 ehci-platform 1e6a3000.usb: irq 21, io mem 0x1e6a3000 ehci-platform 1e6a3000.usb: USB 2.0 started, EHCI 1.00 usb usb1: New USB device found, idVendor=3D1d6b, idProduct=3D0002, bcdDevic= e=3D 5.05 usb usb1: New USB device strings: Mfr=3D3, Product=3D2, SerialNumber=3D1 usb usb1: Product: EHCI Host Controller Signed-off-by: Guenter Roeck Reviewed-by: C=C3=A9dric Le Goater Reviewed-by: Joel Stanley Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20200206183437.3979-1-linux@roeck-us.net Signed-off-by: Peter Maydell --- include/hw/arm/aspeed_soc.h | 6 ++++++ hw/arm/aspeed_soc.c | 25 +++++++++++++++++++++++++ 2 files changed, 31 insertions(+) diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 90ac7f7ffa3..78b9f6ae532 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -26,8 +26,10 @@ #include "target/arm/cpu.h" #include "hw/gpio/aspeed_gpio.h" #include "hw/sd/aspeed_sdhci.h" +#include "hw/usb/hcd-ehci.h" =20 #define ASPEED_SPIS_NUM 2 +#define ASPEED_EHCIS_NUM 2 #define ASPEED_WDTS_NUM 4 #define ASPEED_CPUS_NUM 2 #define ASPEED_MACS_NUM 4 @@ -50,6 +52,7 @@ typedef struct AspeedSoCState { AspeedXDMAState xdma; AspeedSMCState fmc; AspeedSMCState spi[ASPEED_SPIS_NUM]; + EHCISysBusState ehci[ASPEED_EHCIS_NUM]; AspeedSDMCState sdmc; AspeedWDTState wdt[ASPEED_WDTS_NUM]; FTGMAC100State ftgmac100[ASPEED_MACS_NUM]; @@ -71,6 +74,7 @@ typedef struct AspeedSoCClass { uint32_t silicon_rev; uint64_t sram_size; int spis_num; + int ehcis_num; int wdts_num; int macs_num; const int *irqmap; @@ -94,6 +98,8 @@ enum { ASPEED_FMC, ASPEED_SPI1, ASPEED_SPI2, + ASPEED_EHCI1, + ASPEED_EHCI2, ASPEED_VIC, ASPEED_SDMC, ASPEED_SCU, diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index b5e809a1d3f..696c7fda14b 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -30,6 +30,7 @@ static const hwaddr aspeed_soc_ast2400_memmap[] =3D { [ASPEED_IOMEM] =3D 0x1E600000, [ASPEED_FMC] =3D 0x1E620000, [ASPEED_SPI1] =3D 0x1E630000, + [ASPEED_EHCI1] =3D 0x1E6A1000, [ASPEED_VIC] =3D 0x1E6C0000, [ASPEED_SDMC] =3D 0x1E6E0000, [ASPEED_SCU] =3D 0x1E6E2000, @@ -59,6 +60,8 @@ static const hwaddr aspeed_soc_ast2500_memmap[] =3D { [ASPEED_FMC] =3D 0x1E620000, [ASPEED_SPI1] =3D 0x1E630000, [ASPEED_SPI2] =3D 0x1E631000, + [ASPEED_EHCI1] =3D 0x1E6A1000, + [ASPEED_EHCI2] =3D 0x1E6A3000, [ASPEED_VIC] =3D 0x1E6C0000, [ASPEED_SDMC] =3D 0x1E6E0000, [ASPEED_SCU] =3D 0x1E6E2000, @@ -91,6 +94,8 @@ static const int aspeed_soc_ast2400_irqmap[] =3D { [ASPEED_UART5] =3D 10, [ASPEED_VUART] =3D 8, [ASPEED_FMC] =3D 19, + [ASPEED_EHCI1] =3D 5, + [ASPEED_EHCI2] =3D 13, [ASPEED_SDMC] =3D 0, [ASPEED_SCU] =3D 21, [ASPEED_ADC] =3D 31, @@ -180,6 +185,11 @@ static void aspeed_soc_init(Object *obj) sizeof(s->spi[i]), typename); } =20 + for (i =3D 0; i < sc->ehcis_num; i++) { + sysbus_init_child_obj(obj, "ehci[*]", OBJECT(&s->ehci[i]), + sizeof(s->ehci[i]), TYPE_PLATFORM_EHCI); + } + snprintf(typename, sizeof(typename), "aspeed.sdmc-%s", socname); sysbus_init_child_obj(obj, "sdmc", OBJECT(&s->sdmc), sizeof(s->sdmc), typename); @@ -364,6 +374,19 @@ static void aspeed_soc_realize(DeviceState *dev, Error= **errp) s->spi[i].ctrl->flash_window_base); } =20 + /* EHCI */ + for (i =3D 0; i < sc->ehcis_num; i++) { + object_property_set_bool(OBJECT(&s->ehci[i]), true, "realized", &e= rr); + if (err) { + error_propagate(errp, err); + return; + } + sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0, + sc->memmap[ASPEED_EHCI1 + i]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0, + aspeed_soc_get_irq(s, ASPEED_EHCI1 + i)); + } + /* SDMC - SDRAM Memory Controller */ object_property_set_bool(OBJECT(&s->sdmc), true, "realized", &err); if (err) { @@ -472,6 +495,7 @@ static void aspeed_soc_ast2400_class_init(ObjectClass *= oc, void *data) sc->silicon_rev =3D AST2400_A1_SILICON_REV; sc->sram_size =3D 0x8000; sc->spis_num =3D 1; + sc->ehcis_num =3D 1; sc->wdts_num =3D 2; sc->macs_num =3D 2; sc->irqmap =3D aspeed_soc_ast2400_irqmap; @@ -496,6 +520,7 @@ static void aspeed_soc_ast2500_class_init(ObjectClass *= oc, void *data) sc->silicon_rev =3D AST2500_A1_SILICON_REV; sc->sram_size =3D 0x9000; sc->spis_num =3D 2; + sc->ehcis_num =3D 2; sc->wdts_num =3D 3; sc->macs_num =3D 2; sc->irqmap =3D aspeed_soc_ast2500_irqmap; --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581606042706992.54056601048; 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.22 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=B4itb9kIDkgDxpdKjzasmbvHH8eIShpCoXlgDew/PyI=; b=Won5PYxRo25UM/ElpmKlqGBZOZhrYjMfXAHJJmpp96LwZMFFc4k2vT/+PPFXp3Ww1K TowLse4c00bLeW2WGYXwMab/2wjdYF9Pp42TE3lHWfcd8quf149KVEUVuP6L3E9q68fm OocJQAWpuIQTB+RP3UHFglhZ7CuRtgnHG6IEQKIJ7aPPru9uhjCsv53tQCHxLfbDr/5l yGF0RqURA1wRMr6rciMrZ8UUnpgtP2dx+YysbO+G46oo6GMcFFH7LOkBEWUmGPkFIUbx DO9EQ2jjYoeZssNL8Bwvq94XstmCO7pseCgbCTKekrZeLu/pfAw8f23Sokm1+0hof5mR mxgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=B4itb9kIDkgDxpdKjzasmbvHH8eIShpCoXlgDew/PyI=; b=alEahApgIuw8t5AJo/KNq3Z+oq39AqRG8poK/i4lHnv5CL9hV4qFZXvwgpnHK/mg10 bf1cYLCA8KeOVwJfGkrRH2XUudAx34sk8W6SWtRX0HPhB0C5yVbuuwxjLSv26e96Fm/7 5Zky/TBShZ+HEcwa9H9UG8yLGguC9QLDuxf/MN+IR1NLemLncKIpdtqCzlyRW4/9BpID /hVJaPmMv1tAML6RkrRRAaCdMz2MHxcG/ubm4Xu+36Vvzy0bmH7ybqwti0qPy+5QB58B sJHEJhCoogoIUWjPFOD7hRvSW8QRqEZ2OLHQwpeOvQpG2NVT33xKoxM1QEHp0WDPnt99 gFfA== X-Gm-Message-State: APjAAAVAbO2P3d547Tplwnhf1BFU5zpozoMbI3vktol2FRDH7lHwVfXr lYI9GHCNA5qcM1JXnYWLBveb9K0Dej8= X-Google-Smtp-Source: APXvYqzKZZVhegR/5a/95BpbLA6+ofciBM0xPKzrgryWbg9L/8pzT6WocNomELXevcaIkTUPH0y+1w== X-Received: by 2002:a5d:4984:: with SMTP id r4mr21287909wrq.137.1581604943047; Thu, 13 Feb 2020 06:42:23 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 31/46] hw/arm: ast2600: Wire up EHCI controllers Date: Thu, 13 Feb 2020 14:41:30 +0000 Message-Id: <20200213144145.818-32-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::429 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Guenter Roeck Initialize EHCI controllers on AST2600 using the existing TYPE_PLATFORM_EHCI. After this change, booting ast2600-evb into Linux successfully instantiates a USB interface after the necessary changes are made to its devicetree files. ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver ehci-platform: EHCI generic platform driver ehci-platform 1e6a3000.usb: EHCI Host Controller ehci-platform 1e6a3000.usb: new USB bus registered, assigned bus number 1 ehci-platform 1e6a3000.usb: irq 25, io mem 0x1e6a3000 ehci-platform 1e6a3000.usb: USB 2.0 started, EHCI 1.00 usb usb1: Manufacturer: Linux 5.5.0-09825-ga0802f2d0ef5-dirty ehci_hcd usb 1-1: new high-speed USB device number 2 using ehci-platform Reviewed-by: C=C3=A9dric Le Goater Signed-off-by: Guenter Roeck Reviewed-by: Niek Linnenbank Message-id: 20200207174548.9087-1-linux@roeck-us.net Signed-off-by: Peter Maydell --- hw/arm/aspeed_ast2600.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index 90cf1c755d3..446b44d31cf 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -31,6 +31,8 @@ static const hwaddr aspeed_soc_ast2600_memmap[] =3D { [ASPEED_FMC] =3D 0x1E620000, [ASPEED_SPI1] =3D 0x1E630000, [ASPEED_SPI2] =3D 0x1E641000, + [ASPEED_EHCI1] =3D 0x1E6A1000, + [ASPEED_EHCI2] =3D 0x1E6A3000, [ASPEED_MII1] =3D 0x1E650000, [ASPEED_MII2] =3D 0x1E650008, [ASPEED_MII3] =3D 0x1E650010, @@ -79,6 +81,8 @@ static const int aspeed_soc_ast2600_irqmap[] =3D { [ASPEED_ADC] =3D 78, [ASPEED_XDMA] =3D 6, [ASPEED_SDHCI] =3D 43, + [ASPEED_EHCI1] =3D 5, + [ASPEED_EHCI2] =3D 9, [ASPEED_EMMC] =3D 15, [ASPEED_GPIO] =3D 40, [ASPEED_GPIO_1_8V] =3D 11, @@ -166,6 +170,11 @@ static void aspeed_soc_ast2600_init(Object *obj) sizeof(s->spi[i]), typename); } =20 + for (i =3D 0; i < sc->ehcis_num; i++) { + sysbus_init_child_obj(obj, "ehci[*]", OBJECT(&s->ehci[i]), + sizeof(s->ehci[i]), TYPE_PLATFORM_EHCI); + } + snprintf(typename, sizeof(typename), "aspeed.sdmc-%s", socname); sysbus_init_child_obj(obj, "sdmc", OBJECT(&s->sdmc), sizeof(s->sdmc), typename); @@ -416,6 +425,19 @@ static void aspeed_soc_ast2600_realize(DeviceState *de= v, Error **errp) s->spi[i].ctrl->flash_window_base); } =20 + /* EHCI */ + for (i =3D 0; i < sc->ehcis_num; i++) { + object_property_set_bool(OBJECT(&s->ehci[i]), true, "realized", &e= rr); + if (err) { + error_propagate(errp, err); + return; + } + sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0, + sc->memmap[ASPEED_EHCI1 + i]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0, + aspeed_soc_get_irq(s, ASPEED_EHCI1 + i)); + } + /* SDMC - SDRAM Memory Controller */ object_property_set_bool(OBJECT(&s->sdmc), true, "realized", &err); if (err) { @@ -534,6 +556,7 @@ static void aspeed_soc_ast2600_class_init(ObjectClass *= oc, void *data) sc->silicon_rev =3D AST2600_A0_SILICON_REV; sc->sram_size =3D 0x10000; sc->spis_num =3D 2; + sc->ehcis_num =3D 2; sc->wdts_num =3D 4; sc->macs_num =3D 4; sc->irqmap =3D aspeed_soc_ast2600_irqmap; --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581605923394353.7553469956463; Thu, 13 Feb 2020 06:58:43 -0800 (PST) Received: from localhost ([::1]:54070 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2Fww-0000gd-5B for importer@patchew.org; Thu, 13 Feb 2020 09:58:42 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60476) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2FhM-0004kV-T9 for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:37 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2FhC-0002Hm-RQ for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:32 -0500 Received: from mail-wr1-x429.google.com ([2a00:1450:4864:20::429]:44885) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2FhC-0002FW-LM for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:26 -0500 Received: by mail-wr1-x429.google.com with SMTP id m16so6961842wrx.11 for ; Thu, 13 Feb 2020 06:42:26 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.23 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=5tUOJeIx9ODuErotr2GDfZAcpkDzh5ZHq/aLo2wzos4=; b=T4P1tRXVUqqo3OuOnWb0Bx5MvMMUSgbh7XdsBvL6dytd+kiIWHCnQEqFKJXH2tdrvn yKwN/SYaWAmJkwb8B6jM7nRfDAWY3EK/vX7gwdLfjFy4ubJlb+VKirhOkY9ooNcom9yd D0dwD/d/pcWS5mHkBnt9bZIIlAlJBF/jjVJQ8rA4G4uItaotOdo9PQE6YJf79xVVqDpQ p2RcJ+F3RQL589cD8THWmdHH1JllWtOQZR+nM6VM5yAMAgsoW7pCNJPY9lm4vEIyK94k nrOv0N7uocd3WM2yrDh6rKs8+t7f8zilZopFNhec1RG9qz//z50cChpFq/oLgPisC1iR YrnA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5tUOJeIx9ODuErotr2GDfZAcpkDzh5ZHq/aLo2wzos4=; b=Is1IftQS7ejtPweyjLvoYe0+erNHfqI3QCqJxsNm2x24bCMmeRGDi6/YD9kVZD2yuv d5s9leKbKMFqGVU0iAQnkTfgrMI+21Zjh3F3nWD/Q5phK9f9sNIM0KjKQ5oTJ6rKfZLn QDahv2ueLWBVZsl5Sqv8eC4novfUzKVaNvW01ilxQAYJR7gQCvifDw7l/iAZUBz+GhWA NV8ywFracJGZk7g9TJSrcjSHuvZ6m4kiBOZZ5H2qPKMmRXwCln5ixyGev+AvkBmE/TZv dKIebZuEipi8JkRkZ2d4/NRX/FLZe+XIVSwOXrTuHlGnce84FqEs/n+EZNHg1wp+vbEj +fbA== X-Gm-Message-State: APjAAAVw7PrWD7LU3/pYZm1r8OAXUblEH3tr80VnmS/BF5GJeK1ihgcl 9fJCMHMomxJ4g/vcI+aIrWJbogHLImc= X-Google-Smtp-Source: APXvYqwQN9wVTHr5Rr5IXl8i/5+qk4gvRiCh1iakSQsDfDuj0HOuiUkboUB2hFRQYhikH6aVyMg6Ww== X-Received: by 2002:a5d:6545:: with SMTP id z5mr21700352wrv.3.1581604944243; Thu, 13 Feb 2020 06:42:24 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 32/46] hw/char/exynos4210_uart: Fix memleaks in exynos4210_uart_init Date: Thu, 13 Feb 2020 14:41:31 +0000 Message-Id: <20200213144145.818-33-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::429 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Chen Qun It's easy to reproduce as follow: virsh qemu-monitor-command vm1 --pretty '{"execute": "device-list-propertie= s", "arguments":{"typename":"exynos4210.uart"}}' ASAN shows memory leak stack: #1 0xfffd896d71cb in g_malloc0 (/lib64/libglib-2.0.so.0+0x571cb) #2 0xaaad270beee3 in timer_new_full /qemu/include/qemu/timer.h:530 #3 0xaaad270beee3 in timer_new /qemu/include/qemu/timer.h:551 #4 0xaaad270beee3 in timer_new_ns /qemu/include/qemu/timer.h:569 #5 0xaaad270beee3 in exynos4210_uart_init /qemu/hw/char/exynos4210_uart.c= :677 #6 0xaaad275c8f4f in object_initialize_with_type /qemu/qom/object.c:516 #7 0xaaad275c91bb in object_new_with_type /qemu/qom/object.c:684 #8 0xaaad2755df2f in qmp_device_list_properties /qemu/qom/qom-qmp-cmds.c:= 152 Reported-by: Euler Robot Signed-off-by: Chen Qun Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20200213025603.149432-1-kuhn.chenqun@huawei.com Signed-off-by: Peter Maydell --- hw/char/exynos4210_uart.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/char/exynos4210_uart.c b/hw/char/exynos4210_uart.c index 25d6588e413..96d5180e3e2 100644 --- a/hw/char/exynos4210_uart.c +++ b/hw/char/exynos4210_uart.c @@ -674,8 +674,6 @@ static void exynos4210_uart_init(Object *obj) SysBusDevice *dev =3D SYS_BUS_DEVICE(obj); Exynos4210UartState *s =3D EXYNOS4210_UART(dev); =20 - s->fifo_timeout_timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, - exynos4210_uart_timeout_int, s); s->wordtime =3D NANOSECONDS_PER_SECOND * 10 / 9600; =20 /* memory mapping */ @@ -691,6 +689,9 @@ static void exynos4210_uart_realize(DeviceState *dev, E= rror **errp) { Exynos4210UartState *s =3D EXYNOS4210_UART(dev); =20 + s->fifo_timeout_timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, + exynos4210_uart_timeout_int, s); + qemu_chr_fe_set_handlers(&s->chr, exynos4210_uart_can_receive, exynos4210_uart_receive, exynos4210_uart_even= t, NULL, s, NULL, true); --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581607272060925.0524600569347; Thu, 13 Feb 2020 07:21:12 -0800 (PST) Received: from localhost ([::1]:54248 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2G4B-0001U8-Nt for importer@patchew.org; Thu, 13 Feb 2020 10:06:11 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60477) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2FhN-0004kd-CD for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:39 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2FhC-0002I9-UV for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:33 -0500 Received: from mail-wm1-x341.google.com ([2a00:1450:4864:20::341]:34121) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2FhC-0002Gc-O5 for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:26 -0500 Received: by mail-wm1-x341.google.com with SMTP id s144so7258313wme.1 for ; Thu, 13 Feb 2020 06:42:26 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.24 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=5os6T9iOh7dBv5fGrw979h37TvZ3kqm7dXAx5e9KJF4=; b=bkCuQ/YcOtpLi53t48Ps16ySnvhDQ2b10r53alETUR5CILzHtuSVjyuDYdZQ2UO/+B QZ884Qh1negW4LXWG1OGCjf13cXQhigfP0hsR4WJdNXmspKb0VcYMTqQEY87e14nqV6I jtRGKrd/abFkKqCvKxSoKuBTrwJuBnc2BYIC8l1cMhCbEr109HtTas/YAFDI5pZy7Xfs ymhfUySemIL1aqLn3xqY3IRaFHedPa4zN4o9/lyeOrxT1Il+lhn5mPze/MB20u7/LEL9 lxjnOQ1EGJG+hEF+DlcRGHnpmMnvysx2eqprKZpEEJR/ej04e987bAb/t/0mEmih+0SE hkaw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5os6T9iOh7dBv5fGrw979h37TvZ3kqm7dXAx5e9KJF4=; b=h/urqrC42NCva8mgHSGGfx3n0CjN1KgjqWVilqG/nMD3YQ6buY3W+DQfYfbNdX74VV wfx+9B8hDx/DDpRdoO87+ICkkOiHSXLRdL8hSj+M4gELnPUpDWEWl9j8NIXhdzDlHceB aOzSNrvdsN4/ZO3Jgw3q4T8rM+96BSb4EY0u0wO9CUpmmhK+7Hv2I05p56Ah0bWzRKtA A/8CCjlsmsTtq7MZXQC7WiDTKEzxbmhEphgL8tNZPzLMPhIIT/MmnATB2+PC/e/IaSrT wz+udvyND+9wI3okxAHWKeB4URVVyCwsqdJ0rWhkLQcr+N+Gqj5VM3iCGhKn9zuKixRS 9yYA== X-Gm-Message-State: APjAAAW5SQvOEMmAL/DoUq/0p7rbFZIBAQnFOC9+WY01Ns2EqievzXGF wLxjKhgGnutK2Eg14mvRCdF0WK5/BI4= X-Google-Smtp-Source: APXvYqzoABP5IiZ1UswY7prYBtEXtFsD08NXC3cv26QJwmqHE3f1531Mk2iH4RaIkcL5+v0pPM526w== X-Received: by 2002:a1c:9854:: with SMTP id a81mr6008245wme.1.1581604945388; Thu, 13 Feb 2020 06:42:25 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 33/46] hw/arm/raspi: Use BCM2708 machine type with pre Device Tree kernels Date: Thu, 13 Feb 2020 14:41:32 +0000 Message-Id: <20200213144145.818-34-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::341 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 When booting without device tree, the Linux kernels uses the $R1 register to determine the machine type. The list of values is registered at [1]. There are two entries for the Raspberry Pi: - https://www.arm.linux.org.uk/developer/machines/list.php?mid=3D3138 name: MACH_TYPE_BCM2708 value: 0xc42 (3138) status: Active, not mainlined date: 15 Oct 2010 - https://www.arm.linux.org.uk/developer/machines/list.php?mid=3D4828 name: MACH_TYPE_BCM2835 value: 4828 status: Active, mainlined date: 6 Dec 2013 QEMU always used the non-mainlined type MACH_TYPE_BCM2708. The value 0xc43 is registered to 'MX51_GGC' (processor i.MX51), and 0xc44 to 'Western Digital Sharespace NAS' (processor Marvell 88F5182). The Raspberry Pi foundation bootloader only sets the BCM2708 machine type, see [2] or [3]: 133 9: 134 mov r0, #0 135 ldr r1, =3D3138 @ BCM2708 machine id 136 ldr r2, atags @ ATAGS 137 bx r4 U-Boot only uses MACH_TYPE_BCM2708 (see [4]): 25 /* 26 * 2835 is a SKU in a series for which the 2708 is the first or primary= SoC, 27 * so 2708 has historically been used rather than a dedicated 2835 ID. 28 * 29 * We don't define a machine type for bcm2709/bcm2836 since the RPi Fou= ndation 30 * chose to use someone else's previously registered machine ID (3139, = MX51_GGC) 31 * rather than obtaining a valid ID:-/ 32 * 33 * For the bcm2837, hopefully a machine type is not needed, since every= thing 34 * is DT. 35 */ While the definition MACH_BCM2709 with value 0xc43 was introduced in a commit described "Add 2709 platform for Raspberry Pi 2" out of the mainline Linux kernel, it does not seem used, and the platform is introduced with Device Tree support anyway (see [5] and [6]). Remove the unused values (0xc43 introduced in commit 1df7d1f9303aef "raspi: add raspberry pi 2 machine" and 0xc44 in commit bade58166f4 "raspi: Raspberry Pi 3 support"), keeping only MACH_TYPE_BCM2708. [1] https://www.arm.linux.org.uk/developer/machines/ [2] https://github.com/raspberrypi/tools/blob/920c7ed2e/armstubs/armstub7.S= #L135 [3] https://github.com/raspberrypi/tools/blob/49719d554/armstubs/armstub7.S= #L64 [4] https://gitlab.denx.de/u-boot/u-boot/blob/v2015.04/include/configs/rpi-= common.h#L18 [5] https://github.com/raspberrypi/linux/commit/d9fac63adac#diff-6722037d79= 570df5b392a49e0e006573R526 [6] http://lists.infradead.org/pipermail/linux-rpi-kernel/2015-February/001= 268.html Cc: Zolt=C3=A1n Baldaszti Cc: Pekka Enberg Cc: Stephen Warren Cc: Kshitij Soni Cc: Michael Chan Cc: Andrew Baumann Reviewed-by: Alistair Francis Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Niek Linnenbank Message-id: 20200208165645.15657-2-f4bug@amsat.org Signed-off-by: Peter Maydell --- hw/arm/raspi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index 3996f6c63a4..f2ccabc6628 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -29,8 +29,8 @@ #define FIRMWARE_ADDR_3 0x80000 /* Pi 3 loads kernel.img here by default */ #define SPINTABLE_ADDR 0xd8 /* Pi 3 bootloader spintable */ =20 -/* Table of Linux board IDs for different Pi versions */ -static const int raspi_boardid[] =3D {[1] =3D 0xc42, [2] =3D 0xc43, [3] = =3D 0xc44}; +/* Registered machine type (matches RPi Foundation bootloader and U-Boot) = */ +#define MACH_TYPE_BCM2708 3138 =20 typedef struct RasPiState { BCM283XState soc; @@ -116,7 +116,7 @@ static void setup_boot(MachineState *machine, int versi= on, size_t ram_size) static struct arm_boot_info binfo; int r; =20 - binfo.board_id =3D raspi_boardid[version]; + binfo.board_id =3D MACH_TYPE_BCM2708; binfo.ram_size =3D ram_size; binfo.nb_cpus =3D machine->smp.cpus; =20 --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581607383083720.5213068475573; Thu, 13 Feb 2020 07:23:03 -0800 (PST) Received: from localhost ([::1]:54286 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2G6b-0004HO-7L for importer@patchew.org; Thu, 13 Feb 2020 10:08:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60536) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2FhO-0004n0-8G for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:39 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2FhM-0002OS-V1 for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:38 -0500 Received: from mail-wr1-x434.google.com ([2a00:1450:4864:20::434]:38068) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2FhM-0002IH-OV for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:36 -0500 Received: by mail-wr1-x434.google.com with SMTP id y17so6985213wrh.5 for ; Thu, 13 Feb 2020 06:42:32 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.25 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=Q9e7uYuHp7WmXaVUmzVEpdJqH/noVIYn8omsNxWs6hg=; b=gYS+CSwsM9/WEBEUpJ4UyzuDvoxX/lqMQ+MYrMk9HFM+m3PYr3gtQyQlMHHc84TKpg IUGX84wAW0A9mSEF0sMenylP1g+gvl6DYr3QFqDVWUF76p7XF9K0D2pqjxJXeh1HFv/V 2cwDsi3d5/CM74pQ9QYVGIjHgoor5mSLCF+dID3a8KGwTiR9Le+XibGC1oHp9ZlPzXmA VmjXT6iUojukYuTxoGWd+fi3SsK8wUa/DdBM2KUOZEHuvdj4vltMVTigJpYw/1OPd4AU uQjiHy2PJ0s5WdNnCd6ZAgEhypeVP76xqJnvuc4PAUKKlrK5+ttC53JtDnUm01DxUfJI BWbA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Q9e7uYuHp7WmXaVUmzVEpdJqH/noVIYn8omsNxWs6hg=; b=LBEr03lnmFouYwwae5ENyssZa+UfUSeu6wm5cTBpoW6ThWM9w2afQFAv3F8LauOXFV EZc9mGrGAaM80Tvb1Y/K43eEO72aLXbTAZzAURRa+hEC++HROApa6wyN9dyK0XW3Wtlo 7RzB6YrxksKyj6mXPqtQforEDYdbag0TPB4JPPCkHBTHW0Rr4q6Xcya3C3rWQsJZwbPy XTi0kHwP+ADyxwp4XRnWmx9L19TMv3CyE5lU8dA0o0uQrvPWYcTw2JK5RKAJLOl2Q5AT p006e5Aco5zpuNEAA/eOPDuEBNj7VGPK4fE3krAZBbt7yPxl0U4FTnT1fTVS42yeOWMl ndDg== X-Gm-Message-State: APjAAAV4XV2H0bCot0EFGqpZMbCtYTahZkrOtwOllEwovV9bGrC+Wulv J5H7mbxUGr7E48WlO5geoByvL3m6n+0= X-Google-Smtp-Source: APXvYqwFbXNGaFjVv8At5zv+/CXSXoFuHeS7u6Xm1kCBHEOONwb7zQ4OqsTz5CIdrVsQwvlFnaQKUA== X-Received: by 2002:adf:f802:: with SMTP id s2mr23549703wrp.201.1581604946456; Thu, 13 Feb 2020 06:42:26 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 34/46] hw/arm/raspi: Correct the board descriptions Date: Thu, 13 Feb 2020 14:41:33 +0000 Message-Id: <20200213144145.818-35-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::434 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 We hardcode the board revision as 0xa21041 for the raspi2, and 0xa02082 for the raspi3: 166 static void raspi_init(MachineState *machine, int version) 167 { ... 194 int board_rev =3D version =3D=3D 3 ? 0xa02082 : 0xa21041; These revision codes are for the 2B and 3B models, see: https://www.raspberrypi.org/documentation/hardware/raspberrypi/revision-cod= es/README.md Correct the board description. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20200208165645.15657-3-f4bug@amsat.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/arm/raspi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index f2ccabc6628..818146fdbb2 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -221,7 +221,7 @@ static void raspi2_init(MachineState *machine) =20 static void raspi2_machine_init(MachineClass *mc) { - mc->desc =3D "Raspberry Pi 2"; + mc->desc =3D "Raspberry Pi 2B"; mc->init =3D raspi2_init; mc->block_default_type =3D IF_SD; mc->no_parallel =3D 1; @@ -243,7 +243,7 @@ static void raspi3_init(MachineState *machine) =20 static void raspi3_machine_init(MachineClass *mc) { - mc->desc =3D "Raspberry Pi 3"; + mc->desc =3D "Raspberry Pi 3B"; mc->init =3D raspi3_init; mc->block_default_type =3D IF_SD; mc->no_parallel =3D 1; --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581607249183255.57015062072549; Thu, 13 Feb 2020 07:20:49 -0800 (PST) Received: from localhost ([::1]:54414 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2GAf-00025K-Fz for importer@patchew.org; Thu, 13 Feb 2020 10:12:53 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60546) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2FhO-0004nn-GY for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:39 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2FhN-0002Od-13 for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:38 -0500 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]:36560) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2FhM-0002Iq-QV for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:36 -0500 Received: by mail-wm1-x32e.google.com with SMTP id p17so7027136wma.1 for ; Thu, 13 Feb 2020 06:42:33 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.26 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=2ouywPz5Xm2vWfWs0doQqLT+siGfCg7eInrXlduofqk=; b=e6phfntSqSlqeOfzxvNxo12Ke3kPc5u34git/3hWQvhuLF97rzSAUTKJrIsHovXefa lO7LB/H3H/YqLkQwbsqNUQ4m3vuAwynTpqZxkcvFd/DWrK0zXFBeGu14c2CAU6U2ZUJj 4FcWCTKiZrGcmKmVQ1YsxnGMSv7ulpU76eY9Yuk8hdCEP2raZo86dUmZZj7MVLyhAnEA ik6JDFd6V5FarRMgBHpALcLhLLn6mYN6KlRZmIQxl4gYdUFQYiLCO4W+d1GYVMqG5NUH 9hpWKiKZq1IZgCvpQCrbz1R+0dHXPoIQH4zSo2juVckMG3IgH66i+062r/gghfrwHZaV /9JA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2ouywPz5Xm2vWfWs0doQqLT+siGfCg7eInrXlduofqk=; b=L+jtYEG4e1Nmsa606SxhsPGtRWAZXawATerevMtxPthDO3KMkjBIPapdPn6jx73ype 0i0/H5ZaKonS9+22tPO8sv9QVOwTKGGcBO42Oj54Hl2KuE4mWaZkcqQwwv2wZlUs/DB5 EFQet++GPYM5iEsAidIspdSys/NOkb+vMJHCKujExXaLWG+ectff9azarh1Q2UhmFIoN XBGBtjoieY3tHyOlyZ+JQzu7/yO4bt1l+i3i9YfwPiYl7xHAWL0H+BBRphJLsnH8nAaN 8qZoCaXM69tMY+PzVTNDiHgbT/JsOPY4QwRdHL3vCkZ1tX6jXGVzzKKwivctmOEVzEGH IIjA== X-Gm-Message-State: APjAAAV2gctg1qwsx35MeLAAyLNKbPRmMDT6SUAaTTD1aeAXh3wtJaAa 1XIoCylqGXKSl/HLXcC3cTR+rEiFCqI= X-Google-Smtp-Source: APXvYqzHW/bupdWQM8jtZXdqDe+1asyg1lZ/zgo47HC+Or6YfAmwB7l5NI1J3J15ZyaipzJ8XSR2wA== X-Received: by 2002:a1c:1fc5:: with SMTP id f188mr6484394wmf.55.1581604947513; Thu, 13 Feb 2020 06:42:27 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 35/46] hw/arm/raspi: Extract the version from the board revision Date: Thu, 13 Feb 2020 14:41:34 +0000 Message-Id: <20200213144145.818-36-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32e X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 The board revision encode the board version. Add a helper to extract the version, and use it. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20200208165645.15657-4-f4bug@amsat.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/arm/raspi.c | 31 +++++++++++++++++++++++++++---- 1 file changed, 27 insertions(+), 4 deletions(-) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index 818146fdbb2..f285e2988fc 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -16,6 +16,7 @@ #include "qapi/error.h" #include "cpu.h" #include "hw/arm/bcm2836.h" +#include "hw/registerfields.h" #include "qemu/error-report.h" #include "hw/boards.h" #include "hw/loader.h" @@ -37,6 +38,28 @@ typedef struct RasPiState { MemoryRegion ram; } RasPiState; =20 +/* + * Board revision codes: + * www.raspberrypi.org/documentation/hardware/raspberrypi/revision-codes/ + */ +FIELD(REV_CODE, REVISION, 0, 4); +FIELD(REV_CODE, TYPE, 4, 8); +FIELD(REV_CODE, PROCESSOR, 12, 4); +FIELD(REV_CODE, MANUFACTURER, 16, 4); +FIELD(REV_CODE, MEMORY_SIZE, 20, 3); +FIELD(REV_CODE, STYLE, 23, 1); + +static int board_processor_id(uint32_t board_rev) +{ + assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */ + return FIELD_EX32(board_rev, REV_CODE, PROCESSOR); +} + +static int board_version(uint32_t board_rev) +{ + return board_processor_id(board_rev) + 1; +} + static void write_smpboot(ARMCPU *cpu, const struct arm_boot_info *info) { static const uint32_t smpboot[] =3D { @@ -164,9 +187,10 @@ static void setup_boot(MachineState *machine, int vers= ion, size_t ram_size) arm_load_kernel(ARM_CPU(first_cpu), machine, &binfo); } =20 -static void raspi_init(MachineState *machine, int version) +static void raspi_init(MachineState *machine, uint32_t board_rev) { RasPiState *s =3D g_new0(RasPiState, 1); + int version =3D board_version(board_rev); uint32_t vcram_size; DriveInfo *di; BlockBackend *blk; @@ -192,7 +216,6 @@ static void raspi_init(MachineState *machine, int versi= on) /* Setup the SOC */ object_property_add_const_link(OBJECT(&s->soc), "ram", OBJECT(&s->ram), &error_abort); - int board_rev =3D version =3D=3D 3 ? 0xa02082 : 0xa21041; object_property_set_int(OBJECT(&s->soc), board_rev, "board-rev", &error_abort); object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_abo= rt); @@ -216,7 +239,7 @@ static void raspi_init(MachineState *machine, int versi= on) =20 static void raspi2_init(MachineState *machine) { - raspi_init(machine, 2); + raspi_init(machine, 0xa21041); } =20 static void raspi2_machine_init(MachineClass *mc) @@ -238,7 +261,7 @@ DEFINE_MACHINE("raspi2", raspi2_machine_init) #ifdef TARGET_AARCH64 static void raspi3_init(MachineState *machine) { - raspi_init(machine, 3); + raspi_init(machine, 0xa02082); } =20 static void raspi3_machine_init(MachineClass *mc) --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581607310704984.9482326129142; Thu, 13 Feb 2020 07:21:50 -0800 (PST) Received: from localhost ([::1]:54458 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2GCz-0005PY-U6 for importer@patchew.org; Thu, 13 Feb 2020 10:15:17 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60572) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2FhP-0004pB-0Y for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:41 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2FhN-0002Q3-No for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:38 -0500 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]:51274) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2FhN-0002Je-Gl for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:37 -0500 Received: by mail-wm1-x32c.google.com with SMTP id t23so6545404wmi.1 for ; Thu, 13 Feb 2020 06:42:35 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.27 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=N0Kibz+Zwr8u1oAxdBoyGL/jmEs53LkcKtGIGXIk9Jc=; b=wb2dCeNIurBpUwfbb+APC04g/OdzVnWqKdQvnLa1cLt/2n93PP9Vf1kWWSq8fEkjlk KJZ2xAPZbx8IrjqXXwMKL6k2a4b+MB417a8gGkizabplGLFcLGXLDMcw3/RGsNZi46tY yegTzrkI/t2qo2MjxOg2Qayz3jda1whapC657j3/CaPmZuRZxx4WJx7mbBR7vxbG7Y5V 1jQy4VZ/9Tl1cTGYuNeDUO+35ibMXhHeQ5JTvulG8hePM9XzFr7H4GykaeU+2Jqcjx9R cDgceb3pbdCBkciuAdXtYq/4rRZJlWeylBXOOiuK0siJwYGO4LSaQSjkp8YL8R1+d+xO BejA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=N0Kibz+Zwr8u1oAxdBoyGL/jmEs53LkcKtGIGXIk9Jc=; b=uily8rNaLX37ezcvUErvrew1jQEYk0i/MZj8Sc6maGdqvy6W1qWPJDP8/NGXTAZw7n eXLRUSV3CFAHSS9BDMspNMARxO6oJOZ/TlhzSxjRn/WHKhgLXEmNfTc0b6c+yUu4g9i/ M3LSGvlEzbMYr1qRegl4IZnHAIUZbrwHMkqjjMLLKQSrCdNe+Ulh7IuIBXDVxC6KrTUz jpgCRgaxa+t9NsrmhS1C3SFy+9DVct0CknN8drlA373mXnC/MQB8Uds3Vnnhs0x7/IXM iiPE3dtmvGWtq9v8oKhk4t2PYfcXTzrdjdsHPkUl7qRmDT9fnPUoxKAm/XjsLnqe+E87 Gaxw== X-Gm-Message-State: APjAAAXmUoSUyPk62cJEXOXPax1/Rl21+IlAN53rXXdejr0G7xBTbCpk d7NKSh3d91yuyCC0WHkIlwBC0ijscnY= X-Google-Smtp-Source: APXvYqzi9MoiaVJPVAlZNkKtGHYFbUaHRSDbd+RDOerdVtWFt31e4cAwDTdWIBb07cjHAXsupdXEog== X-Received: by 2002:a7b:cbc9:: with SMTP id n9mr6268103wmi.89.1581604948544; Thu, 13 Feb 2020 06:42:28 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 36/46] hw/arm/raspi: Extract the RAM size from the board revision Date: Thu, 13 Feb 2020 14:41:35 +0000 Message-Id: <20200213144145.818-37-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 The board revision encode the amount of RAM. Add a helper to extract the RAM size, and use it. Since the amount of RAM is fixed (it is impossible to physically modify to have more or less RAM), do not allow sizes different than the one anounced by the manufacturer. Acked-by: Igor Mammedov Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20200208165645.15657-5-f4bug@amsat.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/arm/raspi.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index f285e2988fc..dcd8d2d6d38 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -13,6 +13,7 @@ =20 #include "qemu/osdep.h" #include "qemu/units.h" +#include "qemu/cutils.h" #include "qapi/error.h" #include "cpu.h" #include "hw/arm/bcm2836.h" @@ -49,6 +50,12 @@ FIELD(REV_CODE, MANUFACTURER, 16, 4); FIELD(REV_CODE, MEMORY_SIZE, 20, 3); FIELD(REV_CODE, STYLE, 23, 1); =20 +static uint64_t board_ram_size(uint32_t board_rev) +{ + assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */ + return 256 * MiB << FIELD_EX32(board_rev, REV_CODE, MEMORY_SIZE); +} + static int board_processor_id(uint32_t board_rev) { assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */ @@ -191,15 +198,17 @@ static void raspi_init(MachineState *machine, uint32_= t board_rev) { RasPiState *s =3D g_new0(RasPiState, 1); int version =3D board_version(board_rev); + uint64_t ram_size =3D board_ram_size(board_rev); uint32_t vcram_size; DriveInfo *di; BlockBackend *blk; BusState *bus; DeviceState *carddev; =20 - if (machine->ram_size > 1 * GiB) { - error_report("Requested ram size is too large for this machine: " - "maximum is 1GB"); + if (machine->ram_size !=3D ram_size) { + char *size_str =3D size_to_str(ram_size); + error_report("Invalid RAM size, should be %s", size_str); + g_free(size_str); exit(1); } =20 --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581607291471987.8103721894709; Thu, 13 Feb 2020 07:21:31 -0800 (PST) Received: from localhost ([::1]:54328 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2G8Q-00078U-SE for importer@patchew.org; Thu, 13 Feb 2020 10:10:34 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60535) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2FhO-0004mm-74 for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:39 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2FhN-0002Oi-1N for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:38 -0500 Received: from mail-wm1-x344.google.com ([2a00:1450:4864:20::344]:51731) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2FhM-0002Jr-Qo for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:36 -0500 Received: by mail-wm1-x344.google.com with SMTP id t23so6545453wmi.1 for ; Thu, 13 Feb 2020 06:42:35 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.28 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=GWz1pjVoz6EtEwxuWeaelwOEmy5EO8eEws/ey/K03f8=; b=BhmP95Exm/gK6DIhdwZvHR2w/qXWOLQX6K1tO4UzwadBpAEOX6iZjrIr4We4QPyzav XeiOY7BCkxyr00YSJilvGDmnE25aX5KN5kq5ezQ5n+kcz0ivD2hk5/26w5hyOAX8g+3s Nu1kCvHqIHD5GY3VTqObTGf/A6gXZurBxxwXjAJBgjOPTx9Lr5qGgdRQBHpUCf76dRhn k6NtpmPwTezQjIlFhfMyDn+DDj4OAAu2cTkWz+DifJm8T+DAbMDcuWbdKwqdGU3lSMx0 9XqClUUONZjdi+nSGBl0Kd0viV/G3sK4rOC3GNn6ziqy/aL0b7ZRkANt3e5pLLLP1D8v 4D/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GWz1pjVoz6EtEwxuWeaelwOEmy5EO8eEws/ey/K03f8=; b=eomcmT/0j+jy8mfej+g/2sHexm/gckMZiP5atyp4zPJeCbKHKi9MQy1KkEWZI0PcWi ymmN+8mD/ESGSWx1q9Fu3eHLEU0lH4h/8++6tUwDL35xY+bxtwZbiRx5zec2x0mzdzrE PeHgL3rsPbOeIp+jDQu6Mt3TyylIvjiHhyNMEBv4bEoozTpbpMN+xTPUDvMmLm/pOZBZ 78URAzJjpdqAx2iMej35Hg7tuolbBD9cxAx5JAm6Daki6fbVnvCgT9/4A4ss0hMR9P5W 5ifLXCHlfzrAICgj8QMu9zml3s6teblaqPsB3CT5GRP5vUj+RvQZeM7h1o0wBAFJ83jA yo2g== X-Gm-Message-State: APjAAAXbtGY5hxbXQVbLXYUAFoc/zPqY2F+AkwNM9vnqr/o0ApNTspVx OmNc16JsBQtLxcevqKsL6f5yFX6s1zM= X-Google-Smtp-Source: APXvYqxZlRYvB5OlqBUmfdFnmCVMqixBq/pjTIZEgq+x+O5IsGATa3zecZpTB3Fmly7voxqV9wdUgw== X-Received: by 2002:a05:600c:22d3:: with SMTP id 19mr6111153wmg.20.1581604949515; Thu, 13 Feb 2020 06:42:29 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 37/46] hw/arm/raspi: Extract the processor type from the board revision Date: Thu, 13 Feb 2020 14:41:36 +0000 Message-Id: <20200213144145.818-38-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::344 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 The board revision encode the processor type. Add a helper to extract the type, and use it. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20200208165645.15657-6-f4bug@amsat.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/arm/raspi.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index dcd8d2d6d38..7a2ca97347e 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -67,6 +67,21 @@ static int board_version(uint32_t board_rev) return board_processor_id(board_rev) + 1; } =20 +static const char *board_soc_type(uint32_t board_rev) +{ + static const char *soc_types[] =3D { + NULL, TYPE_BCM2836, TYPE_BCM2837, + }; + int proc_id =3D board_processor_id(board_rev); + + if (proc_id >=3D ARRAY_SIZE(soc_types) || !soc_types[proc_id]) { + error_report("Unsupported processor id '%d' (board revision: 0x%x)= ", + proc_id, board_rev); + exit(1); + } + return soc_types[proc_id]; +} + static void write_smpboot(ARMCPU *cpu, const struct arm_boot_info *info) { static const uint32_t smpboot[] =3D { @@ -213,8 +228,7 @@ static void raspi_init(MachineState *machine, uint32_t = board_rev) } =20 object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc= ), - version =3D=3D 3 ? TYPE_BCM2837 : TYPE_BCM2836, - &error_abort, NULL); + board_soc_type(board_rev), &error_abort, NULL); =20 /* Allocate and map RAM */ memory_region_allocate_system_memory(&s->ram, OBJECT(machine), "ram", --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 158160613148434.198023499751; Thu, 13 Feb 2020 07:02:11 -0800 (PST) Received: from localhost ([::1]:54144 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2G0G-0004lU-8a for importer@patchew.org; Thu, 13 Feb 2020 10:02:08 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60529) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2FhO-0004mG-0L for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:39 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2FhM-0002OE-SL for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:37 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]:52741) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2FhM-0002KN-Lo for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:36 -0500 Received: by mail-wm1-x32f.google.com with SMTP id p9so6543066wmc.2 for ; Thu, 13 Feb 2020 06:42:36 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.29 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=L9ug2rW4n/rgxEDf31AyiRb6p+9+e7Ktz52N1Gpec+M=; b=LBr6zKFHWtctf0rHkC0N0iZfUpdGE5w0QPqikDVMe8JW6S715sYvB2nVP3s6pWN3tt L7oq1RQvhoSsuCMxGT8wJ12AyGrfVr9nqheVEU79cf+bFnkzLR74JY7jYCHzkqh8DqZ8 RQkxOKraWV2c+sgXGDC6sOj7gWhuOvrk87wv570CVhGoWZxRSRCkFS7CgJ11gX/BBILl UszDWzaYnNMbzMMul6l7omNdB8DrYHwF3USWmELZZDbOoHkKqD0ZhyIppJS3TKaEasJz 9jDbqWjLtfuXFR4wyjKDni8C0OzWYHk2mRqfl3RpOajUnhL98AR+CKlXTQpYQ4dHNdEA jixA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=L9ug2rW4n/rgxEDf31AyiRb6p+9+e7Ktz52N1Gpec+M=; b=anqF2uNj4SdbtS1cJSWCiG8g4HYykYp50iHYjSztqvMYo53R0w4s6z1JMJ284ixE/c +x02vuN2gV0RvoJ2tHvahmvICpRSwUKpVV+1mdwCS3VHmv09D/PJNGUu+s1KtQaNJEWZ 71TAj2/+UQPjSbF3dTO71b7ktDA7TPsbdxKDNNu3tQgubSkkUIqWp+dY6sJRgQpc7Y6y sI8wk0OjAwD+gxqnbWEhBiqDxzYh2iXcP3RC6l9nEJiBfJ1GBBw6reSL/9tzZFKyPbDh i81WOKrUuMuf9oeDgbr4euWzHsRL1xwOCSq/kyG0+Zp3TLrgrqdITfTZK6Gpi4wL7YVq KfYw== X-Gm-Message-State: APjAAAWBqiRsZCIC8I90YScJrX4rDHylR4D3qH3bjeopruYwy3J7Edmj veplETmZNT520SnCAdtELAgY4WnyzkY= X-Google-Smtp-Source: APXvYqyz/SaWeSG+lRGMir00jkSkzHQ+csa+y41vF3v2+JhJsYOZO66xKD1mRfj2lkLFTykTkE5ZCw== X-Received: by 2002:a1c:670a:: with SMTP id b10mr6108958wmc.2.1581604950425; Thu, 13 Feb 2020 06:42:30 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 38/46] hw/arm/raspi: Trivial code movement Date: Thu, 13 Feb 2020 14:41:37 +0000 Message-Id: <20200213144145.818-39-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32f X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 There is no point in creating the SoC object before allocating the RAM. Move the call to keep all the SoC-related calls together. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Igor Mammedov Message-id: 20200208165645.15657-7-f4bug@amsat.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/arm/raspi.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index 7a2ca97347e..b3e6f72b55a 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -227,9 +227,6 @@ static void raspi_init(MachineState *machine, uint32_t = board_rev) exit(1); } =20 - object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc= ), - board_soc_type(board_rev), &error_abort, NULL); - /* Allocate and map RAM */ memory_region_allocate_system_memory(&s->ram, OBJECT(machine), "ram", machine->ram_size); @@ -237,6 +234,8 @@ static void raspi_init(MachineState *machine, uint32_t = board_rev) memory_region_add_subregion_overlap(get_system_memory(), 0, &s->ram, 0= ); =20 /* Setup the SOC */ + object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc= ), + board_soc_type(board_rev), &error_abort, NULL); object_property_add_const_link(OBJECT(&s->soc), "ram", OBJECT(&s->ram), &error_abort); object_property_set_int(OBJECT(&s->soc), board_rev, "board-rev", --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581607302952888.6367401287449; Thu, 13 Feb 2020 07:21:42 -0800 (PST) Received: from localhost ([::1]:54282 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2G6T-00044u-5w for importer@patchew.org; Thu, 13 Feb 2020 10:08:33 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60651) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2FhR-0004un-QB for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2FhN-0002Qm-Vi for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:39 -0500 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]:39883) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2FhN-0002Kf-Nm for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:37 -0500 Received: by mail-wm1-x332.google.com with SMTP id c84so7037006wme.4 for ; Thu, 13 Feb 2020 06:42:37 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.30 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=CaRzl7ZaIw/QJE2nH8zomPZAGDGMc4RBqRpezvr0Ta4=; b=HEwmqp4rkQ7RPazRYgzciwLU8ZZyEf5gSKODunIguhvhc44Hb7uAHOrO8hi4Qbvo/+ Beet30RVCQpy2+/lHwMVfiUAuwwa17+3aK78zie0zs5JJXgPJdJvWRrcsyrCUXvnBxk4 5PtW92cDGL1HbFwoSv9aq2CxogfzRtCDQX44iGfzkQxA7vr8RGtIL5CHK/l0LWA525I1 fzMgVnCFBEOoA8Kmg0hwzcChiQP8aYpEUnWoHspxLPmikNN8GUdYXdWaDrNpWTJFkGXx lBgJv7JrBW0vHu8wUPMmf0/pai4YjcA7WLjlb7VGjyBcdFIpdrk/9n2r0IJSO433ZYkh kVzA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=CaRzl7ZaIw/QJE2nH8zomPZAGDGMc4RBqRpezvr0Ta4=; b=QxWhOTppaM1FDBjKln3vqZ+WvoMipxXHYFEUFUewt45B6cOZNdiWfPocu9YCBuRZrx MH7d2S0NUCYNPZ1FX50KjMy79j/tbbdXT0HBywcvwZSLsUB9KuP+ZVlJZ4eW2lFX7RIG p3+JCLHsRmQ+fA33nkK/pbfAfAuW4JS8V87JVhpVdDbM82ogs9iKklz06T9VfNAjAPIo biS05zcA7WyHhf6gzJs9jeIQZE+B1jlRTdyuN1HTIzsdYeyteR42URl59w5N7azNL4ru g/WoN++vtvi4tv6jyw1uAaKqmsN3dlFmhSKJXcmb8k83hz3XsDnaSvByeLN5kCRc0oYl PFUQ== X-Gm-Message-State: APjAAAXMUOcbQdaJgrGEf+lkqzo4xo3rBC7fBy4d3q29Yk+fppJiDcY4 9J8CxUHzIjvRSZSqcjpNOAfvy0ksNuQ= X-Google-Smtp-Source: APXvYqw2xhSpGfpRHiabBfDDIcam74TSK+CWTLw+trvuwMPH9yFvIvemjTTzWIxAhkZ2xXAVvnTqpA== X-Received: by 2002:a1c:6645:: with SMTP id a66mr6536962wmc.121.1581604951434; Thu, 13 Feb 2020 06:42:31 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 39/46] hw/arm/raspi: Make machines children of abstract RaspiMachineClass Date: Thu, 13 Feb 2020 14:41:38 +0000 Message-Id: <20200213144145.818-40-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::332 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 QOM'ify RaspiMachineState. Now machines inherit of RaspiMachineClass. Cc: Igor Mammedov Signed-off-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Igor Mammedov Message-id: 20200208165645.15657-8-f4bug@amsat.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/arm/raspi.c | 56 +++++++++++++++++++++++++++++++++++++++++++------- 1 file changed, 49 insertions(+), 7 deletions(-) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index b3e6f72b55a..62b8df3c2e7 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -34,10 +34,28 @@ /* Registered machine type (matches RPi Foundation bootloader and U-Boot) = */ #define MACH_TYPE_BCM2708 3138 =20 -typedef struct RasPiState { +typedef struct RaspiMachineState { + /*< private >*/ + MachineState parent_obj; + /*< public >*/ BCM283XState soc; MemoryRegion ram; -} RasPiState; +} RaspiMachineState; + +typedef struct RaspiMachineClass { + /*< private >*/ + MachineClass parent_obj; + /*< public >*/ +} RaspiMachineClass; + +#define TYPE_RASPI_MACHINE MACHINE_TYPE_NAME("raspi-common") +#define RASPI_MACHINE(obj) \ + OBJECT_CHECK(RaspiMachineState, (obj), TYPE_RASPI_MACHINE) + +#define RASPI_MACHINE_CLASS(klass) \ + OBJECT_CLASS_CHECK(RaspiMachineClass, (klass), TYPE_RASPI_MACHINE) +#define RASPI_MACHINE_GET_CLASS(obj) \ + OBJECT_GET_CLASS(RaspiMachineClass, (obj), TYPE_RASPI_MACHINE) =20 /* * Board revision codes: @@ -211,7 +229,7 @@ static void setup_boot(MachineState *machine, int versi= on, size_t ram_size) =20 static void raspi_init(MachineState *machine, uint32_t board_rev) { - RasPiState *s =3D g_new0(RasPiState, 1); + RaspiMachineState *s =3D RASPI_MACHINE(machine); int version =3D board_version(board_rev); uint64_t ram_size =3D board_ram_size(board_rev); uint32_t vcram_size; @@ -264,8 +282,10 @@ static void raspi2_init(MachineState *machine) raspi_init(machine, 0xa21041); } =20 -static void raspi2_machine_init(MachineClass *mc) +static void raspi2_machine_class_init(ObjectClass *oc, void *data) { + MachineClass *mc =3D MACHINE_CLASS(oc); + mc->desc =3D "Raspberry Pi 2B"; mc->init =3D raspi2_init; mc->block_default_type =3D IF_SD; @@ -278,7 +298,6 @@ static void raspi2_machine_init(MachineClass *mc) mc->default_ram_size =3D 1 * GiB; mc->ignore_memory_transaction_failures =3D true; }; -DEFINE_MACHINE("raspi2", raspi2_machine_init) =20 #ifdef TARGET_AARCH64 static void raspi3_init(MachineState *machine) @@ -286,8 +305,10 @@ static void raspi3_init(MachineState *machine) raspi_init(machine, 0xa02082); } =20 -static void raspi3_machine_init(MachineClass *mc) +static void raspi3_machine_class_init(ObjectClass *oc, void *data) { + MachineClass *mc =3D MACHINE_CLASS(oc); + mc->desc =3D "Raspberry Pi 3B"; mc->init =3D raspi3_init; mc->block_default_type =3D IF_SD; @@ -299,5 +320,26 @@ static void raspi3_machine_init(MachineClass *mc) mc->default_cpus =3D BCM283X_NCPUS; mc->default_ram_size =3D 1 * GiB; } -DEFINE_MACHINE("raspi3", raspi3_machine_init) #endif + +static const TypeInfo raspi_machine_types[] =3D { + { + .name =3D MACHINE_TYPE_NAME("raspi2"), + .parent =3D TYPE_RASPI_MACHINE, + .class_init =3D raspi2_machine_class_init, +#ifdef TARGET_AARCH64 + }, { + .name =3D MACHINE_TYPE_NAME("raspi3"), + .parent =3D TYPE_RASPI_MACHINE, + .class_init =3D raspi3_machine_class_init, +#endif + }, { + .name =3D TYPE_RASPI_MACHINE, + .parent =3D TYPE_MACHINE, + .instance_size =3D sizeof(RaspiMachineState), + .class_size =3D sizeof(RaspiMachineClass), + .abstract =3D true, + } +}; + +DEFINE_TYPES(raspi_machine_types) --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.31 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=UA8JO5a7csYlOT0FpOll3VhjQ+P4Rnh4Fm3iNx+U6Js=; b=SwbREz+7s60pP+S44IV7mT0OtICjhRjglpby+mYEsg0Yym+ElBFRqsQeAt1X0ihZVW 55v4fGSMDRE4UUHAVuPF9+ds3ehdLD7YqEj4lpVnEBLQUsyK45i4CzFmabBI3RHckyET npcdT1V0ie5KxKwQf18hnP1+sM3kgg3voBt1ol8fP9BQiA8XNXAe3/RNt5jEZJ42bHqF xssUhQBOoZpu0+s/Tb2FmLlTNVdU+YNYYYFWnqTWZmHi4RRAewlaLnFe49w5xdRMoJnJ 9VBgbGXTw3ms4cNLZxWGpNC4PAhHIBX+Io4w+GuHK82keBLoiquY5O8CMj7IRVbV6/Zy ZZNw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UA8JO5a7csYlOT0FpOll3VhjQ+P4Rnh4Fm3iNx+U6Js=; b=aPexbUEAGrC3fK8tTCVFfRxyDdtq4hTKgifPD/fxmkuu96NDAXhNJzv9sj7wcxkUYM FxQucuVZRGsUNdrVVIsHDDdY3QIbsYZvT3497E3jn/xwXTfvmy72PUQg0EWbie2g9ENy pa/Xf65OgNqQ2/JqDQ2hJM2h9u/Cpi5BqDV0wh7t7Q4bXpN7uiYOcmJzTkcKng7yyRlG 9ea0gEPwJEmhTk38laQyptstVv4NZW8YcPqRfcRwogva3oeqIenJbyBCQcfNn/uCsRiu RYDtGUkFSjByvJH2qMPMZx9Gdfa7PeW2j6MuaxAq8K3VSE17cATaMvkfRBKOqNaLV5DT VXqQ== X-Gm-Message-State: APjAAAVZH7JCfIVAM7w6pXQR/z0IQEhziPhpcuAKhVFShVTOsji1uJ/n uYw3g5WMolDB1rg1kKgNR5ns3GnL8lQ= X-Google-Smtp-Source: APXvYqyvpDwisoXO0nByDuL7QJ3PNteQwFWDkoVoQg/8lwDI8/csSV9rWbkTiFLIhs4tqaHMCo2C7g== X-Received: by 2002:a05:600c:211:: with SMTP id 17mr6142604wmi.60.1581604952483; Thu, 13 Feb 2020 06:42:32 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 40/46] hw/arm/raspi: Make board_rev a field of RaspiMachineClass Date: Thu, 13 Feb 2020 14:41:39 +0000 Message-Id: <20200213144145.818-41-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::342 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 We want to have a common class_init(). The only value that matters (and changes) is the board revision. Pass the board_rev as class_data to class_init(). Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20200208165645.15657-9-f4bug@amsat.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/arm/raspi.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index 62b8df3c2e7..fbfcd297326 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -46,6 +46,7 @@ typedef struct RaspiMachineClass { /*< private >*/ MachineClass parent_obj; /*< public >*/ + uint32_t board_rev; } RaspiMachineClass; =20 #define TYPE_RASPI_MACHINE MACHINE_TYPE_NAME("raspi-common") @@ -227,9 +228,11 @@ static void setup_boot(MachineState *machine, int vers= ion, size_t ram_size) arm_load_kernel(ARM_CPU(first_cpu), machine, &binfo); } =20 -static void raspi_init(MachineState *machine, uint32_t board_rev) +static void raspi_init(MachineState *machine) { + RaspiMachineClass *mc =3D RASPI_MACHINE_GET_CLASS(machine); RaspiMachineState *s =3D RASPI_MACHINE(machine); + uint32_t board_rev =3D mc->board_rev; int version =3D board_version(board_rev); uint64_t ram_size =3D board_ram_size(board_rev); uint32_t vcram_size; @@ -279,13 +282,16 @@ static void raspi_init(MachineState *machine, uint32_= t board_rev) =20 static void raspi2_init(MachineState *machine) { - raspi_init(machine, 0xa21041); + raspi_init(machine); } =20 static void raspi2_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); + RaspiMachineClass *rmc =3D RASPI_MACHINE_CLASS(oc); + uint32_t board_rev =3D (uint32_t)(uintptr_t)data; =20 + rmc->board_rev =3D board_rev; mc->desc =3D "Raspberry Pi 2B"; mc->init =3D raspi2_init; mc->block_default_type =3D IF_SD; @@ -302,13 +308,16 @@ static void raspi2_machine_class_init(ObjectClass *oc= , void *data) #ifdef TARGET_AARCH64 static void raspi3_init(MachineState *machine) { - raspi_init(machine, 0xa02082); + raspi_init(machine); } =20 static void raspi3_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); + RaspiMachineClass *rmc =3D RASPI_MACHINE_CLASS(oc); + uint32_t board_rev =3D (uint32_t)(uintptr_t)data; =20 + rmc->board_rev =3D board_rev; mc->desc =3D "Raspberry Pi 3B"; mc->init =3D raspi3_init; mc->block_default_type =3D IF_SD; @@ -327,11 +336,13 @@ static const TypeInfo raspi_machine_types[] =3D { .name =3D MACHINE_TYPE_NAME("raspi2"), .parent =3D TYPE_RASPI_MACHINE, .class_init =3D raspi2_machine_class_init, + .class_data =3D (void *)0xa21041, #ifdef TARGET_AARCH64 }, { .name =3D MACHINE_TYPE_NAME("raspi3"), .parent =3D TYPE_RASPI_MACHINE, .class_init =3D raspi3_machine_class_init, + .class_data =3D (void *)0xa02082, #endif }, { .name =3D TYPE_RASPI_MACHINE, --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581607316029360.9313788801501; Thu, 13 Feb 2020 07:21:56 -0800 (PST) Received: from localhost ([::1]:54514 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2GFW-0008To-2s for importer@patchew.org; Thu, 13 Feb 2020 10:17:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60609) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2FhP-0004qy-Ke for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:41 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2FhO-0002Qx-0j for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:39 -0500 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]:52747) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2FhN-0002M7-OM for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:37 -0500 Received: by mail-wm1-x335.google.com with SMTP id p9so6543264wmc.2 for ; Thu, 13 Feb 2020 06:42:37 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.32 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=uzVG4rPZtI9QEgU8YI9WvM2Scl3ZA8+l5Ifz+hNMkdM=; b=Mw+QBuyDSWMLGHyUZGFJWyXB0b1/fz4xhmQJIKU2a+q3avfb2rF3voCPHkGkF7qJiY tniBTLu8OG5bMrT7qrsEF9d1fDUJbSrtN6TUtiLpse5WqLaZ6EBkMP6F4JONTJgTtyRl iBsOEkYXffm7VmJeqC0GBB9OW8r3jLYdWSZm2L4eMgldzw0fGzZwqLixwvLWV2/GjdD1 P7sbivq6L48iHVIPziHNvkwA5AX213O33oVdOBB6eaqDFB0/ooZgTLv5TYIUBUKjcYZu 4ZRWhHHt0OgNYk6i+S7/01iujJsVl72XgyNcLWFNVihnPmYtN/jLxBwpUGD0I5PwuhpM C28A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=uzVG4rPZtI9QEgU8YI9WvM2Scl3ZA8+l5Ifz+hNMkdM=; b=gzJtKR10VK63g1zHN/ERmHpd6P7mf+rNfQhWBiY9tnIKVDvuKnk0lHuaJ2b9mg9suu jzDcWsNUx/87baaE8jUjHW0yJ/fR4lKrFCP7wI6YHmYeIYDHVrFBaolfB7LJoNzowO/d ronKe0lcRwEvn9AbI/htOSdPJtAqjm916zn4zQD7HYxv9Nc9LBuvRAAOubS592+t9ALo X+ezXwNqIMPaw8U4UZIMRFs3Tm4ZclCuD2a98B9qkh8hiJS4/ogPq5lfX67GocdN0z1m ZDg/sHDDeHLQLBLbb6tBj9hZbOIqhIldD0t0ugPydUwafHnXFCQmFQrrlOSSP7WrIzq3 rAFw== X-Gm-Message-State: APjAAAWJ6z5pJ+O3mJlR+k+//se/iuCF+Pl3GxZzdQ6PL4ULbd0TwV3k l+A8Elkilor4kdQMCB1rSNXTuyEJ1Z4= X-Google-Smtp-Source: APXvYqxgqLZkAGbM27b9E+u2gvPYWMVxCiL0lgbjWwAgz8PxFqRZ/xF6Jxn5CFpfuzX6RAJrPmTK4Q== X-Received: by 2002:a1c:7c11:: with SMTP id x17mr6624815wmc.168.1581604953549; Thu, 13 Feb 2020 06:42:33 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 41/46] hw/arm/raspi: Let class_init() directly call raspi_machine_init() Date: Thu, 13 Feb 2020 14:41:40 +0000 Message-Id: <20200213144145.818-42-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::335 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 raspi_machine_init() access to board_rev via RaspiMachineClass. raspi2_init() and raspi3_init() do nothing. Call raspi_machine_init directly. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Igor Mammedov Message-id: 20200208165645.15657-10-f4bug@amsat.org Signed-off-by: Peter Maydell --- hw/arm/raspi.c | 16 +++------------- 1 file changed, 3 insertions(+), 13 deletions(-) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index fbfcd297326..1628b0dda7c 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -228,7 +228,7 @@ static void setup_boot(MachineState *machine, int versi= on, size_t ram_size) arm_load_kernel(ARM_CPU(first_cpu), machine, &binfo); } =20 -static void raspi_init(MachineState *machine) +static void raspi_machine_init(MachineState *machine) { RaspiMachineClass *mc =3D RASPI_MACHINE_GET_CLASS(machine); RaspiMachineState *s =3D RASPI_MACHINE(machine); @@ -280,11 +280,6 @@ static void raspi_init(MachineState *machine) setup_boot(machine, version, machine->ram_size - vcram_size); } =20 -static void raspi2_init(MachineState *machine) -{ - raspi_init(machine); -} - static void raspi2_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); @@ -293,7 +288,7 @@ static void raspi2_machine_class_init(ObjectClass *oc, = void *data) =20 rmc->board_rev =3D board_rev; mc->desc =3D "Raspberry Pi 2B"; - mc->init =3D raspi2_init; + mc->init =3D raspi_machine_init; mc->block_default_type =3D IF_SD; mc->no_parallel =3D 1; mc->no_floppy =3D 1; @@ -306,11 +301,6 @@ static void raspi2_machine_class_init(ObjectClass *oc,= void *data) }; =20 #ifdef TARGET_AARCH64 -static void raspi3_init(MachineState *machine) -{ - raspi_init(machine); -} - static void raspi3_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); @@ -319,7 +309,7 @@ static void raspi3_machine_class_init(ObjectClass *oc, = void *data) =20 rmc->board_rev =3D board_rev; mc->desc =3D "Raspberry Pi 3B"; - mc->init =3D raspi3_init; + mc->init =3D raspi_machine_init; mc->block_default_type =3D IF_SD; mc->no_parallel =3D 1; mc->no_floppy =3D 1; --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581607289910766.7019414708996; Thu, 13 Feb 2020 07:21:29 -0800 (PST) Received: from localhost ([::1]:54488 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2GEQ-0006pv-9b for importer@patchew.org; Thu, 13 Feb 2020 10:16:46 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60602) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2FhP-0004qW-FZ for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:40 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2FhN-0002Qc-VS for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:39 -0500 Received: from mail-wr1-x434.google.com ([2a00:1450:4864:20::434]:35585) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2FhN-0002MR-Ms for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:37 -0500 Received: by mail-wr1-x434.google.com with SMTP id w12so6998098wrt.2 for ; Thu, 13 Feb 2020 06:42:37 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.33 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=E0vrTAwIv6ImSaBw0xYQfg0MNy/68XI1n9XoOMzTabQ=; b=leOF+Zv+h/f/cgJwoXkO7fyLLgpd1G/AvHaIOQTmeB+QRKIpp97l9rqpS/NeHABKZK 9xjLKlprdsWUtNtLgjMh4r3ZdSxVbdEN0y/dTt8JlupyhRk3aG/ZlwP+kgvfbzdQWKmW HHq02wsS51AYwotUO6XTntiogGEkeprma1EDpqswHOu90T1XiVikGM4ZZLDLncrYN0RP 5YBTSfSxQwDgrfupYPVCMY3G/NJAZUfNlOw6dat5Dm6gPVlP9r5PrJN0BviydZQIhDTN anHX6YT8tYTCteyGg69uWCbhKawMhM7UV5O+jCKEa6Q/8J0pcfbyW4H8aaqQSxBos2Cw OGmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=E0vrTAwIv6ImSaBw0xYQfg0MNy/68XI1n9XoOMzTabQ=; b=aXY43MpKXqnKhBrmj/LaixrHPPJzQbjmRhEhTVpQI4iIgCJ9j2zqIj3OdWtRd5F4hM eMNXTnje1KHD4wDLhsI9Wkc/o5DCSffcXiRtbGPXwf62XqmCQHCO3omrmhjd9EpH3uTl Zk+madHPyp2RxQZUsBkBt5mFUDWUAByVgcYD9NZiGeyf1suDiW6Gk9zvqz2snjm5x3mL HReenvVZxv/rtA49fHvfmllv1GSNLSJhU27glf6pp76T3488ASGzNTMjWSisUJAuMHnj wXATQ3DJNCSP2T/CI9QVOE3D/zI3JrmGshxCm5HFyCNujN43ojjS3mRhhQlg/RvKpY3O TtRA== X-Gm-Message-State: APjAAAVh+tnezk2T34KwX05reSYi/jgDGqr1n36XSJWM1+Lcr5ozvXXv YxocCzllVm/9BIUWo7uyzXoYIiVAnlY= X-Google-Smtp-Source: APXvYqyjLk7uyddIrHUkMkjSjAPyo2NP2H2fzqZM9LT+ryBrDoMflJcGpW9m+zSisPDgbIz7mQia6A== X-Received: by 2002:a5d:4d4a:: with SMTP id a10mr23351406wru.220.1581604954486; Thu, 13 Feb 2020 06:42:34 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 42/46] hw/arm/raspi: Set default RAM size to size encoded in board revision Date: Thu, 13 Feb 2020 14:41:41 +0000 Message-Id: <20200213144145.818-43-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::434 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 We added a helper to extract the RAM size from the board revision, and made board_rev a field of RaspiMachineClass. The class_init() can now use the helper to extract from the board revision the board-specific amount of RAM. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20200208165645.15657-11-f4bug@amsat.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/arm/raspi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index 1628b0dda7c..f0dcffbc2ef 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -296,7 +296,7 @@ static void raspi2_machine_class_init(ObjectClass *oc, = void *data) mc->max_cpus =3D BCM283X_NCPUS; mc->min_cpus =3D BCM283X_NCPUS; mc->default_cpus =3D BCM283X_NCPUS; - mc->default_ram_size =3D 1 * GiB; + mc->default_ram_size =3D board_ram_size(board_rev); mc->ignore_memory_transaction_failures =3D true; }; =20 @@ -317,7 +317,7 @@ static void raspi3_machine_class_init(ObjectClass *oc, = void *data) mc->max_cpus =3D BCM283X_NCPUS; mc->min_cpus =3D BCM283X_NCPUS; mc->default_cpus =3D BCM283X_NCPUS; - mc->default_ram_size =3D 1 * GiB; + mc->default_ram_size =3D board_ram_size(board_rev); } #endif =20 --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581607197598665.4493428571158; Thu, 13 Feb 2020 07:19:57 -0800 (PST) Received: from localhost ([::1]:54550 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2GHU-00032K-DA for importer@patchew.org; Thu, 13 Feb 2020 10:19:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60603) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2FhP-0004qb-Gr for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:41 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2FhN-0002QS-Tu for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:39 -0500 Received: from mail-wm1-x343.google.com ([2a00:1450:4864:20::343]:53668) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2FhN-0002NB-LR for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:37 -0500 Received: by mail-wm1-x343.google.com with SMTP id s10so6542783wmh.3 for ; Thu, 13 Feb 2020 06:42:37 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.34 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=H2gaLGMf5euvRIXxKTQ5zYLvx8BCFxjRX5PrMkWbQvc=; b=SoKsJ7ZJIlfsqCATGm3t1EyJ43/X+p7ji9LtUAQ6vmoETh2SBKYtjlK5U6Ij7ZAYfx pwLwnQOOb381oZjYW6zGU3B/cTRNJc+MWwKhqoKgbiOOd53LB8BoBwoe8A+9hpBgaUBi 0rzQE8mVni2rWBgCfkt2jUD6m76sK+ANDuxyhGMT+lUCFjS17kUS4B1ChSjkuPNnqmpZ P8SVL7LzSLTCamZUlqFv1k20dGYQSiae1+ySEsNOwORur9O6m6E06HmVV3eQaK1oIFcF D7Yl3/3sW68UYhdgx9te8rkyY/oUN/I4WW8WVIW/YyoqGRDXlRxQxqN4Ji9JrbQDB7Rb YfxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=H2gaLGMf5euvRIXxKTQ5zYLvx8BCFxjRX5PrMkWbQvc=; b=G3q2KJn2DOPvgcqb+W5rQ6bflmOiUj/Zn9VYQmFdIylzLo7Q50gKQUdE7vqQz+Pi4d CNE1m7RV2Ewpdbb2Rl1bJKjFU9+oYyYDyCBzKLHGNWm5A1LulvEwU+Qs8SFLpaEvIa0X Y9tFo7Y/2Qg3gXD/9QFtOBXULtPT8QtU223wUEHqFO7E4CYOeSmt/egSH6ZV6415HTb6 kHSysZXsvbPl8sh49fo5b1TlVavH7/wIUkcWc8VgX5MvuZqdSRvMoXTJ8oNxjck7L77N qRkvT9Jkmex7vqZZzHmKGaPdsyzdW/zoJmmBNGbv+UK5QCETG/QTCax68zqZ/JsB6VGZ V1/w== X-Gm-Message-State: APjAAAVYP9X4ev4sIf0ThwC+0KDcWxDUMHBBCVE53evAtLHhP7FwTino s9cHIGvPgR9D3rxrWyatCBDmgOo87IE= X-Google-Smtp-Source: APXvYqxdU9Yy5oLbvgcfJyMFVcOMslSR9ciafr2LYAwtdBtL0DCCOOwW2SLigVx2odbGFGzO4W1tTw== X-Received: by 2002:a1c:2786:: with SMTP id n128mr6010122wmn.47.1581604955432; Thu, 13 Feb 2020 06:42:35 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 43/46] hw/arm/raspi: Extract the board model from the board revision Date: Thu, 13 Feb 2020 14:41:42 +0000 Message-Id: <20200213144145.818-44-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::343 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 The board revision encode the model type. Add a helper to extract the model, and use it. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20200208165645.15657-12-f4bug@amsat.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/arm/raspi.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index f0dcffbc2ef..0537fc0a2d1 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -101,6 +101,20 @@ static const char *board_soc_type(uint32_t board_rev) return soc_types[proc_id]; } =20 +static const char *board_type(uint32_t board_rev) +{ + static const char *types[] =3D { + "A", "B", "A+", "B+", "2B", "Alpha", "CM1", NULL, "3B", "Zero", + "CM3", NULL, "Zero W", "3B+", "3A+", NULL, "CM3+", "4B", + }; + assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */ + int bt =3D FIELD_EX32(board_rev, REV_CODE, TYPE); + if (bt >=3D ARRAY_SIZE(types) || !types[bt]) { + return "Unknown"; + } + return types[bt]; +} + static void write_smpboot(ARMCPU *cpu, const struct arm_boot_info *info) { static const uint32_t smpboot[] =3D { @@ -287,7 +301,7 @@ static void raspi2_machine_class_init(ObjectClass *oc, = void *data) uint32_t board_rev =3D (uint32_t)(uintptr_t)data; =20 rmc->board_rev =3D board_rev; - mc->desc =3D "Raspberry Pi 2B"; + mc->desc =3D g_strdup_printf("Raspberry Pi %s", board_type(board_rev)); mc->init =3D raspi_machine_init; mc->block_default_type =3D IF_SD; mc->no_parallel =3D 1; @@ -308,7 +322,7 @@ static void raspi3_machine_class_init(ObjectClass *oc, = void *data) uint32_t board_rev =3D (uint32_t)(uintptr_t)data; =20 rmc->board_rev =3D board_rev; - mc->desc =3D "Raspberry Pi 3B"; + mc->desc =3D g_strdup_printf("Raspberry Pi %s", board_type(board_rev)); mc->init =3D raspi_machine_init; mc->block_default_type =3D IF_SD; mc->no_parallel =3D 1; --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581607131853965.8741336857092; Thu, 13 Feb 2020 07:18:51 -0800 (PST) Received: from localhost ([::1]:54520 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2GGP-0001Rq-Fz for importer@patchew.org; Thu, 13 Feb 2020 10:18:49 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60594) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2FhP-0004pt-8W for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:41 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2FhN-0002Q9-OA for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:39 -0500 Received: from mail-wr1-x444.google.com ([2a00:1450:4864:20::444]:46655) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2FhN-0002OW-GZ for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:37 -0500 Received: by mail-wr1-x444.google.com with SMTP id z7so6962250wrl.13 for ; Thu, 13 Feb 2020 06:42:37 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.35 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=LcvOsRN9irC06rZFCwrPFiUgmlJPc+Ym4MUDwz07cFg=; b=PZN9DEChKF9Djha+F6I6Dr7Sp4hdEyPGzAc0OGIOOywqQv8r0kp6yfHvF8oFwVE7G7 LB8Vf8RSvBBLtG5ib/TdeOJ0lvvTw/YdGccUhv3VFTKi4KQyumryK+WaQWceRK0J+Dy6 AumLcD/y/uxxPJGrFJrExIqjXDIs9gmhZY2xf0E52QRztNWmrfe4kKmHKJjAaw5+SHQp zwBtNXmohrFmzcPungfMJv/MFB8cA7snsFVLvtOF5cinhAiVprAJFv1LG7kwtPQ5RlOg +rVesvtIZmw+bDSKtQOo21XspQQFXWDJumxjPIr8kM4Pv19zg9Tih1Wy39PD6kB3TjUc twPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LcvOsRN9irC06rZFCwrPFiUgmlJPc+Ym4MUDwz07cFg=; b=lIRC8aXHj7ce8qx36o+1rBjgvOW8W6rj7MZkW/GZ1a6T0cbmyX0M6/ikEk8os//vvK a3Q5xqIW+9CUhEcwCTNgqiJhJi0OJFgadcW1SG2kp4e/nzSm/DO5+dp0wq2LZ6nPkuKW YHnX6OUIzeaKkusWmryI1RWrj8c4wFOMgyGVBiTCvWa9/2FUvsgbm6I+2zx2B/E/zFdl 2CBagjRtxtd4wK3UE+c4Qkfcc43jvtHEqtgmqSzMaQnxWtABjUyDOtMCQvkfBHuI5Ky/ 8UVgLhldIXUz6NBhX4t+wswHanWwAS8+5Pfty31UAKDcbZ3rFpEwLl6o/W53Rg+Z+lhe 7RTw== X-Gm-Message-State: APjAAAU2wk0NpqPEpLf75SH4FZjjdZ2x2fYAT50FWpb2k3RYovBvdG89 oth46hpJk6G4x0HaVIBMvAEPD5Bmkx0= X-Google-Smtp-Source: APXvYqwvbx+L6yGiaJ/KaxUe2hQ4NrvQDJlUNR/AFoT+dyFuyi53c62p7ML30D8yGtJrs5d8MAIjvQ== X-Received: by 2002:adf:e610:: with SMTP id p16mr23568814wrm.81.1581604956349; Thu, 13 Feb 2020 06:42:36 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 44/46] hw/arm/raspi: Use a unique raspi_machine_class_init() method Date: Thu, 13 Feb 2020 14:41:43 +0000 Message-Id: <20200213144145.818-45-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 With the exception of the ignore_memory_transaction_failures flag set for the raspi2, both machine_class_init() methods are now identical. Merge them to keep a unique method. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Igor Mammedov Message-id: 20200208165645.15657-13-f4bug@amsat.org Signed-off-by: Peter Maydell --- hw/arm/raspi.c | 31 ++++++------------------------- 1 file changed, 6 insertions(+), 25 deletions(-) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index 0537fc0a2d1..bee6ca0a086 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -294,7 +294,7 @@ static void raspi_machine_init(MachineState *machine) setup_boot(machine, version, machine->ram_size - vcram_size); } =20 -static void raspi2_machine_class_init(ObjectClass *oc, void *data) +static void raspi_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); RaspiMachineClass *rmc =3D RASPI_MACHINE_CLASS(oc); @@ -311,41 +311,22 @@ static void raspi2_machine_class_init(ObjectClass *oc= , void *data) mc->min_cpus =3D BCM283X_NCPUS; mc->default_cpus =3D BCM283X_NCPUS; mc->default_ram_size =3D board_ram_size(board_rev); - mc->ignore_memory_transaction_failures =3D true; + if (board_version(board_rev) =3D=3D 2) { + mc->ignore_memory_transaction_failures =3D true; + } }; =20 -#ifdef TARGET_AARCH64 -static void raspi3_machine_class_init(ObjectClass *oc, void *data) -{ - MachineClass *mc =3D MACHINE_CLASS(oc); - RaspiMachineClass *rmc =3D RASPI_MACHINE_CLASS(oc); - uint32_t board_rev =3D (uint32_t)(uintptr_t)data; - - rmc->board_rev =3D board_rev; - mc->desc =3D g_strdup_printf("Raspberry Pi %s", board_type(board_rev)); - mc->init =3D raspi_machine_init; - mc->block_default_type =3D IF_SD; - mc->no_parallel =3D 1; - mc->no_floppy =3D 1; - mc->no_cdrom =3D 1; - mc->max_cpus =3D BCM283X_NCPUS; - mc->min_cpus =3D BCM283X_NCPUS; - mc->default_cpus =3D BCM283X_NCPUS; - mc->default_ram_size =3D board_ram_size(board_rev); -} -#endif - static const TypeInfo raspi_machine_types[] =3D { { .name =3D MACHINE_TYPE_NAME("raspi2"), .parent =3D TYPE_RASPI_MACHINE, - .class_init =3D raspi2_machine_class_init, + .class_init =3D raspi_machine_class_init, .class_data =3D (void *)0xa21041, #ifdef TARGET_AARCH64 }, { .name =3D MACHINE_TYPE_NAME("raspi3"), .parent =3D TYPE_RASPI_MACHINE, - .class_init =3D raspi3_machine_class_init, + .class_init =3D raspi_machine_class_init, .class_data =3D (void *)0xa02082, #endif }, { --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 158160732996791.8650292441755; Thu, 13 Feb 2020 07:22:09 -0800 (PST) Received: from localhost ([::1]:54206 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2G3F-0008FI-De for importer@patchew.org; Thu, 13 Feb 2020 10:05:13 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60635) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2FhR-0004sb-3S for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2FhO-0002Sp-PL for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:41 -0500 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]:43812) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2FhO-0002QL-HT for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:38 -0500 Received: by mail-wr1-x42c.google.com with SMTP id r11so6957757wrq.10 for ; Thu, 13 Feb 2020 06:42:38 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.36 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=AvLTlb1mlCxI535cEDG/qFrA3d9eb3oYnfPvbffg3nY=; b=In7ULMKFYM6W+fAZDWHUXhFFQX3fUqIE+x4JD0LBBlz/c5hfklc8fZoW/RMYAz7pRw 7LQx4XkxWU2mdhmY7IWMA7+GVtc/aC9zssffheEjPSYVLe8wLQ20mG2g/zPNncjoqCFV yXomRN8W75nMzH3jeVppuHOaTMeGXtjtDx8Xdp+Xnwr/rw6/xmXrkHKXXkAsqtI/2SDQ LwB+Xc+GDlLUBqfY8q9yHo3iWoC81TK1ASxrdgqm+NuS7YTN/UHsSLohAVbtOVQs+u3X OIZAb8hx+71gO6pFDOTMUKljRhtc3tQeu/zreT3juDIHdMg7WhQEu0LT5K5ykOp+wn7N BOIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=AvLTlb1mlCxI535cEDG/qFrA3d9eb3oYnfPvbffg3nY=; b=hvRc9xIDWfRohDoGLwq6XCOunALZBUhAm+Y4daLtEz8z5zNrc05JjuGsLXLie9+xV4 nA2iQYaYbRx/urNSBw8DmX2D3i21bsnlDWBlyxbJfty3YQ2JUENsinVTkQnZAbba4XHv Ozf7DqnLwfbNzp+pFIhmfDmdE8/81UNazQUqHDbmRVGW7pVLYQ8YBq3wba3nL4d26kK1 bdRZMyYRi/OLMiLYiDI7keqtbRd0vnKlmj65vRKu0rmZ1Y69Muaj6i4bFfbp7/uSmmAm DztXbHw7rZcjd2z0KEuKZHtCVsn+G4Lhvzn7kiQ9Xa8SbuZ6+uv/a4P/yTJSe+37DUjh RaJQ== X-Gm-Message-State: APjAAAWFLAHX1wHVSjiObz3VXovy6H67suJfiS5BDBT8ev/iysx8ZEQk 2fcWzBDmb72wNiTgV1TzgrLrIT8VcN0= X-Google-Smtp-Source: APXvYqxvTIpM+SD++B9S7nCoILsrtyEuOvO0j4+g76vOwx1AEPQ+qDgUowun+rXhvM++1fY7Eh+3AQ== X-Received: by 2002:a5d:4984:: with SMTP id r4mr21288856wrq.137.1581604957251; Thu, 13 Feb 2020 06:42:37 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 45/46] hw/arm/raspi: Extract the cores count from the board revision Date: Thu, 13 Feb 2020 14:41:44 +0000 Message-Id: <20200213144145.818-46-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 The count of ARM cores is encoded in the board revision. Add a helper to extract the number of cores, and use it. This will be helpful when we add the Raspi0/1 that have a single core. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20200208165645.15657-14-f4bug@amsat.org Reviewed-by: Peter Maydell [PMM: tweaked commit message as suggested by Igor] Signed-off-by: Peter Maydell --- hw/arm/raspi.c | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index bee6ca0a086..90ad9b81158 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -101,6 +101,21 @@ static const char *board_soc_type(uint32_t board_rev) return soc_types[proc_id]; } =20 +static int cores_count(uint32_t board_rev) +{ + static const int soc_cores_count[] =3D { + 0, BCM283X_NCPUS, BCM283X_NCPUS, + }; + int proc_id =3D board_processor_id(board_rev); + + if (proc_id >=3D ARRAY_SIZE(soc_cores_count) || !soc_cores_count[proc_= id]) { + error_report("Unsupported processor id '%d' (board revision: 0x%x)= ", + proc_id, board_rev); + exit(1); + } + return soc_cores_count[proc_id]; +} + static const char *board_type(uint32_t board_rev) { static const char *types[] =3D { @@ -307,9 +322,7 @@ static void raspi_machine_class_init(ObjectClass *oc, v= oid *data) mc->no_parallel =3D 1; mc->no_floppy =3D 1; mc->no_cdrom =3D 1; - mc->max_cpus =3D BCM283X_NCPUS; - mc->min_cpus =3D BCM283X_NCPUS; - mc->default_cpus =3D BCM283X_NCPUS; + mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D cores_count(boa= rd_rev); mc->default_ram_size =3D board_ram_size(board_rev); if (board_version(board_rev) =3D=3D 2) { mc->ignore_memory_transaction_failures =3D true; --=20 2.20.1 From nobody Fri Apr 26 14:24:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581607267715904.5549628684238; Thu, 13 Feb 2020 07:21:07 -0800 (PST) Received: from localhost ([::1]:54320 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2G8B-0006wj-Bo for importer@patchew.org; Thu, 13 Feb 2020 10:10:19 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60657) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j2FhS-0004vf-2u for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j2FhQ-0002WM-Ve for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:41 -0500 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]:39386) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j2FhQ-0002TE-PD for qemu-devel@nongnu.org; Thu, 13 Feb 2020 09:42:40 -0500 Received: by mail-wr1-x430.google.com with SMTP id y11so6977917wrt.6 for ; Thu, 13 Feb 2020 06:42:39 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e22sm3362454wme.45.2020.02.13.06.42.37 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 06:42:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=iWwaon9BlRJ6IRsO5FFrvf144MipU5RYg6PS8QIH0hk=; b=Lk71exPORdaSvPe5/fddMtjBxmxb3W+KzuUS56nBM0FXoIIlu9U1Zu+TX3RXqyj1No C0x0HFCHTmRX6Xzpm+sRSlvR2yx780RNtjTOihzW623HBa0/ZG/BDCBwv4/jxWi+DkG3 n3AyLs1/NByCGcWxooHwolAXxG4t7g9rJuQjsCb4V6sEe049SBKXYDy/jFeAr2KaJb0s a+c+38zV0HcVy3wKVovmczXnaOaY01Q1X04ArE+SYFI4YMR6M0cA8s3GaLa8od/sG9eZ iqw7MaA+YrRtKtzX6ZHilZ/B4XKfvxK3/3gEZQ5Q7z/gKtLXBju3sg0IftQj90WhorhA LbnA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=iWwaon9BlRJ6IRsO5FFrvf144MipU5RYg6PS8QIH0hk=; b=o0cWp21Hna16xrHsx/ViSMhBLMMrL1/GdKfvjkGNKc+Diq1+WW0dKbGxHaRea+Y3mV HAy5sK/BsobnMQ3cfQiK8qn0vfwK1xezcAxMy89vOV2wVCwTXP7zoc3xgIJat3/EVNhQ XuvsZYM/P2gpYBSYgt+GAv7dCO3mDUeMF9icD7uJnIZ3KVt2izrvoPJ1EN93bDZ/ccNx rJpVNkiMoYcJ/YKrW/gj04ND4OfutEWwO1BO1a8JiUe4UNQwb6hUeXEmgTeYtlU0GXCY N1aVrhoICp3OL/F5WCOLWUnOf8mzFOFe/d/+jXCd1HZeXVfLgUFwi4wI+vrzm05q7qB4 PmtA== X-Gm-Message-State: APjAAAUa92JVYfFY1geTIgIIvR1ONBN1GHiK6q2ORRJAROgjVh8WnxT3 pDli93bc1gOP2B6kqntcn2pJggdSuME= X-Google-Smtp-Source: APXvYqzAv9BtiwHKUielbgPSN92VtlIJ3B88G/bPVGJAsEu3NBV9qbvogEUq2liVf+dfBjM9+Nso1A== X-Received: by 2002:a5d:6545:: with SMTP id z5mr21701309wrv.3.1581604958432; Thu, 13 Feb 2020 06:42:38 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 46/46] target/arm: Implement ARMv8.1-VMID16 extension Date: Thu, 13 Feb 2020 14:41:45 +0000 Message-Id: <20200213144145.818-47-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200213144145.818-1-peter.maydell@linaro.org> References: <20200213144145.818-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::430 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) The ARMv8.1-VMID16 extension extends the VMID from 8 bits to 16 bits: * the ID_AA64MMFR1_EL1.VMIDBits field specifies whether the VMID is 8 or 16 bits * the VMID field in VTTBR_EL2 is extended to 16 bits * VTCR_EL2.VS lets the guest specify whether to use the full 16 bits, or use the backwards-compatible 8 bits For QEMU implementing this is trivial: * we do not track VMIDs in TLB entries, so we never use the VMID field * we treat any write to VTTBR_EL2, not just a change to the VMID field bits, as a "possible VMID change" that causes us to throw away TLB entries, so that code doesn't need changing * we allow the guest to read/write the VTCR_EL2.VS bit already So all that's missing is the ID register part: report that we support VMID16 in our 'max' CPU. Signed-off-by: Peter Maydell Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson Message-id: 20200210120146.17631-1-peter.maydell@linaro.org --- target/arm/cpu64.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 1359564c554..f0d98bc79d1 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -674,6 +674,7 @@ static void aarch64_max_initfn(Object *obj) t =3D FIELD_DP64(t, ID_AA64MMFR1, LO, 1); t =3D FIELD_DP64(t, ID_AA64MMFR1, VH, 1); t =3D FIELD_DP64(t, ID_AA64MMFR1, PAN, 2); /* ATS1E1 */ + t =3D FIELD_DP64(t, ID_AA64MMFR1, VMIDBITS, 2); /* VMID16 */ cpu->isar.id_aa64mmfr1 =3D t; =20 t =3D cpu->isar.id_aa64mmfr2; --=20 2.20.1