From nobody Thu May 9 08:38:05 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581495281451937.3978986270187; Wed, 12 Feb 2020 00:14:41 -0800 (PST) Received: from localhost ([::1]:33296 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j1nAO-0007X5-79 for importer@patchew.org; Wed, 12 Feb 2020 03:14:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34244) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j1n9R-0005uP-EK for qemu-devel@nongnu.org; Wed, 12 Feb 2020 03:13:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j1n9P-0008Q0-Sv for qemu-devel@nongnu.org; Wed, 12 Feb 2020 03:13:40 -0500 Received: from mga07.intel.com ([134.134.136.100]:37427) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1j1n9P-0008GA-L2 for qemu-devel@nongnu.org; Wed, 12 Feb 2020 03:13:39 -0500 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Feb 2020 00:13:33 -0800 Received: from tao-optiplex-7060.sh.intel.com ([10.239.159.36]) by orsmga003.jf.intel.com with ESMTP; 12 Feb 2020 00:13:32 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,428,1574150400"; d="scan'208";a="233718890" From: Tao Xu To: pbonzini@redhat.com, rth@twiddle.net, ehabkost@redhat.com Subject: [PATCH v3 1/4] target/i386: Add Denverton-v2 (no MPX) CPU model Date: Wed, 12 Feb 2020 16:13:25 +0800 Message-Id: <20200212081328.7385-2-tao3.xu@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200212081328.7385-1-tao3.xu@intel.com> References: <20200212081328.7385-1-tao3.xu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.100 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tao3.xu@intel.com, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Because MPX is being removed from the linux kernel, remove MPX feature from Denverton. Signed-off-by: Tao Xu --- target/i386/cpu.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 32efa46852..848c992cd3 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3592,6 +3592,18 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .features[FEAT_VMX_VMFUNC] =3D MSR_VMX_VMFUNC_EPT_SWITCHING, .xlevel =3D 0x80000008, .model_id =3D "Intel Atom Processor (Denverton)", + .versions =3D (X86CPUVersionDefinition[]) { + { .version =3D 1 }, + { + .version =3D 2, + .props =3D (PropValue[]) { + { "monitor", "off" }, + { "mpx", "off" }, + { /* end of list */ }, + }, + }, + { /* end of list */ }, + }, }, { .name =3D "Snowridge", --=20 2.20.1 From nobody Thu May 9 08:38:05 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581495280618694.7858061108109; Wed, 12 Feb 2020 00:14:40 -0800 (PST) Received: from localhost ([::1]:33294 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j1nAM-0007TA-Pk for importer@patchew.org; Wed, 12 Feb 2020 03:14:38 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34247) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j1n9R-0005uR-EQ for qemu-devel@nongnu.org; Wed, 12 Feb 2020 03:13:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j1n9P-0008Po-Py for qemu-devel@nongnu.org; Wed, 12 Feb 2020 03:13:40 -0500 Received: from mga07.intel.com ([134.134.136.100]:37428) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1j1n9P-0008GP-IX for qemu-devel@nongnu.org; Wed, 12 Feb 2020 03:13:39 -0500 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Feb 2020 00:13:35 -0800 Received: from tao-optiplex-7060.sh.intel.com ([10.239.159.36]) by orsmga003.jf.intel.com with ESMTP; 12 Feb 2020 00:13:34 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,428,1574150400"; d="scan'208";a="233718899" From: Tao Xu To: pbonzini@redhat.com, rth@twiddle.net, ehabkost@redhat.com Subject: [PATCH v3 2/4] target/i386: Remove monitor from some CPU models Date: Wed, 12 Feb 2020 16:13:26 +0800 Message-Id: <20200212081328.7385-3-tao3.xu@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200212081328.7385-1-tao3.xu@intel.com> References: <20200212081328.7385-1-tao3.xu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.100 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tao3.xu@intel.com, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Add new version of Snowridge, Denverton, Opteron_G3, EPYC, and Dhyana CPU model to remove MONITOR/MWAIT feature. After QEMU/KVM use "-overcommit cpu-pm=3Don" to expose MONITOR/MWAIT (commit id 6f131f13e68d648a8e4f083c667ab1acd88ce4cd), the MONITOR/MWAIT feature in these CPU model is unused. Signed-off-by: Tao Xu --- target/i386/cpu.c | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 848c992cd3..6905e4eabd 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3731,6 +3731,14 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { /* end of list */ }, }, }, + { + .version =3D 3, + .props =3D (PropValue[]) { + /* mpx was already removed by -v2 above */ + { "monitor", "off" }, + { /* end of list */ }, + }, + }, { /* end of list */ }, }, }, @@ -3842,6 +3850,17 @@ static X86CPUDefinition builtin_x86_defs[] =3D { CPUID_EXT3_ABM | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM, .xlevel =3D 0x80000008, .model_id =3D "AMD Opteron 23xx (Gen 3 Class Opteron)", + .versions =3D (X86CPUVersionDefinition[]) { + { .version =3D 1 }, + { + .version =3D 2, + .props =3D (PropValue[]) { + { "monitor", "off" }, + { /* end of list */ }, + }, + }, + { /* end of list */ }, + }, }, { .name =3D "Opteron_G4", @@ -3966,6 +3985,14 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { /* end of list */ } } }, + { + .version =3D 3, + .props =3D (PropValue[]) { + /* ibpb was already enabled by -v2 above */ + { "monitor", "off" }, + { /* end of list */ }, + }, + }, { /* end of list */ } } }, @@ -4018,6 +4045,17 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .xlevel =3D 0x8000001E, .model_id =3D "Hygon Dhyana Processor", .cache_info =3D &epyc_cache_info, + .versions =3D (X86CPUVersionDefinition[]) { + { .version =3D 1 }, + { + .version =3D 2, + .props =3D (PropValue[]) { + { "monitor", "off" }, + { /* end of list */ }, + }, + }, + { /* end of list */ }, + }, }, }; =20 --=20 2.20.1 From nobody Thu May 9 08:38:05 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581495281967631.1613330440332; Wed, 12 Feb 2020 00:14:41 -0800 (PST) Received: from localhost ([::1]:33298 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j1nAO-0007Y5-N1 for importer@patchew.org; Wed, 12 Feb 2020 03:14:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34257) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j1n9R-0005uS-El for qemu-devel@nongnu.org; Wed, 12 Feb 2020 03:13:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j1n9Q-0008QJ-A4 for qemu-devel@nongnu.org; Wed, 12 Feb 2020 03:13:41 -0500 Received: from mga07.intel.com ([134.134.136.100]:37428) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1j1n9Q-0008GP-0W for qemu-devel@nongnu.org; Wed, 12 Feb 2020 03:13:40 -0500 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Feb 2020 00:13:36 -0800 Received: from tao-optiplex-7060.sh.intel.com ([10.239.159.36]) by orsmga003.jf.intel.com with ESMTP; 12 Feb 2020 00:13:35 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,428,1574150400"; d="scan'208";a="233718905" From: Tao Xu To: pbonzini@redhat.com, rth@twiddle.net, ehabkost@redhat.com Subject: [PATCH v3 3/4] target/i386: Add new property note to versioned CPU models Date: Wed, 12 Feb 2020 16:13:27 +0800 Message-Id: <20200212081328.7385-4-tao3.xu@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200212081328.7385-1-tao3.xu@intel.com> References: <20200212081328.7385-1-tao3.xu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.100 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tao3.xu@intel.com, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Add additional information for -cpu help to indicate the changes in this version of CPU model. Suggested-by: Eduardo Habkost Signed-off-by: Tao Xu --- target/i386/cpu.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 6905e4eabd..81a039beb6 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1690,6 +1690,7 @@ typedef struct PropValue { typedef struct X86CPUVersionDefinition { X86CPUVersion version; const char *alias; + const char *note; PropValue *props; } X86CPUVersionDefinition; =20 @@ -1720,6 +1721,7 @@ struct X86CPUModel { X86CPUDefinition *cpudef; /* CPU model version */ X86CPUVersion version; + const char *note; /* * If true, this is an alias CPU model. * This matters only for "-cpu help" and query-cpu-definitions @@ -4899,6 +4901,7 @@ static void x86_cpu_list_entry(gpointer data, gpointe= r user_data) g_autofree char *name =3D x86_cpu_class_get_model_name(cc); g_autofree char *desc =3D g_strdup(cc->model_description); g_autofree char *alias_of =3D x86_cpu_class_get_alias_of(cc); + g_autofree char *model_id =3D x86_cpu_class_get_model_id(cc); =20 if (!desc && alias_of) { if (cc->model && cc->model->version =3D=3D CPU_VERSION_AUTO) { @@ -4907,11 +4910,14 @@ static void x86_cpu_list_entry(gpointer data, gpoin= ter user_data) desc =3D g_strdup_printf("(alias of %s)", alias_of); } } + if (!desc && cc->model && cc->model->note) { + desc =3D g_strdup_printf("%s [%s]", model_id, cc->model->note); + } if (!desc) { - desc =3D x86_cpu_class_get_model_id(cc); + desc =3D g_strdup_printf("%s", model_id); } =20 - qemu_printf("x86 %-20s %-48s\n", name, desc); + qemu_printf("x86 %-20s %-58s\n", name, desc); } =20 /* list available CPU models and flags */ @@ -5388,6 +5394,7 @@ static void x86_register_cpudef_types(X86CPUDefinitio= n *def) x86_cpu_versioned_model_name(def, vdef->version); m->cpudef =3D def; m->version =3D vdef->version; + m->note =3D vdef->note; x86_register_cpu_model_type(name, m); =20 if (vdef->alias) { --=20 2.20.1 From nobody Thu May 9 08:38:05 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1581495352639516.0302853293323; Wed, 12 Feb 2020 00:15:52 -0800 (PST) Received: from localhost ([::1]:33328 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j1nBX-0001KJ-84 for importer@patchew.org; Wed, 12 Feb 2020 03:15:51 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34267) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j1n9R-0005uU-Nw for qemu-devel@nongnu.org; Wed, 12 Feb 2020 03:13:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j1n9Q-0008QE-A1 for qemu-devel@nongnu.org; Wed, 12 Feb 2020 03:13:41 -0500 Received: from mga07.intel.com ([134.134.136.100]:37424) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1j1n9Q-0008Fq-1d for qemu-devel@nongnu.org; Wed, 12 Feb 2020 03:13:40 -0500 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Feb 2020 00:13:38 -0800 Received: from tao-optiplex-7060.sh.intel.com ([10.239.159.36]) by orsmga003.jf.intel.com with ESMTP; 12 Feb 2020 00:13:36 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,428,1574150400"; d="scan'208";a="233718913" From: Tao Xu To: pbonzini@redhat.com, rth@twiddle.net, ehabkost@redhat.com Subject: [PATCH v3 4/4] target/i386: Add notes for versioned CPU models Date: Wed, 12 Feb 2020 16:13:28 +0800 Message-Id: <20200212081328.7385-5-tao3.xu@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200212081328.7385-1-tao3.xu@intel.com> References: <20200212081328.7385-1-tao3.xu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.100 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tao3.xu@intel.com, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Add which features are added or removed in this version. Remove the changed model-id in versioned CPU models, to keep the model name unchanged at /proc/cpuinfo inside the VM. Signed-off-by: Tao Xu --- Changes in v2: - correct the note of Cascadelake v3 (Xiaoyao) --- target/i386/cpu.c | 54 ++++++++++++++++++++++------------------------- 1 file changed, 25 insertions(+), 29 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 81a039beb6..739ef4ce91 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -2278,10 +2278,9 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 2, .alias =3D "Nehalem-IBRS", + .note =3D "IBRS", .props =3D (PropValue[]) { { "spec-ctrl", "on" }, - { "model-id", - "Intel Core i7 9xx (Nehalem Core i7, IBRS update)" }, { /* end of list */ } } }, @@ -2359,10 +2358,9 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 2, .alias =3D "Westmere-IBRS", + .note =3D "IBRS", .props =3D (PropValue[]) { { "spec-ctrl", "on" }, - { "model-id", - "Westmere E56xx/L56xx/X56xx (IBRS update)" }, { /* end of list */ } } }, @@ -2445,10 +2443,9 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 2, .alias =3D "SandyBridge-IBRS", + .note =3D "IBRS", .props =3D (PropValue[]) { { "spec-ctrl", "on" }, - { "model-id", - "Intel Xeon E312xx (Sandy Bridge, IBRS update)" }, { /* end of list */ } } }, @@ -2537,10 +2534,9 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 2, .alias =3D "IvyBridge-IBRS", + .note =3D "IBRS", .props =3D (PropValue[]) { { "spec-ctrl", "on" }, - { "model-id", - "Intel Xeon E3-12xx v2 (Ivy Bridge, IBRS)" }, { /* end of list */ } } }, @@ -2634,17 +2630,18 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 2, .alias =3D "Haswell-noTSX", + .note =3D "no TSX", .props =3D (PropValue[]) { { "hle", "off" }, { "rtm", "off" }, { "stepping", "1" }, - { "model-id", "Intel Core Processor (Haswell, no TSX)"= , }, { /* end of list */ } }, }, { .version =3D 3, .alias =3D "Haswell-IBRS", + .note =3D "IBRS", .props =3D (PropValue[]) { /* Restore TSX features removed by -v2 above */ { "hle", "on" }, @@ -2655,21 +2652,18 @@ static X86CPUDefinition builtin_x86_defs[] =3D { */ { "stepping", "4" }, { "spec-ctrl", "on" }, - { "model-id", - "Intel Core Processor (Haswell, IBRS)" }, { /* end of list */ } } }, { .version =3D 4, .alias =3D "Haswell-noTSX-IBRS", + .note =3D "no TSX, IBRS", .props =3D (PropValue[]) { { "hle", "off" }, { "rtm", "off" }, /* spec-ctrl was already enabled by -v3 above */ { "stepping", "1" }, - { "model-id", - "Intel Core Processor (Haswell, no TSX, IBRS)" }, { /* end of list */ } } }, @@ -2765,35 +2759,33 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 2, .alias =3D "Broadwell-noTSX", + .note =3D "no TSX", .props =3D (PropValue[]) { { "hle", "off" }, { "rtm", "off" }, - { "model-id", "Intel Core Processor (Broadwell, no TSX= )", }, { /* end of list */ } }, }, { .version =3D 3, .alias =3D "Broadwell-IBRS", + .note =3D "IBRS", .props =3D (PropValue[]) { /* Restore TSX features removed by -v2 above */ { "hle", "on" }, { "rtm", "on" }, { "spec-ctrl", "on" }, - { "model-id", - "Intel Core Processor (Broadwell, IBRS)" }, { /* end of list */ } } }, { .version =3D 4, .alias =3D "Broadwell-noTSX-IBRS", + .note =3D "no TSX, IBRS", .props =3D (PropValue[]) { { "hle", "off" }, { "rtm", "off" }, /* spec-ctrl was already enabled by -v3 above */ - { "model-id", - "Intel Core Processor (Broadwell, no TSX, IBRS)" }, { /* end of list */ } } }, @@ -2893,22 +2885,20 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 1 }, { .version =3D 2, + .note =3D "IBRS", .alias =3D "Skylake-Client-IBRS", .props =3D (PropValue[]) { { "spec-ctrl", "on" }, - { "model-id", - "Intel Core Processor (Skylake, IBRS)" }, { /* end of list */ } } }, { .version =3D 3, .alias =3D "Skylake-Client-noTSX-IBRS", + .note =3D "no TSX, IBRS", .props =3D (PropValue[]) { { "hle", "off" }, { "rtm", "off" }, - { "model-id", - "Intel Core Processor (Skylake, IBRS, no TSX)" }, { /* end of list */ } } }, @@ -3016,24 +3006,22 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 2, .alias =3D "Skylake-Server-IBRS", + .note =3D "IBRS", .props =3D (PropValue[]) { /* clflushopt was not added to Skylake-Server-IBRS */ /* TODO: add -v3 including clflushopt */ { "clflushopt", "off" }, { "spec-ctrl", "on" }, - { "model-id", - "Intel Xeon Processor (Skylake, IBRS)" }, { /* end of list */ } } }, { .version =3D 3, .alias =3D "Skylake-Server-noTSX-IBRS", + .note =3D "no TSX, IBRS", .props =3D (PropValue[]) { { "hle", "off" }, { "rtm", "off" }, - { "model-id", - "Intel Xeon Processor (Skylake, IBRS, no TSX)" }, { /* end of list */ } } }, @@ -3142,6 +3130,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .versions =3D (X86CPUVersionDefinition[]) { { .version =3D 1 }, { .version =3D 2, + .note =3D "ARCH_CAPABILITIES", .props =3D (PropValue[]) { { "arch-capabilities", "on" }, { "rdctl-no", "on" }, @@ -3153,6 +3142,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { }, { .version =3D 3, .alias =3D "Cascadelake-Server-noTSX", + .note =3D "ARCH_CAPABILITIES, no TSX", .props =3D (PropValue[]) { { "hle", "off" }, { "rtm", "off" }, @@ -3374,6 +3364,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 1 }, { .version =3D 2, + .note =3D "no TSX", .alias =3D "Icelake-Client-noTSX", .props =3D (PropValue[]) { { "hle", "off" }, @@ -3491,6 +3482,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 1 }, { .version =3D 2, + .note =3D "no TSX", .alias =3D "Icelake-Server-noTSX", .props =3D (PropValue[]) { { "hle", "off" }, @@ -3598,6 +3590,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 1 }, { .version =3D 2, + .note =3D "no MPX, no MONITOR", .props =3D (PropValue[]) { { "monitor", "off" }, { "mpx", "off" }, @@ -3727,14 +3720,15 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 1 }, { .version =3D 2, + .note =3D "no MPX", .props =3D (PropValue[]) { { "mpx", "off" }, - { "model-id", "Intel Atom Processor (Snowridge, no MPX= )" }, { /* end of list */ }, }, }, { .version =3D 3, + .note =3D "no MPX, no MONITOR", .props =3D (PropValue[]) { /* mpx was already removed by -v2 above */ { "monitor", "off" }, @@ -3856,6 +3850,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 1 }, { .version =3D 2, + .note =3D "no MONITOR", .props =3D (PropValue[]) { { "monitor", "off" }, { /* end of list */ }, @@ -3980,15 +3975,15 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 2, .alias =3D "EPYC-IBPB", + .note =3D "IBPB", .props =3D (PropValue[]) { { "ibpb", "on" }, - { "model-id", - "AMD EPYC Processor (with IBPB)" }, { /* end of list */ } } }, { .version =3D 3, + .note =3D "IBPB, no MONITOR", .props =3D (PropValue[]) { /* ibpb was already enabled by -v2 above */ { "monitor", "off" }, @@ -4051,6 +4046,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 1 }, { .version =3D 2, + .note =3D "no MONITOR", .props =3D (PropValue[]) { { "monitor", "off" }, { /* end of list */ }, --=20 2.20.1