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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id p26sm311305wmc.24.2020.02.10.04.01.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Feb 2020 04:01:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Jle24mRVWyhiSlJz0ynMllgtOVUvCHA26143XxrUarU=; b=JLALmue86Vj1WLKga3IYxtsrrrSb2fZfVjSA/kJG0pu36CzPRvUzZVsTZS/MLQqECo B/pvVjUTXM2FfA6nJobQCJk0k/y8NSiwzqPgxjKcgZAoFz8rn71bfPPxGQCDxk0R24zH aFOfDq8za89nqwXw4+yDu+04uuodJjU/HevVrYpZLmUGFY67Vw+4qIB4QNXNXJbhDVc1 Z8lCl7cLpJmLKfevGWR5mTlnnQxW+GE4v9atmDDeJOxbC3Muo7CKfioLGNM+r1y6Ytd2 /oFDA7M9wtA1d5esX5qfb7XZGcxOIxqLpQMwOSYNhX+FTBU5VvX+DBqTyMzwO2aDIdTO trTg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Jle24mRVWyhiSlJz0ynMllgtOVUvCHA26143XxrUarU=; b=I2ts4ago8Ab0WGd/EYLJ6glaOYi0iIdIIyH7IdvSJhTSpGT6ZEaoNhaJm/MhIyvf6k XjoOpkWE3YJoa3Ti5pYOF7M26IgIYFbmgwfu9c0z0thaYBaCn0snQi3ljwNhR5P3nEul wekqUDutHuEY2FjUAjbcznzfaFB0ygPFP6rspX8EaozrsaBm4pm9tRw5+e6ARSRx/6Yb /DaUUo6kJ89s6YVF2QYbopZFkOHPiGxx9s5jXF9UJsiHZO9QaSen+4lxeMjni4y82rX0 pxYMsB2T90mkRU87qXlvDuc/aLiytvxfo7yaOvdalwy+ZbhJ+GOn+RWIVd16Yc20Drqa z56Q== X-Gm-Message-State: APjAAAWrO+v7OSA3RhmXxBREwl2H6z6yrbl//65jOyFiSXDcL1Q1VAMc mpMVINuCzIta0Ba2L+Axj56RNg== X-Google-Smtp-Source: APXvYqyY8rjzha/DoA1j0XJXXFrzjrREp1fthxF8UV5BIn+M1Xk/cMSEqSeOnZp4Ay6VXzm0A6gxcQ== X-Received: by 2002:adf:f28f:: with SMTP id k15mr1637970wro.230.1581336109096; Mon, 10 Feb 2020 04:01:49 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH] target/arm: Implement ARMv8.1-VMID16 extension Date: Mon, 10 Feb 2020 12:01:46 +0000 Message-Id: <20200210120146.17631-1-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" The ARMv8.1-VMID16 extension extends the VMID from 8 bits to 16 bits: * the ID_AA64MMFR1_EL1.VMIDBits field specifies whether the VMID is 8 or 16 bits * the VMID field in VTTBR_EL2 is extended to 16 bits * VTCR_EL2.VS lets the guest specify whether to use the full 16 bits, or use the backwards-compatible 8 bits For QEMU implementing this is trivial: * we do not track VMIDs in TLB entries, so we never use the VMID field * we treat any write to VTTBR_EL2, not just a change to the VMID field bits, as a "possible VMID change" that causes us to throw away TLB entries, so that code doesn't need changing * we allow the guest to read/write the VTCR_EL2.VS bit already So all that's missing is the ID register part: report that we support VMID16 in our 'max' CPU. Signed-off-by: Peter Maydell Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- Not something anybody's been asking for, but worthwhile as a step towards finishing off support for all the v8.1 extensions. target/arm/cpu64.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 2d97bf45e1e..bf2cf278c03 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -672,6 +672,7 @@ static void aarch64_max_initfn(Object *obj) t =3D cpu->isar.id_aa64mmfr1; t =3D FIELD_DP64(t, ID_AA64MMFR1, HPDS, 1); /* HPD */ t =3D FIELD_DP64(t, ID_AA64MMFR1, LO, 1); + t =3D FIELD_DP64(t, ID_AA64MMFR1, VMIDBITS, 2); /* VMID16 */ cpu->isar.id_aa64mmfr1 =3D t; =20 /* Replicate the same data to the 32-bit id registers. */ --=20 2.20.1