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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 42/48] target/arm: Raise only one interrupt in
 arm_cpu_exec_interrupt
Date: Fri,  7 Feb 2020 14:33:37 +0000
Message-Id: <20200207143343.30322-43-peter.maydell@linaro.org>
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From: Richard Henderson <richard.henderson@linaro.org>

The fall through organization of this function meant that we
would raise an interrupt, then might overwrite that with another.
Since interrupt prioritization is IMPLEMENTATION DEFINED, we
can recognize these in any order we choose.

Unify the code to raise the interrupt in a block at the end.

Tested-by: Alex Benn=C3=A9e <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200206105448.4726-42-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/cpu.c | 30 ++++++++++++------------------
 1 file changed, 12 insertions(+), 18 deletions(-)

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 4ffc09909db..b0762a76c4b 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -535,17 +535,15 @@ bool arm_cpu_exec_interrupt(CPUState *cs, int interru=
pt_request)
     uint64_t hcr_el2 =3D arm_hcr_el2_eff(env);
     uint32_t target_el;
     uint32_t excp_idx;
-    bool ret =3D false;
+
+    /* The prioritization of interrupts is IMPLEMENTATION DEFINED. */
=20
     if (interrupt_request & CPU_INTERRUPT_FIQ) {
         excp_idx =3D EXCP_FIQ;
         target_el =3D arm_phys_excp_target_el(cs, excp_idx, cur_el, secure=
);
         if (arm_excp_unmasked(cs, excp_idx, target_el,
                               cur_el, secure, hcr_el2)) {
-            cs->exception_index =3D excp_idx;
-            env->exception.target_el =3D target_el;
-            cc->do_interrupt(cs);
-            ret =3D true;
+            goto found;
         }
     }
     if (interrupt_request & CPU_INTERRUPT_HARD) {
@@ -553,10 +551,7 @@ bool arm_cpu_exec_interrupt(CPUState *cs, int interrup=
t_request)
         target_el =3D arm_phys_excp_target_el(cs, excp_idx, cur_el, secure=
);
         if (arm_excp_unmasked(cs, excp_idx, target_el,
                               cur_el, secure, hcr_el2)) {
-            cs->exception_index =3D excp_idx;
-            env->exception.target_el =3D target_el;
-            cc->do_interrupt(cs);
-            ret =3D true;
+            goto found;
         }
     }
     if (interrupt_request & CPU_INTERRUPT_VIRQ) {
@@ -564,10 +559,7 @@ bool arm_cpu_exec_interrupt(CPUState *cs, int interrup=
t_request)
         target_el =3D 1;
         if (arm_excp_unmasked(cs, excp_idx, target_el,
                               cur_el, secure, hcr_el2)) {
-            cs->exception_index =3D excp_idx;
-            env->exception.target_el =3D target_el;
-            cc->do_interrupt(cs);
-            ret =3D true;
+            goto found;
         }
     }
     if (interrupt_request & CPU_INTERRUPT_VFIQ) {
@@ -575,14 +567,16 @@ bool arm_cpu_exec_interrupt(CPUState *cs, int interru=
pt_request)
         target_el =3D 1;
         if (arm_excp_unmasked(cs, excp_idx, target_el,
                               cur_el, secure, hcr_el2)) {
-            cs->exception_index =3D excp_idx;
-            env->exception.target_el =3D target_el;
-            cc->do_interrupt(cs);
-            ret =3D true;
+            goto found;
         }
     }
+    return false;
=20
-    return ret;
+ found:
+    cs->exception_index =3D excp_idx;
+    env->exception.target_el =3D target_el;
+    cc->do_interrupt(cs);
+    return true;
 }
=20
 #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
--=20
2.20.1