From nobody Thu Nov 13 14:54:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1580700830623428.125442186431; Sun, 2 Feb 2020 19:33:50 -0800 (PST) Received: from localhost ([::1]:33788 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iySUf-00075b-Ck for importer@patchew.org; Sun, 02 Feb 2020 22:33:49 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:50065) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iySRP-0002jC-6F for qemu-devel@nongnu.org; Sun, 02 Feb 2020 22:30:28 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iySRN-0006nV-Ac for qemu-devel@nongnu.org; Sun, 02 Feb 2020 22:30:27 -0500 Received: from [107.174.27.60] (port=38982 helo=ozlabs.ru) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1iySRL-0006lD-Fk; Sun, 02 Feb 2020 22:30:24 -0500 Received: from fstn1-p1.ozlabs.ibm.com (localhost [IPv6:::1]) by ozlabs.ru (Postfix) with ESMTP id 870BAAE801F8; Sun, 2 Feb 2020 22:28:25 -0500 (EST) From: Alexey Kardashevskiy To: qemu-devel@nongnu.org Subject: [PATCH qemu v6 2/6] ppc/spapr: Move GPRs setup to one place Date: Mon, 3 Feb 2020 14:29:39 +1100 Message-Id: <20200203032943.121178-3-aik@ozlabs.ru> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200203032943.121178-1-aik@ozlabs.ru> References: <20200203032943.121178-1-aik@ozlabs.ru> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 107.174.27.60 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Paolo Bonzini , qemu-ppc@nongnu.org, Alexey Kardashevskiy , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" At the moment "pseries" starts in SLOF which only expects the FDT blob pointer in r3. As we are going to introduce a OpenFirmware support in QEMU, we will be booting OF clients directly and these expect a stack pointer in r1, the OF entry point in r5 and in addition to this, Linux looks at r3/r4 for the initramdisk location (although vmlinux can find this from the device tree but zImage from distro kernels cannot). This extends spapr_cpu_set_entry_state() to take more registers. This should cause no behavioral change. Signed-off-by: Alexey Kardashevskiy Reviewed-by: Fabiano Rosas Reviewed-by: Greg Kurz --- include/hw/ppc/spapr_cpu_core.h | 4 +++- hw/ppc/spapr.c | 4 ++-- hw/ppc/spapr_cpu_core.c | 7 ++++++- hw/ppc/spapr_rtas.c | 2 +- 4 files changed, 12 insertions(+), 5 deletions(-) diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_cor= e.h index 1c4cc6559c52..edd7214fafcf 100644 --- a/include/hw/ppc/spapr_cpu_core.h +++ b/include/hw/ppc/spapr_cpu_core.h @@ -40,7 +40,9 @@ typedef struct SpaprCpuCoreClass { } SpaprCpuCoreClass; =20 const char *spapr_get_cpu_core_type(const char *cpu_type); -void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, target_u= long r3); +void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, + target_ulong r1, target_ulong r3, + target_ulong r4, target_ulong r5); =20 typedef struct SpaprCpuState { uint64_t vpa_addr; diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index c9b2e0a5e060..660a4b60e072 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1674,8 +1674,8 @@ static void spapr_machine_reset(MachineState *machine) spapr->fdt_blob =3D fdt; =20 /* Set up the entry state */ - spapr_cpu_set_entry_state(first_ppc_cpu, SPAPR_ENTRY_POINT, fdt_addr); - first_ppc_cpu->env.gpr[5] =3D 0; + spapr_cpu_set_entry_state(first_ppc_cpu, SPAPR_ENTRY_POINT, + 0, fdt_addr, 0, 0); =20 spapr->cas_reboot =3D false; =20 diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index d09125d9afd4..696b76598dd7 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -84,13 +84,18 @@ static void spapr_reset_vcpu(PowerPCCPU *cpu) spapr_irq_cpu_intc_reset(spapr, cpu); } =20 -void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, target_u= long r3) +void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, + target_ulong r1, target_ulong r3, + target_ulong r4, target_ulong r5) { PowerPCCPUClass *pcc =3D POWERPC_CPU_GET_CLASS(cpu); CPUPPCState *env =3D &cpu->env; =20 env->nip =3D nip; + env->gpr[1] =3D r1; env->gpr[3] =3D r3; + env->gpr[4] =3D r4; + env->gpr[5] =3D r5; kvmppc_set_reg_ppc_online(cpu, 1); CPU(cpu)->halted =3D 0; /* Enable Power-saving mode Exit Cause exceptions */ diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index 656fdd221665..9e3cbd70bbd9 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -190,7 +190,7 @@ static void rtas_start_cpu(PowerPCCPU *callcpu, SpaprMa= chineState *spapr, */ newcpu->env.tb_env->tb_offset =3D callcpu->env.tb_env->tb_offset; =20 - spapr_cpu_set_entry_state(newcpu, start, r3); + spapr_cpu_set_entry_state(newcpu, start, 0, r3, 0, 0); =20 qemu_cpu_kick(CPU(newcpu)); =20 --=20 2.17.1