From nobody Thu Nov 13 14:54:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1580700709406469.25768984572676; Sun, 2 Feb 2020 19:31:49 -0800 (PST) Received: from localhost ([::1]:33758 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iySSi-0004A9-BH for importer@patchew.org; Sun, 02 Feb 2020 22:31:48 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:50020) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iySRM-0002hS-76 for qemu-devel@nongnu.org; Sun, 02 Feb 2020 22:30:25 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iySRJ-0006kL-F1 for qemu-devel@nongnu.org; Sun, 02 Feb 2020 22:30:22 -0500 Received: from [107.174.27.60] (port=38972 helo=ozlabs.ru) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1iySRJ-0006jf-9a; Sun, 02 Feb 2020 22:30:21 -0500 Received: from fstn1-p1.ozlabs.ibm.com (localhost [IPv6:::1]) by ozlabs.ru (Postfix) with ESMTP id D59B3AE80046; Sun, 2 Feb 2020 22:28:23 -0500 (EST) From: Alexey Kardashevskiy To: qemu-devel@nongnu.org Subject: [PATCH qemu v6 1/6] ppc: Start CPU in the default mode which is big-endian 32bit Date: Mon, 3 Feb 2020 14:29:38 +1100 Message-Id: <20200203032943.121178-2-aik@ozlabs.ru> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200203032943.121178-1-aik@ozlabs.ru> References: <20200203032943.121178-1-aik@ozlabs.ru> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 107.174.27.60 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Paolo Bonzini , qemu-ppc@nongnu.org, Alexey Kardashevskiy , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" At the moment we enforce 64bit mode on a CPU when reset. This does not make difference as SLOF or Linux set the desired mode straight away. However if we ever boot something other than these two, this might not work as, for example, GRUB expects the default MSR state and does not work properly. This removes setting MSR_SF from the PPC CPU reset. Signed-off-by: Alexey Kardashevskiy --- target/ppc/translate_init.inc.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.in= c.c index 53995f62eab2..f6a676cf55e8 100644 --- a/target/ppc/translate_init.inc.c +++ b/target/ppc/translate_init.inc.c @@ -10710,12 +10710,6 @@ static void ppc_cpu_reset(CPUState *s) #endif #endif =20 -#if defined(TARGET_PPC64) - if (env->mmu_model & POWERPC_MMU_64) { - msr |=3D (1ULL << MSR_SF); - } -#endif - hreg_store_msr(env, msr, 1); =20 #if !defined(CONFIG_USER_ONLY) --=20 2.17.1