From nobody Thu Nov 13 12:01:27 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1580433144802389.2439757401478; Thu, 30 Jan 2020 17:12:24 -0800 (PST) Received: from localhost ([::1]:42552 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ixKr9-0001j1-P1 for importer@patchew.org; Thu, 30 Jan 2020 20:12:23 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:58378) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ixKou-0007vN-CP for qemu-devel@nongnu.org; Thu, 30 Jan 2020 20:10:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ixKor-00076b-Tu for qemu-devel@nongnu.org; Thu, 30 Jan 2020 20:10:02 -0500 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:32165 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ixKor-00072X-NP for qemu-devel@nongnu.org; Thu, 30 Jan 2020 20:10:01 -0500 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-328-qLjYAn62PW2n-jiAxeKJoA-1; Thu, 30 Jan 2020 20:09:53 -0500 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id D2BE413E7; Fri, 31 Jan 2020 01:09:51 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-34.brq.redhat.com [10.40.204.34]) by smtp.corp.redhat.com (Postfix) with ESMTPS id A0C1E5DA75; Fri, 31 Jan 2020 01:09:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1580432997; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=hTdels3lLogtY3GE7YXCvYtzkeoykd41wRZrcLAwDYA=; b=Yis4aFRrVu0fzrOefz++rS8J1tWa3nydnHfJp9U5JR3iSnfVQMEqWT1INsdC1JEA1It/CH SvqlcRuNfgRbX90eX+K8Qi0nJU/K+bC4tq+0PLQrA4h7h+pY//MuxNIe5XLuO7nb7kZ2Mu m1z4ewnSOLTp/4gjcU2MRUIZVMYF/YY= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 1/2] !fixup "hw/misc: Add limited support for AVR power device" Date: Fri, 31 Jan 2020 02:09:40 +0100 Message-Id: <20200131010941.10636-2-philmd@redhat.com> In-Reply-To: <20200131010941.10636-1-philmd@redhat.com> References: <1580428993-4767-1-git-send-email-aleksandar.markovic@rt-rk.com> <20200131010941.10636-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-MC-Unique: qLjYAn62PW2n-jiAxeKJoA-1 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 205.139.110.120 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sarah Harris , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aleksandar Markovic , Michael Rolnik , Aleksandar Markovic , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Aleksandar Markovic Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" - convert DB_PRINT() to trace-events - fix style/indentation Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alex Benn=C3=A9e --- hw/misc/avr_power.c | 17 +++++++++-------- hw/misc/trace-events | 4 ++++ 2 files changed, 13 insertions(+), 8 deletions(-) diff --git a/hw/misc/avr_power.c b/hw/misc/avr_power.c index 598bc7279c..65ff7c4405 100644 --- a/hw/misc/avr_power.c +++ b/hw/misc/avr_power.c @@ -27,9 +27,7 @@ #include "qemu/log.h" #include "hw/qdev-properties.h" #include "hw/irq.h" - -#define DB_PRINT(fmt, args...) /* Nothing */ -/*#define DB_PRINT(fmt, args...) printf("%s: " fmt "\n", __func__, ## args= )*/ +#include "trace.h" =20 static void avr_mask_reset(DeviceState *dev) { @@ -48,19 +46,20 @@ static uint64_t avr_mask_read(void *opaque, hwaddr offs= et, unsigned size) assert(offset =3D=3D 0); AVRMaskState *s =3D opaque; =20 + trace_avr_power_read(s->val); + return (uint64_t)s->val; } =20 static void avr_mask_write(void *opaque, hwaddr offset, - uint64_t val64, unsigned size) + uint64_t val64, unsigned size) { assert(size =3D=3D 1); assert(offset =3D=3D 0); AVRMaskState *s =3D opaque; uint8_t val8 =3D val64; =20 - DB_PRINT("write %d to offset %d", val8, (uint8_t)offset); - + trace_avr_power_write(val8); s->val =3D val8; for (int i =3D 0; i < 8; i++) { qemu_set_irq(s->irq[i], (val8 & (1 << i)) !=3D 0); @@ -71,7 +70,9 @@ static const MemoryRegionOps avr_mask_ops =3D { .read =3D avr_mask_read, .write =3D avr_mask_write, .endianness =3D DEVICE_NATIVE_ENDIAN, - .impl =3D {.max_access_size =3D 1} + .impl =3D { + .max_access_size =3D 1, + }, }; =20 static void avr_mask_init(Object *dev) @@ -80,7 +81,7 @@ static void avr_mask_init(Object *dev) SysBusDevice *busdev =3D SYS_BUS_DEVICE(dev); =20 memory_region_init_io(&s->iomem, dev, &avr_mask_ops, s, TYPE_AVR_MASK, - 0x01); + 0x01); sysbus_init_mmio(busdev, &s->iomem); =20 for (int i =3D 0; i < 8; i++) { diff --git a/hw/misc/trace-events b/hw/misc/trace-events index 7f0f5dff3a..f716881bb1 100644 --- a/hw/misc/trace-events +++ b/hw/misc/trace-events @@ -179,3 +179,7 @@ via1_rtc_cmd_pram_read(int addr, int value) "addr=3D%u = value=3D0x%02x" via1_rtc_cmd_pram_write(int addr, int value) "addr=3D%u value=3D0x%02x" via1_rtc_cmd_pram_sect_read(int sector, int offset, int addr, int value) "= sector=3D%u offset=3D%u addr=3D%d value=3D0x%02x" via1_rtc_cmd_pram_sect_write(int sector, int offset, int addr, int value) = "sector=3D%u offset=3D%u addr=3D%d value=3D0x%02x" + +# avr_power.c +avr_power_read(uint8_t value) "power_reduc read value:%u" +avr_power_write(uint8_t value) "power_reduc write value:%u" --=20 2.21.1 From nobody Thu Nov 13 12:01:27 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1580433072113553.0235149772973; Thu, 30 Jan 2020 17:11:12 -0800 (PST) Received: from localhost ([::1]:42542 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ixKpx-0000Oq-Qs for importer@patchew.org; Thu, 30 Jan 2020 20:11:09 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:58389) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ixKou-0007vO-6T for qemu-devel@nongnu.org; Thu, 30 Jan 2020 20:10:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ixKos-00077N-BN for qemu-devel@nongnu.org; Thu, 30 Jan 2020 20:10:03 -0500 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:38703 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ixKos-00072O-7i for qemu-devel@nongnu.org; Thu, 30 Jan 2020 20:10:02 -0500 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-146-X3UfZ4b6McqnUKOeMJY1cQ-1; Thu, 30 Jan 2020 20:09:55 -0500 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 7DBF2182B8EB; Fri, 31 Jan 2020 01:09:54 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-34.brq.redhat.com [10.40.204.34]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 558725DA75; Fri, 31 Jan 2020 01:09:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1580432997; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=wAKgo7Pb5RXY3JeoxK8pKIRYXPT9L1pD79bpcBQT6do=; b=XD3HxmxAVo3SQZLoXjUkGQoRmOVzdNRO/frrS9vwYD47NozLDK1ayU0VOWAhOyDYleVESV N4aIoRF11RI1nM0tQrwsDuYgBInnSbnGAwhu7omfYjbJEPIAV3LQv+jS2P+EhZq1+FbAEX BaaamAEzK4dn5VsEtWAEeFZGeTcknsc= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 2/2] !fixup "hw/timer: Add limited support for AVR 16-bit timer peripheral" Date: Fri, 31 Jan 2020 02:09:41 +0100 Message-Id: <20200131010941.10636-3-philmd@redhat.com> In-Reply-To: <20200131010941.10636-1-philmd@redhat.com> References: <1580428993-4767-1-git-send-email-aleksandar.markovic@rt-rk.com> <20200131010941.10636-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-MC-Unique: X3UfZ4b6McqnUKOeMJY1cQ-1 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 205.139.110.61 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sarah Harris , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aleksandar Markovic , Michael Rolnik , Aleksandar Markovic , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Aleksandar Markovic Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Convert DB_PRINT() to trace events. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/timer/avr_timer16.c | 25 +++++++++++++++---------- hw/timer/trace-events | 12 ++++++++++++ 2 files changed, 27 insertions(+), 10 deletions(-) diff --git a/hw/timer/avr_timer16.c b/hw/timer/avr_timer16.c index 4e16afc61c..073f36aa76 100644 --- a/hw/timer/avr_timer16.c +++ b/hw/timer/avr_timer16.c @@ -36,6 +36,7 @@ #include "qemu/log.h" #include "hw/irq.h" #include "hw/qdev-properties.h" +#include "trace.h" =20 /* Register offsets */ #define T16_CRA 0x0 @@ -104,7 +105,6 @@ /* Helper macros */ #define VAL16(l, h) ((h << 8) | l) #define DB_PRINT(fmt, args...) /* Nothing */ -/*#define DB_PRINT(fmt, args...) printf("%s: " fmt "\n", __func__, ## args= )*/ =20 static inline int64_t avr_timer16_ns_to_ticks(AVRTimer16State *t16, int64_= t t) { @@ -168,8 +168,8 @@ static void avr_timer16_clksrc_update(AVRTimer16State *= t16) if (divider) { t16->freq_hz =3D t16->cpu_freq_hz / divider; t16->period_ns =3D NANOSECONDS_PER_SECOND / t16->freq_hz; - DB_PRINT("Timer frequency %" PRIu64 " hz, period %" PRIu64 " ns (%= f s)", - t16->freq_hz, t16->period_ns, 1 / (double)t16->freq_hz); + trace_avr_timer16_clksrc_update(t16->freq_hz, t16->period_ns, + (uint64_t)(1e6 / t16->freq_hz)); } } =20 @@ -235,8 +235,7 @@ static void avr_timer16_set_alarm(AVRTimer16State *t16) t16->reset_time_ns + ((CNT(t16) + alarm_offset) * t16->period_ns); timer_mod(t16->timer, alarm_ns); =20 - DB_PRINT("next alarm %" PRIu64 " ns from now", - alarm_offset * t16->period_ns); + trace_avr_timer16_next_alarm(alarm_offset * t16->period_ns); } =20 static void avr_timer16_interrupt(void *opaque) @@ -253,11 +252,11 @@ static void avr_timer16_interrupt(void *opaque) return; } =20 - DB_PRINT("interrupt, cnt =3D %d", CNT(t16)); + trace_avr_timer16_interrupt_count(CNT(t16)); =20 /* Counter overflow */ if (t16->next_interrupt =3D=3D OVERFLOW) { - DB_PRINT("0xffff overflow"); + trace_avr_timer16_interrupt_overflow("counter 0xffff"); avr_timer16_clock_reset(t16); if (t16->imsk & T16_INT_TOV) { t16->ifr |=3D T16_INT_TOV; @@ -266,12 +265,12 @@ static void avr_timer16_interrupt(void *opaque) } /* Check for ocra overflow in CTC mode */ if (mode =3D=3D T16_MODE_CTC_OCRA && t16->next_interrupt =3D=3D COMPA)= { - DB_PRINT("CTC OCRA overflow"); + trace_avr_timer16_interrupt_overflow("CTC OCRA"); avr_timer16_clock_reset(t16); } /* Check for icr overflow in CTC mode */ if (mode =3D=3D T16_MODE_CTC_ICR && t16->next_interrupt =3D=3D CAPT) { - DB_PRINT("CTC ICR overflow"); + trace_avr_timer16_interrupt_overflow("CTC ICR"); avr_timer16_clock_reset(t16); if (t16->imsk & T16_INT_IC) { t16->ifr |=3D T16_INT_IC; @@ -367,6 +366,8 @@ static uint64_t avr_timer16_read(void *opaque, hwaddr o= ffset, unsigned size) default: break; } + trace_avr_timer16_read(offset, retval); + return (uint64_t)retval; } =20 @@ -378,7 +379,7 @@ static void avr_timer16_write(void *opaque, hwaddr offs= et, uint8_t val8 =3D (uint8_t)val64; uint8_t prev_clk_src =3D CLKSRC(t16); =20 - DB_PRINT("write %d to offset %d", val8, (uint8_t)offset); + trace_avr_timer16_write(offset, val8); =20 switch (offset) { case T16_CRA: @@ -475,6 +476,7 @@ static uint64_t avr_timer16_imsk_read(void *opaque, { assert(size =3D=3D 1); AVRTimer16State *t16 =3D opaque; + trace_avr_timer16_read_imsk(offset ? 0 : t16->imsk); if (offset !=3D 0) { return 0; } @@ -486,6 +488,7 @@ static void avr_timer16_imsk_write(void *opaque, hwaddr= offset, { assert(size =3D=3D 1); AVRTimer16State *t16 =3D opaque; + trace_avr_timer16_write_imsk(val64); if (offset !=3D 0) { return; } @@ -498,6 +501,7 @@ static uint64_t avr_timer16_ifr_read(void *opaque, { assert(size =3D=3D 1); AVRTimer16State *t16 =3D opaque; + trace_avr_timer16_read_ifr(offset ? 0 : t16->ifr); if (offset !=3D 0) { return 0; } @@ -509,6 +513,7 @@ static void avr_timer16_ifr_write(void *opaque, hwaddr = offset, { assert(size =3D=3D 1); AVRTimer16State *t16 =3D opaque; + trace_avr_timer16_write_imsk(val64); if (offset !=3D 0) { return; } diff --git a/hw/timer/trace-events b/hw/timer/trace-events index 29fda7870e..5d9f4c93fb 100644 --- a/hw/timer/trace-events +++ b/hw/timer/trace-events @@ -74,3 +74,15 @@ nrf51_timer_write(uint64_t addr, uint32_t value, unsigne= d size) "write addr 0x%" bcm2835_systmr_irq(bool enable) "timer irq state %u" bcm2835_systmr_read(uint64_t offset, uint64_t data) "timer read: offset 0x= %" PRIx64 " data 0x%" PRIx64 bcm2835_systmr_write(uint64_t offset, uint64_t data) "timer write: offset = 0x%" PRIx64 " data 0x%" PRIx64 + +# avr_timer16.c +avr_timer16_read(uint8_t addr, uint8_t value) "timer16 read addr:%u value:= %u" +avr_timer16_read_ifr(uint8_t value) "timer16 read addr:ifr value:%u" +avr_timer16_read_imsk(uint8_t value) "timer16 read addr:imsk value:%u" +avr_timer16_write(uint8_t addr, uint8_t value) "timer16 write addr:%u valu= e:%u" +avr_timer16_write_ifr(uint8_t value) "timer16 write addr:ifr value:%u" +avr_timer16_write_imsk(uint8_t value) "timer16 write addr:imsk value:%u" +avr_timer16_interrupt_count(uint8_t cnt) "count: %u" +avr_timer16_interrupt_overflow(const char *reason) "overflow: %s" +avr_timer16_next_alarm(uint64_t delay_ns) "next alarm: %" PRIu64 " ns from= now" +avr_timer16_clksrc_update(uint64_t freq_hz, uint64_t period_ns, uint64_t d= elay_s) "timer frequency: %" PRIu64 " Hz, period: %" PRIu64 " ns (%" PRId64= " us)" --=20 2.21.1