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[83.57.172.113]) by smtp.gmail.com with ESMTPSA id s139sm4598271wme.35.2020.01.23.16.52.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Jan 2020 16:52:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=J3qwH5nB+ktm+X0YAoP4RKFh5TB1rhPNUkL1SuqyNYw=; b=aWsoP6Broiq7V2M/brzbOiIdxz9OAMW3aoOxm0PB52SZePoN6wG8Zmgtyza818UBy8 /5c+3aBDNlvg+ZjJNIWJ4EHzBbHIQV3araDjIw89E36Xot5ODreA3u6TD7KvV2XBLVjl HV8ZxhNz3+px8c7YUWi1cglZtE00bYOarQHLFSxfxaPs2dRObtOjor9ui8iIOX4JmhzL yDylb9mG9jeE3OiumRYzY/Hq07f129yVJowpgkc7zT8LkPyPcOX0aw8uNt8QOLFmVMNi PuupqQNwK8U2cdG70empwEVIvVK9TAs0LqeU6vSNnobhSc/McvLp7t+WvU06czXm6RRw 4SFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=J3qwH5nB+ktm+X0YAoP4RKFh5TB1rhPNUkL1SuqyNYw=; b=aHCWUMYauNXc5dzBqvt9DtYGibQINsh62fvu0sbxNoa84pGZrEum+lQxDZherwCYHj +fbV8FiASKddpuFLfNvQxRPxKJJadFmykeUG+qmv1kas1HSzCgd2YiJMQzbjy01F/oA9 i3wyp9V5E+qkAAWuepHkKbEOjww0W31wrIYz0ld2JsArRVFGZ970G7NihpXNlbIcFMS+ d9BHDuylspBw+GE/XqA5mwxaUeodm9kVjmjFGDEbp3UJ+K1fgpYMV/CYjyZFCvQAe030 TtsC4GOiAFevlWVYiVZLQ1yoMjWXD7sQeSUiBtuywdu+0+BWDEL0itX89lOjRV7n7CvO I2Qw== X-Gm-Message-State: APjAAAVBEjpiKD880PG/NdmoVksRWmvj2XFdW+g3a1TyTPOO7al20twH 8pMBNuAbf2Ey74oLgz/QGTg97cI5 X-Google-Smtp-Source: APXvYqw24vLy1IIoF0TrkQxenjk0HTiwDJz8rO/GTwWG1vTyGMUXdNwICltPj1kPtB45JONegneRXg== X-Received: by 2002:a05:600c:2046:: with SMTP id p6mr505648wmg.167.1579827125352; Thu, 23 Jan 2020 16:52:05 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, mrolnik@gmail.com, richard.henderson@linaro.org, me@xcancerberox.com.ar Subject: [PATCH rc2 13/25] hw/misc: Add Atmel power device Date: Fri, 24 Jan 2020 01:51:19 +0100 Message-Id: <20200124005131.16276-14-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200124005131.16276-1-f4bug@amsat.org> References: <20200124005131.16276-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::343 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Fam Zheng , S.E.Harris@kent.ac.uk, qemu-riscv@nongnu.org, Eduardo Habkost , Sagar Karandikar , dovgaluk@ispras.ru, Bastian Koppelmann , thuth@redhat.com, Markus Armbruster , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Alistair Francis , imammedo@redhat.com, Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Palmer Dabbelt , aleksandar.m.mail@gmail.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Michael Rolnik This is a simple device of just one register, whenver this register is written it calls qemu_set_irq function for each of 8 bits/IRQs.. It is used to implement AVR Power Reduction Signed-off-by: Michael Rolnik Message-Id: <20200118191416.19934-14-mrolnik@gmail.com> Signed-off-by: Philippe Mathieu-Daud=C3=A9 [rth: Squash include fix and file rename from f4bug, which was:] Suggested-by: Aleksandar Markovic Signed-off-by: Richard Henderson --- include/hw/misc/atmel_power.h | 46 ++++++++++++++ hw/misc/atmel_power.c | 112 ++++++++++++++++++++++++++++++++++ hw/misc/Kconfig | 3 + hw/misc/Makefile.objs | 2 + 4 files changed, 163 insertions(+) create mode 100644 include/hw/misc/atmel_power.h create mode 100644 hw/misc/atmel_power.c diff --git a/include/hw/misc/atmel_power.h b/include/hw/misc/atmel_power.h new file mode 100644 index 0000000000..5366e9693f --- /dev/null +++ b/include/hw/misc/atmel_power.h @@ -0,0 +1,46 @@ +/* + * Atmel AVR Power Reduction Management + * + * Copyright (c) 2019 Michael Rolnik + * + * Permission is hereby granted, free of charge, to any person obtaining a= copy + * of this software and associated documentation files (the "Software"), t= o deal + * in the Software without restriction, including without limitation the r= ights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or se= ll + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included= in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS= OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OT= HER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING= FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS = IN + * THE SOFTWARE. + */ + +#ifndef HW_MISC_ATMEL_POWER_H +#define HW_MISC_ATMEL_POWER_H + +#include "hw/sysbus.h" +#include "hw/hw.h" + + +#define TYPE_AVR_MASK "atmel-power" +#define AVR_MASK(obj) OBJECT_CHECK(AVRMaskState, (obj), TYPE_AVR_MASK) + +typedef struct { + /* */ + SysBusDevice parent_obj; + + /* */ + MemoryRegion iomem; + + uint8_t val; + qemu_irq irq[8]; +} AVRMaskState; + +#endif /* HW_MISC_ATMEL_POWER_H */ diff --git a/hw/misc/atmel_power.c b/hw/misc/atmel_power.c new file mode 100644 index 0000000000..adab729f66 --- /dev/null +++ b/hw/misc/atmel_power.c @@ -0,0 +1,112 @@ +/* + * Atmel AVR Power Reduction Management + * + * Copyright (c) 2019 Michael Rolnik + * + * Permission is hereby granted, free of charge, to any person obtaining a= copy + * of this software and associated documentation files (the "Software"), t= o deal + * in the Software without restriction, including without limitation the r= ights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or se= ll + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included= in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS= OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OT= HER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING= FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS = IN + * THE SOFTWARE. + */ + +#include "qemu/osdep.h" +#include "hw/misc/atmel_power.h" +#include "qemu/log.h" +#include "hw/qdev-properties.h" +#include "hw/irq.h" + +#define DB_PRINT(fmt, args...) /* Nothing */ +/*#define DB_PRINT(fmt, args...) printf("%s: " fmt "\n", __func__, ## args= )*/ + +static void avr_mask_reset(DeviceState *dev) +{ + AVRMaskState *s =3D AVR_MASK(dev); + + s->val =3D 0x00; + + for (int i =3D 0; i < 8; i++) { + qemu_set_irq(s->irq[i], 0); + } +} + +static uint64_t avr_mask_read(void *opaque, hwaddr offset, unsigned size) +{ + assert(size =3D=3D 1); + assert(offset =3D=3D 0); + AVRMaskState *s =3D opaque; + + return (uint64_t)s->val; +} + +static void avr_mask_write(void *opaque, hwaddr offset, + uint64_t val64, unsigned size) +{ + assert(size =3D=3D 1); + assert(offset =3D=3D 0); + AVRMaskState *s =3D opaque; + uint8_t val8 =3D val64; + + DB_PRINT("write %d to offset %d", val8, (uint8_t)offset); + + s->val =3D val8; + for (int i =3D 0; i < 8; i++) { + qemu_set_irq(s->irq[i], (val8 & (1 << i)) !=3D 0); + } +} + +static const MemoryRegionOps avr_mask_ops =3D { + .read =3D avr_mask_read, + .write =3D avr_mask_write, + .endianness =3D DEVICE_NATIVE_ENDIAN, + .impl =3D {.max_access_size =3D 1} +}; + +static void avr_mask_init(Object *dev) +{ + AVRMaskState *s =3D AVR_MASK(dev); + SysBusDevice *busdev =3D SYS_BUS_DEVICE(dev); + + memory_region_init_io(&s->iomem, dev, &avr_mask_ops, s, TYPE_AVR_MASK, + 0x01); + sysbus_init_mmio(busdev, &s->iomem); + + for (int i =3D 0; i < 8; i++) { + sysbus_init_irq(busdev, &s->irq[i]); + } + s->val =3D 0x00; +} + +static void avr_mask_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->reset =3D avr_mask_reset; +} + +static const TypeInfo avr_mask_info =3D { + .name =3D TYPE_AVR_MASK, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(AVRMaskState), + .class_init =3D avr_mask_class_init, + .instance_init =3D avr_mask_init, +}; + +static void avr_mask_register_types(void) +{ + type_register_static(&avr_mask_info); +} + +type_init(avr_mask_register_types) diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig index bdd77d8020..3a3c32e1b0 100644 --- a/hw/misc/Kconfig +++ b/hw/misc/Kconfig @@ -131,4 +131,7 @@ config MAC_VIA select MOS6522 select ADB =20 +config ATMEL_POWER + bool + source macio/Kconfig diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index da993f45b7..e605964f4b 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -85,3 +85,5 @@ common-obj-$(CONFIG_NRF51_SOC) +=3D nrf51_rng.o obj-$(CONFIG_MAC_VIA) +=3D mac_via.o =20 common-obj-$(CONFIG_GRLIB) +=3D grlib_ahb_apb_pnp.o + +obj-$(CONFIG_ATMEL_POWER) +=3D atmel_power.o --=20 2.21.1