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Tsirkin" To: qemu-devel@nongnu.org Subject: [PULL v3 03/18] acpi: cpuhp: spec: clarify 'CPU selector' register usage and endianness Message-ID: <20200123070913.626488-4-mst@redhat.com> References: <20200123070913.626488-1-mst@redhat.com> MIME-Version: 1.0 In-Reply-To: <20200123070913.626488-1-mst@redhat.com> X-Mailer: git-send-email 2.24.1.751.gd10ce2899c X-Mutt-Fcc: =sent X-MC-Unique: 85EewQqVMdu_F2AuXz3bNQ-1 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Content-Disposition: inline X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 207.211.31.81 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Laszlo Ersek , Igor Mammedov Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: Igor Mammedov * Move reserved registers to the top of the section, so reader would be aware of effects when reading registers description. * State registers endianness explicitly at the beginning of the section * Describe registers behavior in case of 'CPU selector' register contains value that doesn't point to a possible CPU. Signed-off-by: Igor Mammedov Reviewed-by: Laszlo Ersek Message-Id: <1575896942-331151-5-git-send-email-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- docs/specs/acpi_cpu_hotplug.txt | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/docs/specs/acpi_cpu_hotplug.txt b/docs/specs/acpi_cpu_hotplug.= txt index ee219c8358..4e65286ff5 100644 --- a/docs/specs/acpi_cpu_hotplug.txt +++ b/docs/specs/acpi_cpu_hotplug.txt @@ -30,6 +30,18 @@ Register block base address: Register block size: ACPI_CPU_HOTPLUG_REG_LEN =3D 12 =20 +All accesses to registers described below, imply little-endian byte order. + +Reserved resisters behavior: + - write accesses are ignored + - read accesses return all bits set to 0. + +The last stored value in 'CPU selector' must refer to a possible CPU, othe= rwise + - reads from any register return 0 + - writes to any other register are ignored until valid value is stored i= nto it +On QEMU start, 'CPU selector' is initialized to a valid value, on reset it +keeps the current value. + read access: offset: [0x0-0x3] reserved @@ -86,9 +98,3 @@ write access: ACPI_DEVICE_OST QMP event from QEMU to external applicati= ons with current values of OST event and status registers. other values: reserved - -Selecting CPU device beyond possible range has no effect on platform: - - write accesses to CPU hot-plug registers not documented above are - ignored - - read accesses to CPU hot-plug registers not documented above return - all bits set to 0. --=20 MST