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[173.198.77.92]) by smtp.gmail.com with ESMTPSA id c22sm44149883pfo.50.2020.01.21.18.50.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jan 2020 18:50:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wIDWcLu0KGxPWYY161PaG0CZqx2uLhbLjATvWFH7yr4=; b=DyIBZv+a0wSwNfD2qYdhk/N28TFeF53UIc5tH23bi/mH6J7Nr4P0skLOjrhctA9bAJ fgftI0nXoLQBQxNkJ8EVjszP08DYfHDKY3Q5EQZTW2/3uz+14vSMNezd6dnn+LBsm8xj N1yQIimcgfIUtfpQXZEqTwpr6mrjgDv6mOIxOjD0RqKlWjVdTBmBHaUARP9cRQisy2MI lQERy5UHG9joLFErETcqhU6GjoOiZzdDD3tpADDgZUkWxeNDs2L6oh2ZFmeK6H+msIl1 ye7nrZLg+pQ26Q8eVO4SGjsx30c8XqF27Iw/2crNd410E84ZOc9yBGt6mHppxsmY1q9p DkHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wIDWcLu0KGxPWYY161PaG0CZqx2uLhbLjATvWFH7yr4=; b=lBejussY29YwME1SpFw5mbcLCamNiyfKIqP//3bC5pYtcyBc0ctqWCMzZ7q2Bnf0xQ ZyA5v+48JdMrtK++xrzac2QvoPXu2G0hH9z9va29mXJnw5ONjsXLm4XI/QD6/SpJk6qB fjWpc+R+tGq5Wh+2pzmOlplO7jTvtCXG1TgzLsMSUrp+d1pV3K37RSwRkrplYSS8C0cq mjlVFq/dhkRgI/LuRBe5kKLKoyQh4cA2rvVZq+8uy3nmwl49xlVAZiOl3W8YzFIU8cgf QWiIzV02+bc8PkJEFGDYaa0F+fQSQUjrAUD9aFYxYmsOdan5cfbYLMKRhARTXCN1tpvT mBFQ== X-Gm-Message-State: APjAAAWIqhIrP/6AMqQL1we1HMCbx3Xxi7ia59zgZOxCbuUDN7NkFKjC xVBwgmO9sqJrj1qMDf1stZAXqXvOy9Q= X-Google-Smtp-Source: APXvYqw5d0HjtBypkDc5Z6nJNZJYWv3GLsqwX6el4aYlHx7Ild43wb98FlLaxXKF4SKbsU/Y+i273Q== X-Received: by 2002:a63:7d6:: with SMTP id 205mr9003533pgh.131.1579661407680; Tue, 21 Jan 2020 18:50:07 -0800 (PST) From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Subject: [PULL 10/16] cputlb: Hoist tlb portions in tlb_mmu_resize_locked Date: Tue, 21 Jan 2020 16:49:40 -1000 Message-Id: <20200122024946.28484-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200122024946.28484-1-richard.henderson@linaro.org> References: <20200122024946.28484-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Cc: peter.maydell@linaro.org, Alistair Francis <alistair.francis@wdc.com>, =?UTF-8?q?Alex=20Benn=C3=A9e?= <alex.bennee@linaro.org>, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@redhat.com> Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+importer=patchew.org@nongnu.org> X-ZohoMail-DKIM: fail (Header signature does not verify) No functional change, but the smaller expressions make the code easier to read. Reviewed-by: Alex Benn=C3=A9e <alex.bennee@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daud=C3=A9 <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- accel/tcg/cputlb.c | 35 +++++++++++++++++------------------ 1 file changed, 17 insertions(+), 18 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index cc6f4c994b..5252bcb949 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -115,8 +115,8 @@ static void tlb_dyn_init(CPUArchState *env) =20 /** * tlb_mmu_resize_locked() - perform TLB resize bookkeeping; resize if nec= essary - * @env: CPU that owns the TLB - * @mmu_idx: MMU index of the TLB + * @desc: The CPUTLBDesc portion of the TLB + * @fast: The CPUTLBDescFast portion of the same TLB * * Called with tlb_lock_held. * @@ -153,10 +153,9 @@ static void tlb_dyn_init(CPUArchState *env) * high), since otherwise we are likely to have a significant amount of * conflict misses. */ -static void tlb_mmu_resize_locked(CPUArchState *env, int mmu_idx) +static void tlb_mmu_resize_locked(CPUTLBDesc *desc, CPUTLBDescFast *fast) { - CPUTLBDesc *desc =3D &env_tlb(env)->d[mmu_idx]; - size_t old_size =3D tlb_n_entries(&env_tlb(env)->f[mmu_idx]); + size_t old_size =3D tlb_n_entries(fast); size_t rate; size_t new_size =3D old_size; int64_t now =3D get_clock_realtime(); @@ -198,14 +197,15 @@ static void tlb_mmu_resize_locked(CPUArchState *env, = int mmu_idx) return; } =20 - g_free(env_tlb(env)->f[mmu_idx].table); - g_free(env_tlb(env)->d[mmu_idx].iotlb); + g_free(fast->table); + g_free(desc->iotlb); =20 tlb_window_reset(desc, now, 0); /* desc->n_used_entries is cleared by the caller */ - env_tlb(env)->f[mmu_idx].mask =3D (new_size - 1) << CPU_TLB_ENTRY_BITS; - env_tlb(env)->f[mmu_idx].table =3D g_try_new(CPUTLBEntry, new_size); - env_tlb(env)->d[mmu_idx].iotlb =3D g_try_new(CPUIOTLBEntry, new_size); + fast->mask =3D (new_size - 1) << CPU_TLB_ENTRY_BITS; + fast->table =3D g_try_new(CPUTLBEntry, new_size); + desc->iotlb =3D g_try_new(CPUIOTLBEntry, new_size); + /* * If the allocations fail, try smaller sizes. We just freed some * memory, so going back to half of new_size has a good chance of work= ing. @@ -213,25 +213,24 @@ static void tlb_mmu_resize_locked(CPUArchState *env, = int mmu_idx) * allocations to fail though, so we progressively reduce the allocati= on * size, aborting if we cannot even allocate the smallest TLB we suppo= rt. */ - while (env_tlb(env)->f[mmu_idx].table =3D=3D NULL || - env_tlb(env)->d[mmu_idx].iotlb =3D=3D NULL) { + while (fast->table =3D=3D NULL || desc->iotlb =3D=3D NULL) { if (new_size =3D=3D (1 << CPU_TLB_DYN_MIN_BITS)) { error_report("%s: %s", __func__, strerror(errno)); abort(); } new_size =3D MAX(new_size >> 1, 1 << CPU_TLB_DYN_MIN_BITS); - env_tlb(env)->f[mmu_idx].mask =3D (new_size - 1) << CPU_TLB_ENTRY_= BITS; + fast->mask =3D (new_size - 1) << CPU_TLB_ENTRY_BITS; =20 - g_free(env_tlb(env)->f[mmu_idx].table); - g_free(env_tlb(env)->d[mmu_idx].iotlb); - env_tlb(env)->f[mmu_idx].table =3D g_try_new(CPUTLBEntry, new_size= ); - env_tlb(env)->d[mmu_idx].iotlb =3D g_try_new(CPUIOTLBEntry, new_si= ze); + g_free(fast->table); + g_free(desc->iotlb); + fast->table =3D g_try_new(CPUTLBEntry, new_size); + desc->iotlb =3D g_try_new(CPUIOTLBEntry, new_size); } } =20 static void tlb_flush_one_mmuidx_locked(CPUArchState *env, int mmu_idx) { - tlb_mmu_resize_locked(env, mmu_idx); + tlb_mmu_resize_locked(&env_tlb(env)->d[mmu_idx], &env_tlb(env)->f[mmu_= idx]); env_tlb(env)->d[mmu_idx].n_used_entries =3D 0; env_tlb(env)->d[mmu_idx].large_page_addr =3D -1; env_tlb(env)->d[mmu_idx].large_page_mask =3D -1; --=20 2.20.1