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[173.198.77.92]) by smtp.gmail.com with ESMTPSA id t1sm42935209pgq.23.2020.01.21.18.33.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jan 2020 18:33:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xfvVMl489iCh1aQTVlahIVDKwKd8nPWhtAysKtwW+lo=; b=pxFO1QrMe8ZeRH4IceujXtr15ctSUNKgXTYvX2zno/nGWCtJbsriXjPR6DOwujHsA3 t4GNjIodvw6WrT2dCF/ZsFrrUnWa6Kd/sf251x7BrpAk6ru5SSbjGmLIgPyLb6PUOrA4 b3NFEgTHxoXvTTQlzusXSFyThqv2aEag7tDLH8D+15ZwnIWuOHfUygodmIpbhhGXkR2q AdlqfON4blfFFzM6yqVmfPQChpg9gAhDjgtqJ/KALxqI5YFG8dS1gJqpic8qIhaOLf0s /dKfJba0Dx07SrZl2/DZwJBcFskXMO3IlWpNumosyCv45ejlbSHFJRq9T9pTZrKnWB+F gySQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xfvVMl489iCh1aQTVlahIVDKwKd8nPWhtAysKtwW+lo=; b=jarTCAM6gvz0UxH0tghzE5kw6WGPedfGxvIDNrFY+rBaAL9L8/kkxbJnifPH2RpbAy skBN40YkU5VbsY1BeDawcqwzwYfipuKKRhSAPTtHV41hGr2y0wf+hk2YjgH7/p5dRHqO rs3+08MfGbdjqffN2VL2klMlYjl3o6mIaYwjnkMM9smDvo2q0Iu8HEfkxzK8xHERICW8 iZy7tPJnpwQeMNWzW+CH73vnKbzcv01OqhO0N+w1daguVkgXaPMvQarD9BiIw5IxHs4y 15sh2nE+uhn3AIzJNQA0yxltWSwGRAOKHSIeE5gYHL9IAzFceuv7Bo9r1Uyf3d1PHflF vhsg== X-Gm-Message-State: APjAAAW6x9sdUTapHQvE+Qj+TsoPGf9d215KapmyDjvhpOToVIlAojN3 FKYhCoAyGW4Kkr2/uxdqqcetz8vBIxE= X-Google-Smtp-Source: APXvYqzrHvRMTbvoqHXLfsxIozDoKCD5y72fF3wylxvWx5enzGNkTFgQigj/ia2unJb0Pgl1SxsoNw== X-Received: by 2002:a17:902:bd89:: with SMTP id q9mr8801573pls.38.1579660381820; Tue, 21 Jan 2020 18:33:01 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 01/11] hw/hppa/dino.c: Improve emulation of Dino PCI chip Date: Tue, 21 Jan 2020 16:32:46 -1000 Message-Id: <20200122023256.27556-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200122023256.27556-1-richard.henderson@linaro.org> References: <20200122023256.27556-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1043 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Helge Deller , Sven Schnelle , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Helge Deller The tests of the dino chip with the Online-diagnostics CD ("ODE DINOTEST") now succeeds. Additionally add some qemu trace events. Signed-off-by: Helge Deller Signed-off-by: Sven Schnelle Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20191220211512.3289-2-svens@stackframe.org> Signed-off-by: Richard Henderson --- hw/hppa/dino.c | 97 +++++++++++++++++++++++++++++++++++++------- MAINTAINERS | 2 +- hw/hppa/trace-events | 5 +++ 3 files changed, 89 insertions(+), 15 deletions(-) diff --git a/hw/hppa/dino.c b/hw/hppa/dino.c index ab6969b45f..9797a7f0d9 100644 --- a/hw/hppa/dino.c +++ b/hw/hppa/dino.c @@ -1,7 +1,7 @@ /* - * HP-PARISC Dino PCI chipset emulation. + * HP-PARISC Dino PCI chipset emulation, as in B160L and similiar machines * - * (C) 2017 by Helge Deller + * (C) 2017-2019 by Helge Deller * * This work is licensed under the GNU GPL license version 2 or later. * @@ -21,6 +21,7 @@ #include "migration/vmstate.h" #include "hppa_sys.h" #include "exec/address-spaces.h" +#include "trace.h" =20 =20 #define TYPE_DINO_PCI_HOST_BRIDGE "dino-pcihost" @@ -82,11 +83,28 @@ #define DINO_PCI_HOST_BRIDGE(obj) \ OBJECT_CHECK(DinoState, (obj), TYPE_DINO_PCI_HOST_BRIDGE) =20 +#define DINO800_REGS ((DINO_TLTIM - DINO_GMASK) / 4) +static const uint32_t reg800_keep_bits[DINO800_REGS] =3D { + MAKE_64BIT_MASK(0, 1), + MAKE_64BIT_MASK(0, 7), + MAKE_64BIT_MASK(0, 7), + MAKE_64BIT_MASK(0, 8), + MAKE_64BIT_MASK(0, 7), + MAKE_64BIT_MASK(0, 9), + MAKE_64BIT_MASK(0, 32), + MAKE_64BIT_MASK(0, 8), + MAKE_64BIT_MASK(0, 30), + MAKE_64BIT_MASK(0, 25), + MAKE_64BIT_MASK(0, 22), + MAKE_64BIT_MASK(0, 9), +}; + typedef struct DinoState { PCIHostState parent_obj; =20 /* PCI_CONFIG_ADDR is parent_obj.config_reg, via pci_host_conf_be_ops, so that we can map PCI_CONFIG_DATA to pci_host_data_be_ops. */ + uint32_t config_reg_dino; /* keep original copy, including 2 lowest bi= ts */ =20 uint32_t iar0; uint32_t iar1; @@ -94,8 +112,12 @@ typedef struct DinoState { uint32_t ipr; uint32_t icr; uint32_t ilr; + uint32_t io_fbb_en; uint32_t io_addr_en; uint32_t io_control; + uint32_t toc_addr; + + uint32_t reg800[DINO800_REGS]; =20 MemoryRegion this_mem; MemoryRegion pci_mem; @@ -106,8 +128,6 @@ typedef struct DinoState { MemoryRegion bm_ram_alias; MemoryRegion bm_pci_alias; MemoryRegion bm_cpu_alias; - - MemoryRegion cpu0_eir_mem; } DinoState; =20 /* @@ -122,6 +142,8 @@ static void gsc_to_pci_forwarding(DinoState *s) tmp =3D extract32(s->io_control, 7, 2); enabled =3D (tmp =3D=3D 0x01); io_addr_en =3D s->io_addr_en; + /* Mask out first (=3Dfirmware) and last (=3DDino) areas. */ + io_addr_en &=3D ~(BIT(31) | BIT(0)); =20 memory_region_transaction_begin(); for (i =3D 1; i < 31; i++) { @@ -142,6 +164,8 @@ static bool dino_chip_mem_valid(void *opaque, hwaddr ad= dr, unsigned size, bool is_write, MemTxAttrs attrs) { + bool ret =3D false; + switch (addr) { case DINO_IAR0: case DINO_IAR1: @@ -152,16 +176,22 @@ static bool dino_chip_mem_valid(void *opaque, hwaddr = addr, case DINO_ICR: case DINO_ILR: case DINO_IO_CONTROL: + case DINO_IO_FBB_EN: case DINO_IO_ADDR_EN: case DINO_PCI_IO_DATA: - return true; + case DINO_TOC_ADDR: + case DINO_GMASK ... DINO_TLTIM: + ret =3D true; + break; case DINO_PCI_IO_DATA + 2: - return size <=3D 2; + ret =3D (size <=3D 2); + break; case DINO_PCI_IO_DATA + 1: case DINO_PCI_IO_DATA + 3: - return size =3D=3D 1; + ret =3D (size =3D=3D 1); } - return false; + trace_dino_chip_mem_valid(addr, ret); + return ret; } =20 static MemTxResult dino_chip_read_with_attrs(void *opaque, hwaddr addr, @@ -194,6 +224,9 @@ static MemTxResult dino_chip_read_with_attrs(void *opaq= ue, hwaddr addr, } break; =20 + case DINO_IO_FBB_EN: + val =3D s->io_fbb_en; + break; case DINO_IO_ADDR_EN: val =3D s->io_addr_en; break; @@ -227,12 +260,28 @@ static MemTxResult dino_chip_read_with_attrs(void *op= aque, hwaddr addr, case DINO_IRR1: val =3D s->ilr & s->imr & s->icr; break; + case DINO_TOC_ADDR: + val =3D s->toc_addr; + break; + case DINO_GMASK ... DINO_TLTIM: + val =3D s->reg800[(addr - DINO_GMASK) / 4]; + if (addr =3D=3D DINO_PAMR) { + val &=3D ~0x01; /* LSB is hardwired to 0 */ + } + if (addr =3D=3D DINO_MLTIM) { + val &=3D ~0x07; /* 3 LSB are hardwired to 0 */ + } + if (addr =3D=3D DINO_BRDG_FEAT) { + val &=3D ~(0x10710E0ul | 8); /* bits 5-7, 24 & 15 reserved */ + } + break; =20 default: /* Controlled by dino_chip_mem_valid above. */ g_assert_not_reached(); } =20 + trace_dino_chip_read(addr, val); *data =3D val; return ret; } @@ -245,6 +294,9 @@ static MemTxResult dino_chip_write_with_attrs(void *opa= que, hwaddr addr, AddressSpace *io; MemTxResult ret; uint16_t ioaddr; + int i; + + trace_dino_chip_write(addr, val); =20 switch (addr) { case DINO_IO_DATA ... DINO_PCI_IO_DATA + 3: @@ -266,9 +318,11 @@ static MemTxResult dino_chip_write_with_attrs(void *op= aque, hwaddr addr, } return ret; =20 + case DINO_IO_FBB_EN: + s->io_fbb_en =3D val & 0x03; + break; case DINO_IO_ADDR_EN: - /* Never allow first (=3Dfirmware) and last (=3DDino) areas. */ - s->io_addr_en =3D val & 0x7ffffffe; + s->io_addr_en =3D val; gsc_to_pci_forwarding(s); break; case DINO_IO_CONTROL: @@ -292,6 +346,10 @@ static MemTxResult dino_chip_write_with_attrs(void *op= aque, hwaddr addr, /* Any write to IPR clears the register. */ s->ipr =3D 0; break; + case DINO_TOC_ADDR: + /* IO_COMMAND of CPU with client_id bits */ + s->toc_addr =3D 0xFFFA0030 | (val & 0x1e000); + break; =20 case DINO_ILR: case DINO_IRR0: @@ -299,6 +357,12 @@ static MemTxResult dino_chip_write_with_attrs(void *op= aque, hwaddr addr, /* These registers are read-only. */ break; =20 + case DINO_GMASK ... DINO_TLTIM: + i =3D (addr - DINO_GMASK) / 4; + val &=3D reg800_keep_bits[i]; + s->reg800[i] =3D val; + break; + default: /* Controlled by dino_chip_mem_valid above. */ g_assert_not_reached(); @@ -323,7 +387,7 @@ static const MemoryRegionOps dino_chip_ops =3D { =20 static const VMStateDescription vmstate_dino =3D { .name =3D "Dino", - .version_id =3D 1, + .version_id =3D 2, .minimum_version_id =3D 1, .fields =3D (VMStateField[]) { VMSTATE_UINT32(iar0, DinoState), @@ -332,13 +396,14 @@ static const VMStateDescription vmstate_dino =3D { VMSTATE_UINT32(ipr, DinoState), VMSTATE_UINT32(icr, DinoState), VMSTATE_UINT32(ilr, DinoState), + VMSTATE_UINT32(io_fbb_en, DinoState), VMSTATE_UINT32(io_addr_en, DinoState), VMSTATE_UINT32(io_control, DinoState), + VMSTATE_UINT32(toc_addr, DinoState), VMSTATE_END_OF_LIST() } }; =20 - /* Unlike pci_config_data_le_ops, no check of high bit set in config_reg. = */ =20 static uint64_t dino_config_data_read(void *opaque, hwaddr addr, unsigned = len) @@ -362,14 +427,16 @@ static const MemoryRegionOps dino_config_data_ops =3D= { =20 static uint64_t dino_config_addr_read(void *opaque, hwaddr addr, unsigned = len) { - PCIHostState *s =3D opaque; - return s->config_reg; + DinoState *s =3D opaque; + return s->config_reg_dino; } =20 static void dino_config_addr_write(void *opaque, hwaddr addr, uint64_t val, unsigned len) { PCIHostState *s =3D opaque; + DinoState *ds =3D opaque; + ds->config_reg_dino =3D val; /* keep a copy of original value */ s->config_reg =3D val & ~3U; } =20 @@ -453,6 +520,8 @@ PCIBus *dino_init(MemoryRegion *addr_space, =20 dev =3D qdev_create(NULL, TYPE_DINO_PCI_HOST_BRIDGE); s =3D DINO_PCI_HOST_BRIDGE(dev); + s->iar0 =3D s->iar1 =3D CPU_HPA + 3; + s->toc_addr =3D 0xFFFA0030; /* IO_COMMAND of CPU */ =20 /* Dino PCI access from main memory. */ memory_region_init_io(&s->this_mem, OBJECT(s), &dino_chip_ops, diff --git a/MAINTAINERS b/MAINTAINERS index 2c768ed3d8..b287cbeaa8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -890,7 +890,7 @@ F: hw/*/etraxfs_*.c =20 HP-PARISC Machines ------------------ -Dino +HP B160L M: Richard Henderson R: Helge Deller S: Odd Fixes diff --git a/hw/hppa/trace-events b/hw/hppa/trace-events index 4e2acb6176..f943b16c4e 100644 --- a/hw/hppa/trace-events +++ b/hw/hppa/trace-events @@ -2,3 +2,8 @@ =20 # pci.c hppa_pci_iack_write(void) "" + +# dino.c +dino_chip_mem_valid(uint64_t addr, uint32_t val) "access to addr 0x%"PRIx6= 4" is %d" +dino_chip_read(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x" +dino_chip_write(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x" --=20 2.20.1